arch/mips/alchemy/common/platform.c

   1 /*
   2  * Platform device support for Au1x00 SoCs.
   3  *
   4  * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
   5  *
   6  * (C) Copyright Embedded Alley Solutions, Inc 2005
   7  * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #include <linux/dma-mapping.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/init.h>
  18
  19 #include <asm/mach-au1x00/au1xxx.h>
  20 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  21 #include <asm/mach-au1x00/au1100_mmc.h>
  22 #include <asm/mach-au1x00/au1xxx_eth.h>
  23
  24 #define PORT(_base, _irq)                                       \
  25         {                                                       \
  26                 .mapbase        = _base,                        \
  27                 .irq            = _irq,                         \
  28                 .regshift       = 2,                            \
  29                 .iotype         = UPIO_AU,                      \
  30                 .flags          = UPF_SKIP_TEST | UPF_IOREMAP | \
  31                                   UPF_FIXED_TYPE,               \
  32                 .type           = PORT_16550A,                  \
  33         }
  34
  35 static struct plat_serial8250_port au1x00_uart_data[] = {
  36 #if defined(CONFIG_SOC_AU1000)
  37         PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
  38         PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
  39         PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
  40         PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
  41 #elif defined(CONFIG_SOC_AU1500)
  42         PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
  43         PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
  44 #elif defined(CONFIG_SOC_AU1100)
  45         PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
  46         PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
  47         PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
  48 #elif defined(CONFIG_SOC_AU1550)
  49         PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
  50         PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
  51         PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
  52 #elif defined(CONFIG_SOC_AU1200)
  53         PORT(UART0_PHYS_ADDR, AU1200_UART0_INT),
  54         PORT(UART1_PHYS_ADDR, AU1200_UART1_INT),
  55 #endif
  56         { },
  57 };
  58
  59 static struct platform_device au1xx0_uart_device = {
  60         .name                   = "serial8250",
  61         .id                     = PLAT8250_DEV_AU1X00,
  62         .dev                    = {
  63                 .platform_data  = au1x00_uart_data,
  64         },
  65 };
  66
  67 /* OHCI (USB full speed host controller) */
  68 static struct resource au1xxx_usb_ohci_resources[] = {
  69         [0] = {
  70                 .start          = USB_OHCI_BASE,
  71                 .end            = USB_OHCI_BASE + USB_OHCI_LEN - 1,
  72                 .flags          = IORESOURCE_MEM,
  73         },
  74         [1] = {
  75                 .start          = FOR_PLATFORM_C_USB_HOST_INT,
  76                 .end            = FOR_PLATFORM_C_USB_HOST_INT,
  77                 .flags          = IORESOURCE_IRQ,
  78         },
  79 };
  80
  81 /* The dmamask must be set for OHCI to work */
  82 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  83
  84 static struct platform_device au1xxx_usb_ohci_device = {
  85         .name           = "au1xxx-ohci",
  86         .id             = 0,
  87         .dev = {
  88                 .dma_mask               = &ohci_dmamask,
  89                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  90         },
  91         .num_resources  = ARRAY_SIZE(au1xxx_usb_ohci_resources),
  92         .resource       = au1xxx_usb_ohci_resources,
  93 };
  94
  95 /*** AU1100 LCD controller ***/
  96
  97 #ifdef CONFIG_FB_AU1100
  98 static struct resource au1100_lcd_resources[] = {
  99         [0] = {
 100                 .start          = LCD_PHYS_ADDR,
 101                 .end            = LCD_PHYS_ADDR + 0x800 - 1,
 102                 .flags          = IORESOURCE_MEM,
 103         },
 104         [1] = {
 105                 .start          = AU1100_LCD_INT,
 106                 .end            = AU1100_LCD_INT,
 107                 .flags          = IORESOURCE_IRQ,
 108         }
 109 };
 110
 111 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
 112
 113 static struct platform_device au1100_lcd_device = {
 114         .name           = "au1100-lcd",
 115         .id             = 0,
 116         .dev = {
 117                 .dma_mask               = &au1100_lcd_dmamask,
 118                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 119         },
 120         .num_resources  = ARRAY_SIZE(au1100_lcd_resources),
 121         .resource       = au1100_lcd_resources,
 122 };
 123 #endif
 124
 125 #ifdef CONFIG_SOC_AU1200
 126 /* EHCI (USB high speed host controller) */
 127 static struct resource au1xxx_usb_ehci_resources[] = {
 128         [0] = {
 129                 .start          = USB_EHCI_BASE,
 130                 .end            = USB_EHCI_BASE + USB_EHCI_LEN - 1,
 131                 .flags          = IORESOURCE_MEM,
 132         },
 133         [1] = {
 134                 .start          = AU1200_USB_INT,
 135                 .end            = AU1200_USB_INT,
 136                 .flags          = IORESOURCE_IRQ,
 137         },
 138 };
 139
 140 static u64 ehci_dmamask = DMA_BIT_MASK(32);
 141
 142 static struct platform_device au1xxx_usb_ehci_device = {
 143         .name           = "au1xxx-ehci",
 144         .id             = 0,
 145         .dev = {
 146                 .dma_mask               = &ehci_dmamask,
 147                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 148         },
 149         .num_resources  = ARRAY_SIZE(au1xxx_usb_ehci_resources),
 150         .resource       = au1xxx_usb_ehci_resources,
 151 };
 152
 153 /* Au1200 UDC (USB gadget controller) */
 154 static struct resource au1xxx_usb_gdt_resources[] = {
 155         [0] = {
 156                 .start          = USB_UDC_BASE,
 157                 .end            = USB_UDC_BASE + USB_UDC_LEN - 1,
 158                 .flags          = IORESOURCE_MEM,
 159         },
 160         [1] = {
 161                 .start          = AU1200_USB_INT,
 162                 .end            = AU1200_USB_INT,
 163                 .flags          = IORESOURCE_IRQ,
 164         },
 165 };
 166
 167 static u64 udc_dmamask = DMA_BIT_MASK(32);
 168
 169 static struct platform_device au1xxx_usb_gdt_device = {
 170         .name           = "au1xxx-udc",
 171         .id             = 0,
 172         .dev = {
 173                 .dma_mask               = &udc_dmamask,
 174                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 175         },
 176         .num_resources  = ARRAY_SIZE(au1xxx_usb_gdt_resources),
 177         .resource       = au1xxx_usb_gdt_resources,
 178 };
 179
 180 /* Au1200 UOC (USB OTG controller) */
 181 static struct resource au1xxx_usb_otg_resources[] = {
 182         [0] = {
 183                 .start          = USB_UOC_BASE,
 184                 .end            = USB_UOC_BASE + USB_UOC_LEN - 1,
 185                 .flags          = IORESOURCE_MEM,
 186         },
 187         [1] = {
 188                 .start          = AU1200_USB_INT,
 189                 .end            = AU1200_USB_INT,
 190                 .flags          = IORESOURCE_IRQ,
 191         },
 192 };
 193
 194 static u64 uoc_dmamask = DMA_BIT_MASK(32);
 195
 196 static struct platform_device au1xxx_usb_otg_device = {
 197         .name           = "au1xxx-uoc",
 198         .id             = 0,
 199         .dev = {
 200                 .dma_mask               = &uoc_dmamask,
 201                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 202         },
 203         .num_resources  = ARRAY_SIZE(au1xxx_usb_otg_resources),
 204         .resource       = au1xxx_usb_otg_resources,
 205 };
 206
 207 static struct resource au1200_lcd_resources[] = {
 208         [0] = {
 209                 .start          = LCD_PHYS_ADDR,
 210                 .end            = LCD_PHYS_ADDR + 0x800 - 1,
 211                 .flags          = IORESOURCE_MEM,
 212         },
 213         [1] = {
 214                 .start          = AU1200_LCD_INT,
 215                 .end            = AU1200_LCD_INT,
 216                 .flags          = IORESOURCE_IRQ,
 217         }
 218 };
 219
 220 static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
 221
 222 static struct platform_device au1200_lcd_device = {
 223         .name           = "au1200-lcd",
 224         .id             = 0,
 225         .dev = {
 226                 .dma_mask               = &au1200_lcd_dmamask,
 227                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 228         },
 229         .num_resources  = ARRAY_SIZE(au1200_lcd_resources),
 230         .resource       = au1200_lcd_resources,
 231 };
 232
 233 static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
 234
 235 extern struct au1xmmc_platform_data au1xmmc_platdata[2];
 236
 237 static struct resource au1200_mmc0_resources[] = {
 238         [0] = {
 239                 .start          = SD0_PHYS_ADDR,
 240                 .end            = SD0_PHYS_ADDR + 0x7ffff,
 241                 .flags          = IORESOURCE_MEM,
 242         },
 243         [1] = {
 244                 .start          = AU1200_SD_INT,
 245                 .end            = AU1200_SD_INT,
 246                 .flags          = IORESOURCE_IRQ,
 247         },
 248         [2] = {
 249                 .start          = DSCR_CMD0_SDMS_TX0,
 250                 .end            = DSCR_CMD0_SDMS_TX0,
 251                 .flags          = IORESOURCE_DMA,
 252         },
 253         [3] = {
 254                 .start          = DSCR_CMD0_SDMS_RX0,
 255                 .end            = DSCR_CMD0_SDMS_RX0,
 256                 .flags          = IORESOURCE_DMA,
 257         }
 258 };
 259
 260 static struct platform_device au1200_mmc0_device = {
 261         .name = "au1xxx-mmc",
 262         .id = 0,
 263         .dev = {
 264                 .dma_mask               = &au1xxx_mmc_dmamask,
 265                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 266                 .platform_data          = &au1xmmc_platdata[0],
 267         },
 268         .num_resources  = ARRAY_SIZE(au1200_mmc0_resources),
 269         .resource       = au1200_mmc0_resources,
 270 };
 271
 272 #ifndef CONFIG_MIPS_DB1200
 273 static struct resource au1200_mmc1_resources[] = {
 274         [0] = {
 275                 .start          = SD1_PHYS_ADDR,
 276                 .end            = SD1_PHYS_ADDR + 0x7ffff,
 277                 .flags          = IORESOURCE_MEM,
 278         },
 279         [1] = {
 280                 .start          = AU1200_SD_INT,
 281                 .end            = AU1200_SD_INT,
 282                 .flags          = IORESOURCE_IRQ,
 283         },
 284         [2] = {
 285                 .start          = DSCR_CMD0_SDMS_TX1,
 286                 .end            = DSCR_CMD0_SDMS_TX1,
 287                 .flags          = IORESOURCE_DMA,
 288         },
 289         [3] = {
 290                 .start          = DSCR_CMD0_SDMS_RX1,
 291                 .end            = DSCR_CMD0_SDMS_RX1,
 292                 .flags          = IORESOURCE_DMA,
 293         }
 294 };
 295
 296 static struct platform_device au1200_mmc1_device = {
 297         .name = "au1xxx-mmc",
 298         .id = 1,
 299         .dev = {
 300                 .dma_mask               = &au1xxx_mmc_dmamask,
 301                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 302                 .platform_data          = &au1xmmc_platdata[1],
 303         },
 304         .num_resources  = ARRAY_SIZE(au1200_mmc1_resources),
 305         .resource       = au1200_mmc1_resources,
 306 };
 307 #endif /* #ifndef CONFIG_MIPS_DB1200 */
 308 #endif /* #ifdef CONFIG_SOC_AU1200 */
 309
 310 /* All Alchemy demoboards with I2C have this #define in their headers */
 311 #ifdef SMBUS_PSC_BASE
 312 static struct resource pbdb_smbus_resources[] = {
 313         {
 314                 .start  = CPHYSADDR(SMBUS_PSC_BASE),
 315                 .end    = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
 316                 .flags  = IORESOURCE_MEM,
 317         },
 318 };
 319
 320 static struct platform_device pbdb_smbus_device = {
 321         .name           = "au1xpsc_smbus",
 322         .id             = 0,    /* bus number */
 323         .num_resources  = ARRAY_SIZE(pbdb_smbus_resources),
 324         .resource       = pbdb_smbus_resources,
 325 };
 326 #endif
 327
 328 /* Macro to help defining the Ethernet MAC resources */
 329 #define MAC_RES(_base, _enable, _irq)                   \
 330         {                                               \
 331                 .start  = CPHYSADDR(_base),             \
 332                 .end    = CPHYSADDR(_base + 0xffff),    \
 333                 .flags  = IORESOURCE_MEM,               \
 334         },                                              \
 335         {                                               \
 336                 .start  = CPHYSADDR(_enable),           \
 337                 .end    = CPHYSADDR(_enable + 0x3),     \
 338                 .flags  = IORESOURCE_MEM,               \
 339         },                                              \
 340         {                                               \
 341                 .start  = _irq,                         \
 342                 .end    = _irq,                         \
 343                 .flags  = IORESOURCE_IRQ                \
 344         }
 345
 346 static struct resource au1xxx_eth0_resources[] = {
 347 #if defined(CONFIG_SOC_AU1000)
 348         MAC_RES(AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT),
 349 #elif defined(CONFIG_SOC_AU1100)
 350         MAC_RES(AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT),
 351 #elif defined(CONFIG_SOC_AU1550)
 352         MAC_RES(AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT),
 353 #elif defined(CONFIG_SOC_AU1500)
 354         MAC_RES(AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT),
 355 #endif
 356 };
 357
 358
 359 static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
 360         .phy1_search_mac0 = 1,
 361 };
 362
 363 static struct platform_device au1xxx_eth0_device = {
 364         .name           = "au1000-eth",
 365         .id             = 0,
 366         .num_resources  = ARRAY_SIZE(au1xxx_eth0_resources),
 367         .resource       = au1xxx_eth0_resources,
 368         .dev.platform_data = &au1xxx_eth0_platform_data,
 369 };
 370
 371 #ifndef CONFIG_SOC_AU1100
 372 static struct resource au1xxx_eth1_resources[] = {
 373 #if defined(CONFIG_SOC_AU1000)
 374         MAC_RES(AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT),
 375 #elif defined(CONFIG_SOC_AU1550)
 376         MAC_RES(AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT),
 377 #elif defined(CONFIG_SOC_AU1500)
 378         MAC_RES(AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT),
 379 #endif
 380 };
 381
 382 static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
 383         .phy1_search_mac0 = 1,
 384 };
 385
 386 static struct platform_device au1xxx_eth1_device = {
 387         .name           = "au1000-eth",
 388         .id             = 1,
 389         .num_resources  = ARRAY_SIZE(au1xxx_eth1_resources),
 390         .resource       = au1xxx_eth1_resources,
 391         .dev.platform_data = &au1xxx_eth1_platform_data,
 392 };
 393 #endif
 394
 395 void __init au1xxx_override_eth_cfg(unsigned int port,
 396                         struct au1000_eth_platform_data *eth_data)
 397 {
 398         if (!eth_data || port > 1)
 399                 return;
 400
 401         if (port == 0)
 402                 memcpy(&au1xxx_eth0_platform_data, eth_data,
 403                         sizeof(struct au1000_eth_platform_data));
 404 #ifndef CONFIG_SOC_AU1100
 405         else
 406                 memcpy(&au1xxx_eth1_platform_data, eth_data,
 407                         sizeof(struct au1000_eth_platform_data));
 408 #endif
 409 }
 410
 411 static struct platform_device *au1xxx_platform_devices[] __initdata = {
 412         &au1xx0_uart_device,
 413         &au1xxx_usb_ohci_device,
 414 #ifdef CONFIG_FB_AU1100
 415         &au1100_lcd_device,
 416 #endif
 417 #ifdef CONFIG_SOC_AU1200
 418         &au1xxx_usb_ehci_device,
 419         &au1xxx_usb_gdt_device,
 420         &au1xxx_usb_otg_device,
 421         &au1200_lcd_device,
 422         &au1200_mmc0_device,
 423 #ifndef CONFIG_MIPS_DB1200
 424         &au1200_mmc1_device,
 425 #endif
 426 #endif
 427 #ifdef SMBUS_PSC_BASE
 428         &pbdb_smbus_device,
 429 #endif
 430         &au1xxx_eth0_device,
 431 };
 432
 433 static int __init au1xxx_platform_init(void)
 434 {
 435         unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
 436         int err, i;
 437
 438         /* Fill up uartclk. */
 439         for (i = 0; au1x00_uart_data[i].flags; i++)
 440                 au1x00_uart_data[i].uartclk = uartclk;
 441
 442         err = platform_add_devices(au1xxx_platform_devices,
 443                                    ARRAY_SIZE(au1xxx_platform_devices));
 444 #ifndef CONFIG_SOC_AU1100
 445         /* Register second MAC if enabled in pinfunc */
 446         if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
 447                 platform_device_register(&au1xxx_eth1_device);
 448 #endif
 449
 450         return err;
 451 }
 452
 453 arch_initcall(au1xxx_platform_init);