MIPS: Alchemy: devboard register abstraction
[firefly-linux-kernel-4.4.55.git] / arch / mips / alchemy / devboards / bcsr.c
1 /*
2  * bcsr.h -- Db1xxx/Pb1xxx Devboard CPLD registers ("BCSR") abstraction.
3  *
4  * All Alchemy development boards (except, of course, the weird PB1000)
5  * have a few registers in a CPLD with standardised layout; they mostly
6  * only differ in base address.
7  * All registers are 16bits wide with 32bit spacing.
8  */
9
10 #include <linux/module.h>
11 #include <linux/spinlock.h>
12 #include <asm/addrspace.h>
13 #include <asm/io.h>
14 #include <asm/mach-db1x00/bcsr.h>
15
16 static struct bcsr_reg {
17         void __iomem *raddr;
18         spinlock_t lock;
19 } bcsr_regs[BCSR_CNT];
20
21 void __init bcsr_init(unsigned long bcsr1_phys, unsigned long bcsr2_phys)
22 {
23         int i;
24
25         bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys));
26         bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys));
27
28         for (i = 0; i < BCSR_CNT; i++) {
29                 if (i >= BCSR_HEXLEDS)
30                         bcsr_regs[i].raddr = (void __iomem *)bcsr2_phys +
31                                         (0x04 * (i - BCSR_HEXLEDS));
32                 else
33                         bcsr_regs[i].raddr = (void __iomem *)bcsr1_phys +
34                                         (0x04 * i);
35
36                 spin_lock_init(&bcsr_regs[i].lock);
37         }
38 }
39
40 unsigned short bcsr_read(enum bcsr_id reg)
41 {
42         unsigned short r;
43         unsigned long flags;
44
45         spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
46         r = __raw_readw(bcsr_regs[reg].raddr);
47         spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
48         return r;
49 }
50 EXPORT_SYMBOL_GPL(bcsr_read);
51
52 void bcsr_write(enum bcsr_id reg, unsigned short val)
53 {
54         unsigned long flags;
55
56         spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
57         __raw_writew(val, bcsr_regs[reg].raddr);
58         wmb();
59         spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
60 }
61 EXPORT_SYMBOL_GPL(bcsr_write);
62
63 void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set)
64 {
65         unsigned short r;
66         unsigned long flags;
67
68         spin_lock_irqsave(&bcsr_regs[reg].lock, flags);
69         r = __raw_readw(bcsr_regs[reg].raddr);
70         r &= ~clr;
71         r |= set;
72         __raw_writew(r, bcsr_regs[reg].raddr);
73         wmb();
74         spin_unlock_irqrestore(&bcsr_regs[reg].lock, flags);
75 }
76 EXPORT_SYMBOL_GPL(bcsr_mod);