2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 platform devices
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
16 #include <linux/clk.h>
17 #include <linux/device.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/resource.h>
22 #include <linux/dma-mapping.h>
24 #include <linux/usb/musb.h>
26 #include <asm/mach-jz4740/platform.h>
27 #include <asm/mach-jz4740/base.h>
28 #include <asm/mach-jz4740/irq.h>
30 #include <linux/serial_core.h>
31 #include <linux/serial_8250.h>
37 static struct resource jz4740_usb_ohci_resources[] = {
39 .start = JZ4740_UHC_BASE_ADDR,
40 .end = JZ4740_UHC_BASE_ADDR + 0x1000 - 1,
41 .flags = IORESOURCE_MEM,
44 .start = JZ4740_IRQ_UHC,
45 .end = JZ4740_IRQ_UHC,
46 .flags = IORESOURCE_IRQ,
50 struct platform_device jz4740_usb_ohci_device = {
51 .name = "jz4740-ohci",
54 .dma_mask = &jz4740_usb_ohci_device.dev.coherent_dma_mask,
55 .coherent_dma_mask = DMA_BIT_MASK(32),
57 .num_resources = ARRAY_SIZE(jz4740_usb_ohci_resources),
58 .resource = jz4740_usb_ohci_resources,
61 /* USB Device Controller */
62 struct platform_device jz4740_udc_xceiv_device = {
63 .name = "usb_phy_generic",
67 static struct resource jz4740_udc_resources[] = {
69 .start = JZ4740_UDC_BASE_ADDR,
70 .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
71 .flags = IORESOURCE_MEM,
74 .start = JZ4740_IRQ_UDC,
75 .end = JZ4740_IRQ_UDC,
76 .flags = IORESOURCE_IRQ,
81 struct platform_device jz4740_udc_device = {
82 .name = "musb-jz4740",
85 .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
88 .num_resources = ARRAY_SIZE(jz4740_udc_resources),
89 .resource = jz4740_udc_resources,
92 /* MMC/SD controller */
93 static struct resource jz4740_mmc_resources[] = {
95 .start = JZ4740_MSC_BASE_ADDR,
96 .end = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
97 .flags = IORESOURCE_MEM,
100 .start = JZ4740_IRQ_MSC,
101 .end = JZ4740_IRQ_MSC,
102 .flags = IORESOURCE_IRQ,
106 struct platform_device jz4740_mmc_device = {
107 .name = "jz4740-mmc",
110 .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask,
111 .coherent_dma_mask = DMA_BIT_MASK(32),
113 .num_resources = ARRAY_SIZE(jz4740_mmc_resources),
114 .resource = jz4740_mmc_resources,
118 static struct resource jz4740_rtc_resources[] = {
120 .start = JZ4740_RTC_BASE_ADDR,
121 .end = JZ4740_RTC_BASE_ADDR + 0x38 - 1,
122 .flags = IORESOURCE_MEM,
125 .start = JZ4740_IRQ_RTC,
126 .end = JZ4740_IRQ_RTC,
127 .flags = IORESOURCE_IRQ,
131 struct platform_device jz4740_rtc_device = {
132 .name = "jz4740-rtc",
134 .num_resources = ARRAY_SIZE(jz4740_rtc_resources),
135 .resource = jz4740_rtc_resources,
139 static struct resource jz4740_i2c_resources[] = {
141 .start = JZ4740_I2C_BASE_ADDR,
142 .end = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
143 .flags = IORESOURCE_MEM,
146 .start = JZ4740_IRQ_I2C,
147 .end = JZ4740_IRQ_I2C,
148 .flags = IORESOURCE_IRQ,
152 struct platform_device jz4740_i2c_device = {
153 .name = "jz4740-i2c",
155 .num_resources = ARRAY_SIZE(jz4740_i2c_resources),
156 .resource = jz4740_i2c_resources,
159 /* NAND controller */
160 static struct resource jz4740_nand_resources[] = {
163 .start = JZ4740_EMC_BASE_ADDR,
164 .end = JZ4740_EMC_BASE_ADDR + 0x1000 - 1,
165 .flags = IORESOURCE_MEM,
170 .end = 0x180C0000 - 1,
171 .flags = IORESOURCE_MEM,
176 .end = 0x140C0000 - 1,
177 .flags = IORESOURCE_MEM,
182 .end = 0x0C0C0000 - 1,
183 .flags = IORESOURCE_MEM,
188 .end = 0x080C0000 - 1,
189 .flags = IORESOURCE_MEM,
193 struct platform_device jz4740_nand_device = {
194 .name = "jz4740-nand",
195 .num_resources = ARRAY_SIZE(jz4740_nand_resources),
196 .resource = jz4740_nand_resources,
200 static struct resource jz4740_framebuffer_resources[] = {
202 .start = JZ4740_LCD_BASE_ADDR,
203 .end = JZ4740_LCD_BASE_ADDR + 0x1000 - 1,
204 .flags = IORESOURCE_MEM,
208 struct platform_device jz4740_framebuffer_device = {
211 .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources),
212 .resource = jz4740_framebuffer_resources,
214 .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask,
215 .coherent_dma_mask = DMA_BIT_MASK(32),
220 static struct resource jz4740_i2s_resources[] = {
222 .start = JZ4740_AIC_BASE_ADDR,
223 .end = JZ4740_AIC_BASE_ADDR + 0x38 - 1,
224 .flags = IORESOURCE_MEM,
228 struct platform_device jz4740_i2s_device = {
229 .name = "jz4740-i2s",
231 .num_resources = ARRAY_SIZE(jz4740_i2s_resources),
232 .resource = jz4740_i2s_resources,
236 struct platform_device jz4740_pcm_device = {
237 .name = "jz4740-pcm-audio",
242 static struct resource jz4740_codec_resources[] = {
244 .start = JZ4740_AIC_BASE_ADDR + 0x80,
245 .end = JZ4740_AIC_BASE_ADDR + 0x88 - 1,
246 .flags = IORESOURCE_MEM,
250 struct platform_device jz4740_codec_device = {
251 .name = "jz4740-codec",
253 .num_resources = ARRAY_SIZE(jz4740_codec_resources),
254 .resource = jz4740_codec_resources,
258 static struct resource jz4740_adc_resources[] = {
260 .start = JZ4740_SADC_BASE_ADDR,
261 .end = JZ4740_SADC_BASE_ADDR + 0x30,
262 .flags = IORESOURCE_MEM,
265 .start = JZ4740_IRQ_SADC,
266 .end = JZ4740_IRQ_SADC,
267 .flags = IORESOURCE_IRQ,
270 .start = JZ4740_IRQ_ADC_BASE,
271 .end = JZ4740_IRQ_ADC_BASE,
272 .flags = IORESOURCE_IRQ,
276 struct platform_device jz4740_adc_device = {
277 .name = "jz4740-adc",
279 .num_resources = ARRAY_SIZE(jz4740_adc_resources),
280 .resource = jz4740_adc_resources,
284 #define JZ4740_UART_DATA(_id) \
286 .flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE, \
287 .iotype = UPIO_MEM, \
289 .serial_out = jz4740_serial_out, \
290 .type = PORT_16550, \
291 .mapbase = JZ4740_UART ## _id ## _BASE_ADDR, \
292 .irq = JZ4740_IRQ_UART ## _id, \
295 static struct plat_serial8250_port jz4740_uart_data[] = {
301 static struct platform_device jz4740_uart_device = {
302 .name = "serial8250",
305 .platform_data = jz4740_uart_data,
309 void jz4740_serial_device_register(void)
311 struct plat_serial8250_port *p;
313 unsigned long ext_rate;
315 ext_clk = clk_get(NULL, "ext");
317 panic("unable to get ext clock");
318 ext_rate = clk_get_rate(ext_clk);
321 for (p = jz4740_uart_data; p->flags != 0; ++p)
322 p->uartclk = ext_rate;
324 platform_device_register(&jz4740_uart_device);
328 static struct resource jz4740_wdt_resources[] = {
330 .start = JZ4740_WDT_BASE_ADDR,
331 .end = JZ4740_WDT_BASE_ADDR + 0x10 - 1,
332 .flags = IORESOURCE_MEM,
336 struct platform_device jz4740_wdt_device = {
337 .name = "jz4740-wdt",
339 .num_resources = ARRAY_SIZE(jz4740_wdt_resources),
340 .resource = jz4740_wdt_resources,
344 struct platform_device jz4740_pwm_device = {
345 .name = "jz4740-pwm",
350 static struct resource jz4740_dma_resources[] = {
352 .start = JZ4740_DMAC_BASE_ADDR,
353 .end = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
354 .flags = IORESOURCE_MEM,
357 .start = JZ4740_IRQ_DMAC,
358 .end = JZ4740_IRQ_DMAC,
359 .flags = IORESOURCE_IRQ,
363 struct platform_device jz4740_dma_device = {
364 .name = "jz4740-dma",
366 .num_resources = ARRAY_SIZE(jz4740_dma_resources),
367 .resource = jz4740_dma_resources,