MIPS: JZ4740: Call jz4740_clock_init earlier
[firefly-linux-kernel-4.4.55.git] / arch / mips / jz4740 / time.c
1 /*
2  *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
3  *  JZ4740 platform time support
4  *
5  *  This program is free software; you can redistribute it and/or modify it
6  *  under  the terms of the GNU General  Public License as published by the
7  *  Free Software Foundation;  either version 2 of the License, or (at your
8  *  option) any later version.
9  *
10  *  You should have received a copy of the GNU General Public License along
11  *  with this program; if not, write to the Free Software Foundation, Inc.,
12  *  675 Mass Ave, Cambridge, MA 02139, USA.
13  *
14  */
15
16 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <linux/time.h>
19
20 #include <linux/clockchips.h>
21 #include <linux/sched_clock.h>
22
23 #include <asm/mach-jz4740/clock.h>
24 #include <asm/mach-jz4740/irq.h>
25 #include <asm/mach-jz4740/timer.h>
26 #include <asm/time.h>
27
28 #include "clock.h"
29
30 #define TIMER_CLOCKEVENT 0
31 #define TIMER_CLOCKSOURCE 1
32
33 static uint16_t jz4740_jiffies_per_tick;
34
35 static cycle_t jz4740_clocksource_read(struct clocksource *cs)
36 {
37         return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
38 }
39
40 static struct clocksource jz4740_clocksource = {
41         .name = "jz4740-timer",
42         .rating = 200,
43         .read = jz4740_clocksource_read,
44         .mask = CLOCKSOURCE_MASK(16),
45         .flags = CLOCK_SOURCE_IS_CONTINUOUS,
46 };
47
48 static u64 notrace jz4740_read_sched_clock(void)
49 {
50         return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
51 }
52
53 static irqreturn_t jz4740_clockevent_irq(int irq, void *devid)
54 {
55         struct clock_event_device *cd = devid;
56
57         jz4740_timer_ack_full(TIMER_CLOCKEVENT);
58
59         if (cd->mode != CLOCK_EVT_MODE_PERIODIC)
60                 jz4740_timer_disable(TIMER_CLOCKEVENT);
61
62         cd->event_handler(cd);
63
64         return IRQ_HANDLED;
65 }
66
67 static void jz4740_clockevent_set_mode(enum clock_event_mode mode,
68         struct clock_event_device *cd)
69 {
70         switch (mode) {
71         case CLOCK_EVT_MODE_PERIODIC:
72                 jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
73                 jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
74         case CLOCK_EVT_MODE_RESUME:
75                 jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
76                 jz4740_timer_enable(TIMER_CLOCKEVENT);
77                 break;
78         case CLOCK_EVT_MODE_ONESHOT:
79         case CLOCK_EVT_MODE_SHUTDOWN:
80                 jz4740_timer_disable(TIMER_CLOCKEVENT);
81                 break;
82         default:
83                 break;
84         }
85 }
86
87 static int jz4740_clockevent_set_next(unsigned long evt,
88         struct clock_event_device *cd)
89 {
90         jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
91         jz4740_timer_set_period(TIMER_CLOCKEVENT, evt);
92         jz4740_timer_enable(TIMER_CLOCKEVENT);
93
94         return 0;
95 }
96
97 static struct clock_event_device jz4740_clockevent = {
98         .name = "jz4740-timer",
99         .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
100         .set_next_event = jz4740_clockevent_set_next,
101         .set_mode = jz4740_clockevent_set_mode,
102         .rating = 200,
103         .irq = JZ4740_IRQ_TCU0,
104 };
105
106 static struct irqaction timer_irqaction = {
107         .handler        = jz4740_clockevent_irq,
108         .flags          = IRQF_PERCPU | IRQF_TIMER,
109         .name           = "jz4740-timerirq",
110         .dev_id         = &jz4740_clockevent,
111 };
112
113 void __init plat_time_init(void)
114 {
115         int ret;
116         uint32_t clk_rate;
117         uint16_t ctrl;
118
119         jz4740_clock_init();
120         jz4740_timer_init();
121
122         clk_rate = jz4740_clock_bdata.ext_rate >> 4;
123         jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
124
125         clockevent_set_clock(&jz4740_clockevent, clk_rate);
126         jz4740_clockevent.min_delta_ns = clockevent_delta2ns(100, &jz4740_clockevent);
127         jz4740_clockevent.max_delta_ns = clockevent_delta2ns(0xffff, &jz4740_clockevent);
128         jz4740_clockevent.cpumask = cpumask_of(0);
129
130         clockevents_register_device(&jz4740_clockevent);
131
132         ret = clocksource_register_hz(&jz4740_clocksource, clk_rate);
133
134         if (ret)
135                 printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
136
137         sched_clock_register(jz4740_read_sched_clock, 16, clk_rate);
138
139         setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
140
141         ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT;
142
143         jz4740_timer_set_ctrl(TIMER_CLOCKEVENT, ctrl);
144         jz4740_timer_set_ctrl(TIMER_CLOCKSOURCE, ctrl);
145
146         jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
147         jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
148
149         jz4740_timer_set_period(TIMER_CLOCKSOURCE, 0xffff);
150
151         jz4740_timer_enable(TIMER_CLOCKEVENT);
152         jz4740_timer_enable(TIMER_CLOCKSOURCE);
153 }