1 #include <linux/highmem.h>
2 #include <linux/kdebug.h>
3 #include <linux/types.h>
4 #include <linux/notifier.h>
5 #include <linux/sched.h>
6 #include <linux/uprobes.h>
8 #include <asm/branch.h>
9 #include <asm/cpu-features.h>
10 #include <asm/ptrace.h>
13 static inline int insn_has_delay_slot(const union mips_instruction insn)
15 switch (insn.i_format.opcode) {
17 * jr and jalr are in r_format format.
20 switch (insn.r_format.func) {
28 * This group contains:
29 * bltz_op, bgez_op, bltzl_op, bgezl_op,
30 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
33 switch (insn.i_format.rt) {
48 * These are unconditional and in j_format.
56 case blez_op: /* not really i_format */
63 * And now the FPA/cp1 branch instructions.
66 #ifdef CONFIG_CPU_CAVIUM_OCTEON
67 case lwc2_op: /* This is bbit0 on Octeon */
68 case ldc2_op: /* This is bbit032 on Octeon */
69 case swc2_op: /* This is bbit1 on Octeon */
70 case sdc2_op: /* This is bbit132 on Octeon */
79 * arch_uprobe_analyze_insn - instruction analysis including validity and fixups.
80 * @mm: the probed address space.
81 * @arch_uprobe: the probepoint information.
82 * @addr: virtual address at which to install the probepoint
83 * Return 0 on success or a -ve number on error.
85 int arch_uprobe_analyze_insn(struct arch_uprobe *aup,
86 struct mm_struct *mm, unsigned long addr)
88 union mips_instruction inst;
91 * For the time being this also blocks attempts to use uprobes with
92 * MIPS16 and microMIPS.
97 inst.word = aup->insn[0];
98 aup->ixol[0] = aup->insn[insn_has_delay_slot(inst)];
99 aup->ixol[1] = UPROBE_BRK_UPROBE_XOL; /* NOP */
105 * is_trap_insn - check if the instruction is a trap variant
106 * @insn: instruction to be checked.
107 * Returns true if @insn is a trap variant.
109 * This definition overrides the weak definition in kernel/events/uprobes.c.
110 * and is needed for the case where an architecture has multiple trap
111 * instructions (like PowerPC or MIPS). We treat BREAK just like the more
112 * modern conditional trap instructions.
114 bool is_trap_insn(uprobe_opcode_t *insn)
116 union mips_instruction inst;
120 switch (inst.i_format.opcode) {
122 switch (inst.r_format.func) {
134 case bcond_op: /* Yes, really ... */
135 switch (inst.u_format.rt) {
150 #define UPROBE_TRAP_NR ULONG_MAX
153 * arch_uprobe_pre_xol - prepare to execute out of line.
154 * @auprobe: the probepoint information.
155 * @regs: reflects the saved user state of current task.
157 int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs)
159 struct uprobe_task *utask = current->utask;
162 * Now find the EPC where to resume after the breakpoint has been
163 * dealt with. This may require emulation of a branch.
165 aup->resume_epc = regs->cp0_epc + 4;
166 if (insn_has_delay_slot((union mips_instruction) aup->insn[0])) {
170 __compute_return_epc_for_insn(regs,
171 (union mips_instruction) aup->insn[0]);
172 aup->resume_epc = regs->cp0_epc;
174 utask->autask.saved_trap_nr = current->thread.trap_nr;
175 current->thread.trap_nr = UPROBE_TRAP_NR;
176 regs->cp0_epc = current->utask->xol_vaddr;
181 int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs)
183 struct uprobe_task *utask = current->utask;
185 current->thread.trap_nr = utask->autask.saved_trap_nr;
186 regs->cp0_epc = aup->resume_epc;
192 * If xol insn itself traps and generates a signal(Say,
193 * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped
194 * instruction jumps back to its own address. It is assumed that anything
195 * like do_page_fault/do_trap/etc sets thread.trap_nr != -1.
197 * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
198 * arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
199 * UPROBE_TRAP_NR == -1 set by arch_uprobe_pre_xol().
201 bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
203 if (tsk->thread.trap_nr != UPROBE_TRAP_NR)
209 int arch_uprobe_exception_notify(struct notifier_block *self,
210 unsigned long val, void *data)
212 struct die_args *args = data;
213 struct pt_regs *regs = args->regs;
215 /* regs == NULL is a kernel bug */
219 /* We are only interested in userspace traps */
220 if (!user_mode(regs))
225 if (uprobe_pre_sstep_notifier(regs))
229 if (uprobe_post_sstep_notifier(regs))
239 * This function gets called when XOL instruction either gets trapped or
240 * the thread has a fatal signal. Reset the instruction pointer to its
241 * probed address for the potential restart or for post mortem analysis.
243 void arch_uprobe_abort_xol(struct arch_uprobe *aup,
244 struct pt_regs *regs)
246 struct uprobe_task *utask = current->utask;
248 instruction_pointer_set(regs, utask->vaddr);
251 unsigned long arch_uretprobe_hijack_return_addr(
252 unsigned long trampoline_vaddr, struct pt_regs *regs)
258 /* Replace the return address with the trampoline address */
259 regs->regs[31] = trampoline_vaddr;
265 * set_swbp - store breakpoint at a given address.
266 * @auprobe: arch specific probepoint information.
267 * @mm: the probed process address space.
268 * @vaddr: the virtual address to insert the opcode.
270 * For mm @mm, store the breakpoint instruction at @vaddr.
271 * Return 0 (success) or a negative errno.
273 * This version overrides the weak version in kernel/events/uprobes.c.
274 * It is required to handle MIPS16 and microMIPS.
276 int __weak set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm,
279 return uprobe_write_opcode(mm, vaddr, UPROBE_SWBP_INSN);
282 void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
283 void *src, unsigned long len)
287 /* Initialize the slot */
288 kaddr = kmap_atomic(page);
289 memcpy(kaddr + (vaddr & ~PAGE_MASK), src, len);
290 kunmap_atomic(kaddr);
293 * The MIPS version of flush_icache_range will operate safely on
294 * user space addresses and more importantly, it doesn't require a
297 flush_icache_range(vaddr, vaddr + len);
301 * uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
302 * @regs: Reflects the saved state of the task after it has hit a breakpoint
304 * Return the address of the breakpoint instruction.
306 * This overrides the weak version in kernel/events/uprobes.c.
308 unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
310 return instruction_pointer(regs);
314 * See if the instruction can be emulated.
315 * Returns true if instruction was emulated, false otherwise.
317 * For now we always emulate so this function just returns 0.
319 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)