2 * Just-In-Time compiler for BPF filters on MIPS
4 * Copyright (c) 2014 Imagination Technologies Ltd.
5 * Author: Markos Chandras <markos.chandras@imgtec.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2 of the License.
12 #ifndef BPF_JIT_MIPS_OP_H
13 #define BPF_JIT_MIPS_OP_H
15 /* Registers used by JIT */
36 /* Conditional codes */
37 #define MIPS_COND_EQ 0x1
38 #define MIPS_COND_GE (0x1 << 1)
39 #define MIPS_COND_GT (0x1 << 2)
40 #define MIPS_COND_NE (0x1 << 3)
41 #define MIPS_COND_ALL (0x1 << 4)
42 /* Conditionals on X register or K immediate */
43 #define MIPS_COND_X (0x1 << 5)
44 #define MIPS_COND_K (0x1 << 6)
46 /* ABI specific return values */
47 #ifdef CONFIG_32BIT /* O32 */
48 #ifdef CONFIG_CPU_LITTLE_ENDIAN
49 #define r_err MIPS_R_V1
50 #define r_val MIPS_R_V0
51 #else /* CONFIG_CPU_LITTLE_ENDIAN */
52 #define r_err MIPS_R_V0
53 #define r_val MIPS_R_V1
56 #define r_err MIPS_R_V0
57 #define r_val MIPS_R_V0
60 #define r_ret MIPS_R_V0
63 * Use 2 scratch registers to avoid pipeline interlocks.
64 * There is no overhead during epilogue and prologue since
65 * any of the $s0-$s6 registers will only be preserved if
66 * they are going to actually be used.
68 #define r_off MIPS_R_S2
71 #define r_skb MIPS_R_S5
73 #define r_s0 MIPS_R_T4 /* scratch reg 1 */
74 #define r_s1 MIPS_R_T5 /* scratch reg 2 */
75 #define r_tmp_imm MIPS_R_T6 /* No need to preserve this */
76 #define r_tmp MIPS_R_T7 /* No need to preserve this */
77 #define r_zero MIPS_R_ZERO
78 #define r_sp MIPS_R_SP
79 #define r_ra MIPS_R_RA
81 #endif /* BPF_JIT_MIPS_OP_H */