2 * Loongson2 performance counter driver for oprofile
4 * Copyright (C) 2009 Lemote Inc.
5 * Author: Yanhua <yanh@lemote.com>
6 * Author: Wu Zhangjin <wuzhangjin@gmail.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/oprofile.h>
15 #include <linux/interrupt.h>
17 #include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */
21 * a patch should be sent to oprofile with the loongson-specific support.
22 * otherwise, the oprofile tool will not recognize this and complain about
23 * "cpu_type 'unset' is not valid".
25 #define LOONGSON2_CPU_TYPE "mips/loongson2"
27 #define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5)
28 #define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9)
30 #define LOONGSON2_PERFCNT_EXL (1UL << 0)
31 #define LOONGSON2_PERFCNT_KERNEL (1UL << 1)
32 #define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2)
33 #define LOONGSON2_PERFCNT_USER (1UL << 3)
34 #define LOONGSON2_PERFCNT_INT_EN (1UL << 4)
35 #define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
37 /* Loongson2 performance counter register */
38 #define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
39 #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
40 #define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
41 #define write_c0_perfcnt(val) __write_64bit_c0_register($25, 0, val)
43 static struct loongson2_register_config {
45 unsigned long long reset_counter1;
46 unsigned long long reset_counter2;
47 int cnt1_enabled, cnt2_enabled;
50 static DEFINE_SPINLOCK(sample_lock);
52 static char *oprofid = "LoongsonPerf";
53 static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
54 /* Compute all of the registers in preparation for enabling profiling. */
56 static void loongson2_reg_setup(struct op_counter_config *cfg)
58 unsigned int ctrl = 0;
60 reg.reset_counter1 = 0;
61 reg.reset_counter2 = 0;
62 /* Compute the performance counter ctrl word. */
63 /* For now count kernel and user mode */
65 ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event);
66 reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
70 ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event);
71 reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
74 if (cfg[0].enabled || cfg[1].enabled) {
75 ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN;
76 if (cfg[0].kernel || cfg[1].kernel)
77 ctrl |= LOONGSON2_PERFCNT_KERNEL;
78 if (cfg[0].user || cfg[1].user)
79 ctrl |= LOONGSON2_PERFCNT_USER;
84 reg.cnt1_enabled = cfg[0].enabled;
85 reg.cnt2_enabled = cfg[1].enabled;
89 /* Program all of the registers in preparation for enabling profiling. */
91 static void loongson2_cpu_setup(void *args)
95 perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1;
96 write_c0_perfcnt(perfcount);
99 static void loongson2_cpu_start(void *args)
101 /* Start all counters on current CPU */
102 if (reg.cnt1_enabled || reg.cnt2_enabled)
103 write_c0_perfctrl(reg.ctrl);
106 static void loongson2_cpu_stop(void *args)
108 /* Stop all counters on current CPU */
109 write_c0_perfctrl(0);
110 memset(®, 0, sizeof(reg));
113 static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
115 uint64_t counter, counter1, counter2;
116 struct pt_regs *regs = get_irq_regs();
121 * LOONGSON2 defines two 32-bit performance counters.
122 * To avoid a race updating the registers we need to stop the counters
123 * while we're messing with
127 /* Check whether the irq belongs to me */
128 enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN;
131 enabled = reg.cnt1_enabled | reg.cnt2_enabled;
135 counter = read_c0_perfcnt();
136 counter1 = counter & 0xffffffff;
137 counter2 = counter >> 32;
139 spin_lock_irqsave(&sample_lock, flags);
141 if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
142 if (reg.cnt1_enabled)
143 oprofile_add_sample(regs, 0);
144 counter1 = reg.reset_counter1;
146 if (counter2 & LOONGSON2_PERFCNT_OVERFLOW) {
147 if (reg.cnt2_enabled)
148 oprofile_add_sample(regs, 1);
149 counter2 = reg.reset_counter2;
152 spin_unlock_irqrestore(&sample_lock, flags);
154 write_c0_perfcnt((counter2 << 32) | counter1);
159 static int __init loongson2_init(void)
161 return request_irq(LOONGSON2_PERFCNT_IRQ, loongson2_perfcount_handler,
162 IRQF_SHARED, "Perfcounter", oprofid);
165 static void loongson2_exit(void)
167 write_c0_perfctrl(0);
168 free_irq(LOONGSON2_PERFCNT_IRQ, oprofid);
171 struct op_mips_model op_model_loongson2_ops = {
172 .reg_setup = loongson2_reg_setup,
173 .cpu_setup = loongson2_cpu_setup,
174 .init = loongson2_init,
175 .exit = loongson2_exit,
176 .cpu_start = loongson2_cpu_start,
177 .cpu_stop = loongson2_cpu_stop,
178 .cpu_type = LOONGSON2_CPU_TYPE,