2 * Miscellaneous functions for IDT EB434 board
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
6 * Copyright 2007 Florian Fainelli <florian@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <linux/kernel.h>
30 #include <linux/init.h>
31 #include <linux/types.h>
32 #include <linux/spinlock.h>
33 #include <linux/platform_device.h>
34 #include <linux/gpio.h>
36 #include <asm/mach-rc32434/rb.h>
37 #include <asm/mach-rc32434/gpio.h>
39 struct rb532_gpio_chip {
40 struct gpio_chip chip;
41 void __iomem *regbase;
44 static struct resource rb532_gpio_reg0_res[] = {
47 .start = REGBASE + GPIOBASE,
48 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
49 .flags = IORESOURCE_MEM,
53 void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
59 spin_lock_irqsave(&dev3.lock, flags);
61 data = readl(IDT434_REG_BASE + reg_offs);
62 for (i = 0; i != len; ++i) {
64 data |= (1 << (i + bit));
66 data &= ~(1 << (i + bit));
68 writel(data, (IDT434_REG_BASE + reg_offs));
70 spin_unlock_irqrestore(&dev3.lock, flags);
72 EXPORT_SYMBOL(set_434_reg);
74 unsigned get_434_reg(unsigned reg_offs)
76 return readl(IDT434_REG_BASE + reg_offs);
78 EXPORT_SYMBOL(get_434_reg);
80 /* rb532_set_bit - sanely set a bit
82 * bitval: new value for the bit
83 * offset: bit index in the 4 byte address range
84 * ioaddr: 4 byte aligned address being altered
86 static inline void rb532_set_bit(unsigned bitval,
87 unsigned offset, void __iomem *ioaddr)
92 local_irq_save(flags);
95 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */
96 val |= (!!bitval << offset); /* set bit if bitval == 1 */
99 local_irq_restore(flags);
102 /* rb532_get_bit - read a bit
104 * returns the boolean state of the bit, which may be > 1
106 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
108 return (readl(ioaddr) & (1 << offset));
112 * Return GPIO level */
113 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
115 struct rb532_gpio_chip *gpch;
117 gpch = container_of(chip, struct rb532_gpio_chip, chip);
118 return rb532_get_bit(offset, gpch->regbase + GPIOD);
122 * Set output GPIO level
124 static void rb532_gpio_set(struct gpio_chip *chip,
125 unsigned offset, int value)
127 struct rb532_gpio_chip *gpch;
129 gpch = container_of(chip, struct rb532_gpio_chip, chip);
130 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
134 * Set GPIO direction to input
136 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
138 struct rb532_gpio_chip *gpch;
140 gpch = container_of(chip, struct rb532_gpio_chip, chip);
142 /* disable alternate function in case it's set */
143 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
145 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
150 * Set GPIO direction to output
152 static int rb532_gpio_direction_output(struct gpio_chip *chip,
153 unsigned offset, int value)
155 struct rb532_gpio_chip *gpch;
157 gpch = container_of(chip, struct rb532_gpio_chip, chip);
159 /* disable alternate function in case it's set */
160 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
162 /* set the initial output value */
163 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
165 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
169 static struct rb532_gpio_chip rb532_gpio_chip[] = {
173 .direction_input = rb532_gpio_direction_input,
174 .direction_output = rb532_gpio_direction_output,
175 .get = rb532_gpio_get,
176 .set = rb532_gpio_set,
184 * Set GPIO interrupt level
186 void rb532_gpio_set_ilevel(int bit, unsigned gpio)
188 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
190 EXPORT_SYMBOL(rb532_gpio_set_ilevel);
193 * Set GPIO interrupt status
195 void rb532_gpio_set_istat(int bit, unsigned gpio)
197 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT);
199 EXPORT_SYMBOL(rb532_gpio_set_istat);
202 * Configure GPIO alternate function
204 static void rb532_gpio_set_func(int bit, unsigned gpio)
206 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
209 int __init rb532_gpio_init(void)
213 r = rb532_gpio_reg0_res;
214 rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start);
216 if (!rb532_gpio_chip->regbase) {
217 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
221 /* Register our GPIO chip */
222 gpiochip_add(&rb532_gpio_chip->chip);
226 arch_initcall(rb532_gpio_init);