2 * Miscellaneous functions for IDT EB434 board
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
6 * Copyright 2007 Florian Fainelli <florian@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <linux/kernel.h>
30 #include <linux/init.h>
31 #include <linux/types.h>
32 #include <linux/spinlock.h>
33 #include <linux/platform_device.h>
34 #include <linux/gpio.h>
36 #include <asm/mach-rc32434/rb.h>
37 #include <asm/mach-rc32434/gpio.h>
39 struct rb532_gpio_chip {
40 struct gpio_chip chip;
41 void __iomem *regbase;
44 struct mpmc_device dev3;
46 static struct resource rb532_gpio_reg0_res[] = {
49 .start = REGBASE + GPIOBASE,
50 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
51 .flags = IORESOURCE_MEM,
55 static struct resource rb532_dev3_ctl_res[] = {
58 .flags = IORESOURCE_MEM,
62 void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
68 spin_lock_irqsave(&dev3.lock, flags);
70 data = readl(IDT434_REG_BASE + reg_offs);
71 for (i = 0; i != len; ++i) {
73 data |= (1 << (i + bit));
75 data &= ~(1 << (i + bit));
77 writel(data, (IDT434_REG_BASE + reg_offs));
79 spin_unlock_irqrestore(&dev3.lock, flags);
81 EXPORT_SYMBOL(set_434_reg);
83 unsigned get_434_reg(unsigned reg_offs)
85 return readl(IDT434_REG_BASE + reg_offs);
87 EXPORT_SYMBOL(get_434_reg);
89 void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
93 spin_lock_irqsave(&dev3.lock, flags);
95 dev3.state = (dev3.state | or_mask) & ~nand_mask;
96 writel(dev3.state, &dev3.base);
98 spin_unlock_irqrestore(&dev3.lock, flags);
100 EXPORT_SYMBOL(set_latch_u5);
102 unsigned char get_latch_u5(void)
106 EXPORT_SYMBOL(get_latch_u5);
108 /* rb532_set_bit - sanely set a bit
110 * bitval: new value for the bit
111 * offset: bit index in the 4 byte address range
112 * ioaddr: 4 byte aligned address being altered
114 static inline void rb532_set_bit(unsigned bitval,
115 unsigned offset, void __iomem *ioaddr)
120 local_irq_save(flags);
123 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */
124 val |= (!!bitval << offset); /* set bit if bitval == 1 */
127 local_irq_restore(flags);
130 /* rb532_get_bit - read a bit
132 * returns the boolean state of the bit, which may be > 1
134 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
136 return (readl(ioaddr) & (1 << offset));
140 * Return GPIO level */
141 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
143 struct rb532_gpio_chip *gpch;
145 gpch = container_of(chip, struct rb532_gpio_chip, chip);
146 return rb532_get_bit(offset, gpch->regbase + GPIOD);
150 * Set output GPIO level
152 static void rb532_gpio_set(struct gpio_chip *chip,
153 unsigned offset, int value)
155 struct rb532_gpio_chip *gpch;
157 gpch = container_of(chip, struct rb532_gpio_chip, chip);
158 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
162 * Set GPIO direction to input
164 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
166 struct rb532_gpio_chip *gpch;
168 gpch = container_of(chip, struct rb532_gpio_chip, chip);
170 /* disable alternate function in case it's set */
171 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
173 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
178 * Set GPIO direction to output
180 static int rb532_gpio_direction_output(struct gpio_chip *chip,
181 unsigned offset, int value)
183 struct rb532_gpio_chip *gpch;
185 gpch = container_of(chip, struct rb532_gpio_chip, chip);
187 /* disable alternate function in case it's set */
188 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
190 /* set the initial output value */
191 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
193 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
197 static struct rb532_gpio_chip rb532_gpio_chip[] = {
201 .direction_input = rb532_gpio_direction_input,
202 .direction_output = rb532_gpio_direction_output,
203 .get = rb532_gpio_get,
204 .set = rb532_gpio_set,
212 * Set GPIO interrupt level
214 void rb532_gpio_set_ilevel(int bit, unsigned gpio)
216 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
218 EXPORT_SYMBOL(rb532_gpio_set_ilevel);
221 * Set GPIO interrupt status
223 void rb532_gpio_set_istat(int bit, unsigned gpio)
225 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT);
227 EXPORT_SYMBOL(rb532_gpio_set_istat);
230 * Configure GPIO alternate function
232 static void rb532_gpio_set_func(int bit, unsigned gpio)
234 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
237 int __init rb532_gpio_init(void)
241 r = rb532_gpio_reg0_res;
242 rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start);
244 if (!rb532_gpio_chip->regbase) {
245 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
249 /* Register our GPIO chip */
250 gpiochip_add(&rb532_gpio_chip->chip);
252 rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
253 rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
255 r = rb532_dev3_ctl_res;
256 dev3.base = ioremap_nocache(r->start, r->end - r->start);
259 printk(KERN_ERR "rb532: cannot remap device controller 3\n");
265 arch_initcall(rb532_gpio_init);