arch/mn10300/kernel/mn10300-serial.c

   1 /* MN10300 On-chip serial port UART driver
   2  *
   3  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public Licence
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the Licence, or (at your option) any later version.
  10  */
  11
  12 static const char serial_name[] = "MN10300 Serial driver";
  13 static const char serial_version[] = "mn10300_serial-1.0";
  14 static const char serial_revdate[] = "2007-11-06";
  15
  16 #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  17 #define SUPPORT_SYSRQ
  18 #endif
  19
  20 #include <linux/module.h>
  21 #include <linux/serial.h>
  22 #include <linux/circ_buf.h>
  23 #include <linux/errno.h>
  24 #include <linux/signal.h>
  25 #include <linux/sched.h>
  26 #include <linux/timer.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/tty.h>
  29 #include <linux/tty_flip.h>
  30 #include <linux/major.h>
  31 #include <linux/string.h>
  32 #include <linux/ioport.h>
  33 #include <linux/mm.h>
  34 #include <linux/slab.h>
  35 #include <linux/init.h>
  36 #include <linux/console.h>
  37 #include <linux/sysrq.h>
  38
  39 #include <asm/io.h>
  40 #include <asm/irq.h>
  41 #include <asm/bitops.h>
  42 #include <asm/serial-regs.h>
  43 #include <unit/timex.h>
  44 #include "mn10300-serial.h"
  45
  46 #ifdef CONFIG_SMP
  47 #undef  GxICR
  48 #define GxICR(X) CROSS_GxICR(X, 0)
  49 #endif /* CONFIG_SMP */
  50
  51 #define kenter(FMT, ...) \
  52         printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  53 #define _enter(FMT, ...) \
  54         no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  55 #define kdebug(FMT, ...) \
  56         printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  57 #define _debug(FMT, ...) \
  58         no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  59 #define kproto(FMT, ...) \
  60         printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  61 #define _proto(FMT, ...) \
  62         no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  63
  64 #ifndef CODMSB
  65 /* c_cflag bit meaning */
  66 #define CODMSB  004000000000    /* change Transfer bit-order */
  67 #endif
  68
  69 #define NR_UARTS 3
  70
  71 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  72 static void mn10300_serial_console_write(struct console *co,
  73                                            const char *s, unsigned count);
  74 static int __init mn10300_serial_console_setup(struct console *co,
  75                                                  char *options);
  76
  77 static struct uart_driver mn10300_serial_driver;
  78 static struct console mn10300_serial_console = {
  79         .name           = "ttySM",
  80         .write          = mn10300_serial_console_write,
  81         .device         = uart_console_device,
  82         .setup          = mn10300_serial_console_setup,
  83         .flags          = CON_PRINTBUFFER,
  84         .index          = -1,
  85         .data           = &mn10300_serial_driver,
  86 };
  87 #endif
  88
  89 static struct uart_driver mn10300_serial_driver = {
  90         .owner          = NULL,
  91         .driver_name    = "mn10300-serial",
  92         .dev_name       = "ttySM",
  93         .major          = TTY_MAJOR,
  94         .minor          = 128,
  95         .nr             = NR_UARTS,
  96 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  97         .cons           = &mn10300_serial_console,
  98 #endif
  99 };
 100
 101 static unsigned int mn10300_serial_tx_empty(struct uart_port *);
 102 static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
 103 static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
 104 static void mn10300_serial_stop_tx(struct uart_port *);
 105 static void mn10300_serial_start_tx(struct uart_port *);
 106 static void mn10300_serial_send_xchar(struct uart_port *, char ch);
 107 static void mn10300_serial_stop_rx(struct uart_port *);
 108 static void mn10300_serial_enable_ms(struct uart_port *);
 109 static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
 110 static int mn10300_serial_startup(struct uart_port *);
 111 static void mn10300_serial_shutdown(struct uart_port *);
 112 static void mn10300_serial_set_termios(struct uart_port *,
 113                                          struct ktermios *new,
 114                                          struct ktermios *old);
 115 static const char *mn10300_serial_type(struct uart_port *);
 116 static void mn10300_serial_release_port(struct uart_port *);
 117 static int mn10300_serial_request_port(struct uart_port *);
 118 static void mn10300_serial_config_port(struct uart_port *, int);
 119 static int mn10300_serial_verify_port(struct uart_port *,
 120                                         struct serial_struct *);
 121 #ifdef CONFIG_CONSOLE_POLL
 122 static void mn10300_serial_poll_put_char(struct uart_port *, unsigned char);
 123 static int mn10300_serial_poll_get_char(struct uart_port *);
 124 #endif
 125
 126 static const struct uart_ops mn10300_serial_ops = {
 127         .tx_empty       = mn10300_serial_tx_empty,
 128         .set_mctrl      = mn10300_serial_set_mctrl,
 129         .get_mctrl      = mn10300_serial_get_mctrl,
 130         .stop_tx        = mn10300_serial_stop_tx,
 131         .start_tx       = mn10300_serial_start_tx,
 132         .send_xchar     = mn10300_serial_send_xchar,
 133         .stop_rx        = mn10300_serial_stop_rx,
 134         .enable_ms      = mn10300_serial_enable_ms,
 135         .break_ctl      = mn10300_serial_break_ctl,
 136         .startup        = mn10300_serial_startup,
 137         .shutdown       = mn10300_serial_shutdown,
 138         .set_termios    = mn10300_serial_set_termios,
 139         .type           = mn10300_serial_type,
 140         .release_port   = mn10300_serial_release_port,
 141         .request_port   = mn10300_serial_request_port,
 142         .config_port    = mn10300_serial_config_port,
 143         .verify_port    = mn10300_serial_verify_port,
 144 #ifdef CONFIG_CONSOLE_POLL
 145         .poll_put_char  = mn10300_serial_poll_put_char,
 146         .poll_get_char  = mn10300_serial_poll_get_char,
 147 #endif
 148 };
 149
 150 static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
 151
 152 /*
 153  * the first on-chip serial port: ttySM0 (aka SIF0)
 154  */
 155 #ifdef CONFIG_MN10300_TTYSM0
 156 struct mn10300_serial_port mn10300_serial_port_sif0 = {
 157         .uart.ops       = &mn10300_serial_ops,
 158         .uart.membase   = (void __iomem *) &SC0CTR,
 159         .uart.mapbase   = (unsigned long) &SC0CTR,
 160         .uart.iotype    = UPIO_MEM,
 161         .uart.irq       = 0,
 162         .uart.uartclk   = 0, /* MN10300_IOCLK, */
 163         .uart.fifosize  = 1,
 164         .uart.flags     = UPF_BOOT_AUTOCONF,
 165         .uart.line      = 0,
 166         .uart.type      = PORT_MN10300,
 167         .uart.lock      =
 168         __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
 169         .name           = "ttySM0",
 170         ._iobase        = &SC0CTR,
 171         ._control       = &SC0CTR,
 172         ._status        = (volatile u8 *)&SC0STR,
 173         ._intr          = &SC0ICR,
 174         ._rxb           = &SC0RXB,
 175         ._txb           = &SC0TXB,
 176         .rx_name        = "ttySM0:Rx",
 177         .tx_name        = "ttySM0:Tx",
 178 #if defined(CONFIG_MN10300_TTYSM0_TIMER8)
 179         .tm_name        = "ttySM0:Timer8",
 180         ._tmxmd         = &TM8MD,
 181         ._tmxbr         = &TM8BR,
 182         ._tmicr         = &TM8ICR,
 183         .tm_irq         = TM8IRQ,
 184         .div_timer      = MNSCx_DIV_TIMER_16BIT,
 185 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
 186         .tm_name        = "ttySM0:Timer0",
 187         ._tmxmd         = &TM0MD,
 188         ._tmxbr         = (volatile u16 *)&TM0BR,
 189         ._tmicr         = &TM0ICR,
 190         .tm_irq         = TM0IRQ,
 191         .div_timer      = MNSCx_DIV_TIMER_8BIT,
 192 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
 193         .tm_name        = "ttySM0:Timer2",
 194         ._tmxmd         = &TM2MD,
 195         ._tmxbr         = (volatile u16 *)&TM2BR,
 196         ._tmicr         = &TM2ICR,
 197         .tm_irq         = TM2IRQ,
 198         .div_timer      = MNSCx_DIV_TIMER_8BIT,
 199 #else
 200 #error "Unknown config for ttySM0"
 201 #endif
 202         .rx_irq         = SC0RXIRQ,
 203         .tx_irq         = SC0TXIRQ,
 204         .rx_icr         = &GxICR(SC0RXIRQ),
 205         .tx_icr         = &GxICR(SC0TXIRQ),
 206         .clock_src      = MNSCx_CLOCK_SRC_IOCLK,
 207         .options        = 0,
 208 #ifdef CONFIG_GDBSTUB_ON_TTYSM0
 209         .gdbstub        = 1,
 210 #endif
 211 };
 212 #endif /* CONFIG_MN10300_TTYSM0 */
 213
 214 /*
 215  * the second on-chip serial port: ttySM1 (aka SIF1)
 216  */
 217 #ifdef CONFIG_MN10300_TTYSM1
 218 struct mn10300_serial_port mn10300_serial_port_sif1 = {
 219         .uart.ops       = &mn10300_serial_ops,
 220         .uart.membase   = (void __iomem *) &SC1CTR,
 221         .uart.mapbase   = (unsigned long) &SC1CTR,
 222         .uart.iotype    = UPIO_MEM,
 223         .uart.irq       = 0,
 224         .uart.uartclk   = 0, /* MN10300_IOCLK, */
 225         .uart.fifosize  = 1,
 226         .uart.flags     = UPF_BOOT_AUTOCONF,
 227         .uart.line      = 1,
 228         .uart.type      = PORT_MN10300,
 229         .uart.lock      =
 230         __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
 231         .name           = "ttySM1",
 232         ._iobase        = &SC1CTR,
 233         ._control       = &SC1CTR,
 234         ._status        = (volatile u8 *)&SC1STR,
 235         ._intr          = &SC1ICR,
 236         ._rxb           = &SC1RXB,
 237         ._txb           = &SC1TXB,
 238         .rx_name        = "ttySM1:Rx",
 239         .tx_name        = "ttySM1:Tx",
 240 #if defined(CONFIG_MN10300_TTYSM1_TIMER9)
 241         .tm_name        = "ttySM1:Timer9",
 242         ._tmxmd         = &TM9MD,
 243         ._tmxbr         = &TM9BR,
 244         ._tmicr         = &TM9ICR,
 245         .tm_irq         = TM9IRQ,
 246         .div_timer      = MNSCx_DIV_TIMER_16BIT,
 247 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
 248         .tm_name        = "ttySM1:Timer3",
 249         ._tmxmd         = &TM3MD,
 250         ._tmxbr         = (volatile u16 *)&TM3BR,
 251         ._tmicr         = &TM3ICR,
 252         .tm_irq         = TM3IRQ,
 253         .div_timer      = MNSCx_DIV_TIMER_8BIT,
 254 #elif defined(CONFIG_MN10300_TTYSM1_TIMER12)
 255         .tm_name        = "ttySM1/Timer12",
 256         ._tmxmd         = &TM12MD,
 257         ._tmxbr         = &TM12BR,
 258         ._tmicr         = &TM12ICR,
 259         .tm_irq         = TM12IRQ,
 260         .div_timer      = MNSCx_DIV_TIMER_16BIT,
 261 #else
 262 #error "Unknown config for ttySM1"
 263 #endif
 264         .rx_irq         = SC1RXIRQ,
 265         .tx_irq         = SC1TXIRQ,
 266         .rx_icr         = &GxICR(SC1RXIRQ),
 267         .tx_icr         = &GxICR(SC1TXIRQ),
 268         .clock_src      = MNSCx_CLOCK_SRC_IOCLK,
 269         .options        = 0,
 270 #ifdef CONFIG_GDBSTUB_ON_TTYSM1
 271         .gdbstub        = 1,
 272 #endif
 273 };
 274 #endif /* CONFIG_MN10300_TTYSM1 */
 275
 276 /*
 277  * the third on-chip serial port: ttySM2 (aka SIF2)
 278  */
 279 #ifdef CONFIG_MN10300_TTYSM2
 280 struct mn10300_serial_port mn10300_serial_port_sif2 = {
 281         .uart.ops       = &mn10300_serial_ops,
 282         .uart.membase   = (void __iomem *) &SC2CTR,
 283         .uart.mapbase   = (unsigned long) &SC2CTR,
 284         .uart.iotype    = UPIO_MEM,
 285         .uart.irq       = 0,
 286         .uart.uartclk   = 0, /* MN10300_IOCLK, */
 287         .uart.fifosize  = 1,
 288         .uart.flags     = UPF_BOOT_AUTOCONF,
 289         .uart.line      = 2,
 290 #ifdef CONFIG_MN10300_TTYSM2_CTS
 291         .uart.type      = PORT_MN10300_CTS,
 292 #else
 293         .uart.type      = PORT_MN10300,
 294 #endif
 295         .uart.lock      =
 296         __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
 297         .name           = "ttySM2",
 298         ._iobase        = &SC2CTR,
 299         ._control       = &SC2CTR,
 300         ._status        = (volatile u8 *)&SC2STR,
 301         ._intr          = &SC2ICR,
 302         ._rxb           = &SC2RXB,
 303         ._txb           = &SC2TXB,
 304         .rx_name        = "ttySM2:Rx",
 305         .tx_name        = "ttySM2:Tx",
 306 #if defined(CONFIG_MN10300_TTYSM2_TIMER10)
 307         .tm_name        = "ttySM2/Timer10",
 308         ._tmxmd         = &TM10MD,
 309         ._tmxbr         = &TM10BR,
 310         ._tmicr         = &TM10ICR,
 311         .tm_irq         = TM10IRQ,
 312         .div_timer      = MNSCx_DIV_TIMER_16BIT,
 313 #elif defined(CONFIG_MN10300_TTYSM2_TIMER9)
 314         .tm_name        = "ttySM2/Timer9",
 315         ._tmxmd         = &TM9MD,
 316         ._tmxbr         = &TM9BR,
 317         ._tmicr         = &TM9ICR,
 318         .tm_irq         = TM9IRQ,
 319         .div_timer      = MNSCx_DIV_TIMER_16BIT,
 320 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
 321         .tm_name        = "ttySM2/Timer1",
 322         ._tmxmd         = &TM1MD,
 323         ._tmxbr         = (volatile u16 *)&TM1BR,
 324         ._tmicr         = &TM1ICR,
 325         .tm_irq         = TM1IRQ,
 326         .div_timer      = MNSCx_DIV_TIMER_8BIT,
 327 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
 328         .tm_name        = "ttySM2/Timer3",
 329         ._tmxmd         = &TM3MD,
 330         ._tmxbr         = (volatile u16 *)&TM3BR,
 331         ._tmicr         = &TM3ICR,
 332         .tm_irq         = TM3IRQ,
 333         .div_timer      = MNSCx_DIV_TIMER_8BIT,
 334 #else
 335 #error "Unknown config for ttySM2"
 336 #endif
 337         .rx_irq         = SC2RXIRQ,
 338         .tx_irq         = SC2TXIRQ,
 339         .rx_icr         = &GxICR(SC2RXIRQ),
 340         .tx_icr         = &GxICR(SC2TXIRQ),
 341         .clock_src      = MNSCx_CLOCK_SRC_IOCLK,
 342 #ifdef CONFIG_MN10300_TTYSM2_CTS
 343         .options        = MNSCx_OPT_CTS,
 344 #else
 345         .options        = 0,
 346 #endif
 347 #ifdef CONFIG_GDBSTUB_ON_TTYSM2
 348         .gdbstub        = 1,
 349 #endif
 350 };
 351 #endif /* CONFIG_MN10300_TTYSM2 */
 352
 353
 354 /*
 355  * list of available serial ports
 356  */
 357 struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
 358 #ifdef CONFIG_MN10300_TTYSM0
 359         [0]     = &mn10300_serial_port_sif0,
 360 #endif
 361 #ifdef CONFIG_MN10300_TTYSM1
 362         [1]     = &mn10300_serial_port_sif1,
 363 #endif
 364 #ifdef CONFIG_MN10300_TTYSM2
 365         [2]     = &mn10300_serial_port_sif2,
 366 #endif
 367         [NR_UARTS] = NULL,
 368 };
 369
 370
 371 /*
 372  * we abuse the serial ports' baud timers' interrupt lines to get the ability
 373  * to deliver interrupts to userspace as we use the ports' interrupt lines to
 374  * do virtual DMA on account of the ports having no hardware FIFOs
 375  *
 376  * we can generate an interrupt manually in the assembly stubs by writing to
 377  * the enable and detect bits in the interrupt control register, so all we need
 378  * to do here is disable the interrupt line
 379  *
 380  * note that we can't just leave the line enabled as the baud rate timer *also*
 381  * generates interrupts
 382  */
 383 static void mn10300_serial_mask_ack(unsigned int irq)
 384 {
 385         unsigned long flags;
 386         u16 tmp;
 387
 388         flags = arch_local_cli_save();
 389         GxICR(irq) = GxICR_LEVEL_6;
 390         tmp = GxICR(irq); /* flush write buffer */
 391         arch_local_irq_restore(flags);
 392 }
 393
 394 static void mn10300_serial_chip_mask_ack(struct irq_data *d)
 395 {
 396         mn10300_serial_mask_ack(d->irq);
 397 }
 398
 399 static void mn10300_serial_nop(struct irq_data *d)
 400 {
 401 }
 402
 403 static struct irq_chip mn10300_serial_pic = {
 404         .name           = "mnserial",
 405         .irq_ack        = mn10300_serial_chip_mask_ack,
 406         .irq_mask       = mn10300_serial_chip_mask_ack,
 407         .irq_mask_ack   = mn10300_serial_chip_mask_ack,
 408         .irq_unmask     = mn10300_serial_nop,
 409 };
 410
 411 static void mn10300_serial_low_mask(struct irq_data *d)
 412 {
 413         unsigned long flags;
 414         u16 tmp;
 415
 416         flags = arch_local_cli_save();
 417         GxICR(d->irq) = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
 418         tmp = GxICR(d->irq); /* flush write buffer */
 419         arch_local_irq_restore(flags);
 420 }
 421
 422 static void mn10300_serial_low_unmask(struct irq_data *d)
 423 {
 424         unsigned long flags;
 425         u16 tmp;
 426
 427         flags = arch_local_cli_save();
 428         GxICR(d->irq) =
 429                 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE;
 430         tmp = GxICR(d->irq); /* flush write buffer */
 431         arch_local_irq_restore(flags);
 432 }
 433
 434 static struct irq_chip mn10300_serial_low_pic = {
 435         .name           = "mnserial-low",
 436         .irq_mask       = mn10300_serial_low_mask,
 437         .irq_unmask     = mn10300_serial_low_unmask,
 438 };
 439
 440 /*
 441  * serial virtual DMA interrupt jump table
 442  */
 443 struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
 444
 445 static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
 446 {
 447         int retries = 100;
 448         u16 x;
 449
 450         /* nothing to do if irq isn't set up */
 451         if (!mn10300_serial_int_tbl[port->tx_irq].port)
 452                 return;
 453
 454         port->tx_flags |= MNSCx_TX_STOP;
 455         mb();
 456
 457         /*
 458          * Here we wait for the irq to be disabled. Either it already is
 459          * disabled or we wait some number of retries for the VDMA handler
 460          * to disable it. The retries give the VDMA handler enough time to
 461          * run to completion if it was already in progress. If the VDMA IRQ
 462          * is enabled but the handler is not yet running when arrive here,
 463          * the STOP flag will prevent the handler from conflicting with the
 464          * driver code following this loop.
 465          */
 466         while ((*port->tx_icr & GxICR_ENABLE) && retries-- > 0)
 467                 ;
 468         if (retries <= 0) {
 469                 *port->tx_icr =
 470                         NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
 471                 x = *port->tx_icr;
 472         }
 473 }
 474
 475 static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
 476 {
 477         u16 x;
 478
 479         /* nothing to do if irq isn't set up */
 480         if (!mn10300_serial_int_tbl[port->tx_irq].port)
 481                 return;
 482
 483         /* stop vdma irq if not already stopped */
 484         if (!(port->tx_flags & MNSCx_TX_STOP))
 485                 mn10300_serial_dis_tx_intr(port);
 486
 487         port->tx_flags &= ~MNSCx_TX_STOP;
 488         mb();
 489
 490         *port->tx_icr =
 491                 NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) |
 492                 GxICR_ENABLE | GxICR_REQUEST | GxICR_DETECT;
 493         x = *port->tx_icr;
 494 }
 495
 496 static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
 497 {
 498         unsigned long flags;
 499         u16 x;
 500
 501         flags = arch_local_cli_save();
 502         *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
 503         x = *port->rx_icr;
 504         arch_local_irq_restore(flags);
 505 }
 506
 507 /*
 508  * multi-bit equivalent of test_and_clear_bit()
 509  */
 510 static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
 511 {
 512         u32 epsw;
 513         asm volatile("  bclr    %1,(%2)         \n"
 514                      "  mov     epsw,%0         \n"
 515                      : "=d"(epsw) : "d"(mask), "a"(ptr)
 516                      : "cc", "memory");
 517         return !(epsw & EPSW_FLAG_Z);
 518 }
 519
 520 /*
 521  * receive chars from the ring buffer for this serial port
 522  * - must do break detection here (not done in the UART)
 523  */
 524 static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
 525 {
 526         struct uart_icount *icount = &port->uart.icount;
 527         struct tty_port *port = &port->uart.state->port;
 528         struct tty_struct *tty = port->tty;
 529         unsigned ix;
 530         int count;
 531         u8 st, ch, push, status, overrun;
 532
 533         _enter("%s", port->name);
 534
 535         push = 0;
 536
 537         count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
 538         count = tty_buffer_request_room(port, count);
 539         if (count == 0) {
 540                 if (!port->low_latency)
 541                         tty_flip_buffer_push(tty);
 542                 return;
 543         }
 544
 545 try_again:
 546         /* pull chars out of the hat */
 547         ix = ACCESS_ONCE(port->rx_outp);
 548         if (CIRC_CNT(port->rx_inp, ix, MNSC_BUFFER_SIZE) == 0) {
 549                 if (push && !port->low_latency)
 550                         tty_flip_buffer_push(tty);
 551                 return;
 552         }
 553
 554         smp_read_barrier_depends();
 555         ch = port->rx_buffer[ix++];
 556         st = port->rx_buffer[ix++];
 557         smp_mb();
 558         port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
 559         port->uart.icount.rx++;
 560
 561         st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
 562         status = 0;
 563         overrun = 0;
 564
 565         /* the UART doesn't detect BREAK, so we have to do that ourselves
 566          * - it starts as a framing error on a NUL character
 567          * - then we count another two NUL characters before issuing TTY_BREAK
 568          * - then we end on a normal char or one that has all the bottom bits
 569          *   zero and the top bits set
 570          */
 571         switch (port->rx_brk) {
 572         case 0:
 573                 /* not breaking at the moment */
 574                 break;
 575
 576         case 1:
 577                 if (st & SC01STR_FEF && ch == 0) {
 578                         port->rx_brk = 2;
 579                         goto try_again;
 580                 }
 581                 goto not_break;
 582
 583         case 2:
 584                 if (st & SC01STR_FEF && ch == 0) {
 585                         port->rx_brk = 3;
 586                         _proto("Rx Break Detected");
 587                         icount->brk++;
 588                         if (uart_handle_break(&port->uart))
 589                                 goto ignore_char;
 590                         status |= 1 << TTY_BREAK;
 591                         goto insert;
 592                 }
 593                 goto not_break;
 594
 595         default:
 596                 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
 597                         goto try_again; /* still breaking */
 598
 599                 port->rx_brk = 0; /* end of the break */
 600
 601                 switch (ch) {
 602                 case 0xFF:
 603                 case 0xFE:
 604                 case 0xFC:
 605                 case 0xF8:
 606                 case 0xF0:
 607                 case 0xE0:
 608                 case 0xC0:
 609                 case 0x80:
 610                 case 0x00:
 611                         /* discard char at probable break end */
 612                         goto try_again;
 613                 }
 614                 break;
 615         }
 616
 617 process_errors:
 618         /* handle framing error */
 619         if (st & SC01STR_FEF) {
 620                 if (ch == 0) {
 621                         /* framing error with NUL char is probably a BREAK */
 622                         port->rx_brk = 1;
 623                         goto try_again;
 624                 }
 625
 626                 _proto("Rx Framing Error");
 627                 icount->frame++;
 628                 status |= 1 << TTY_FRAME;
 629         }
 630
 631         /* handle parity error */
 632         if (st & SC01STR_PEF) {
 633                 _proto("Rx Parity Error");
 634                 icount->parity++;
 635                 status = TTY_PARITY;
 636         }
 637
 638         /* handle normal char */
 639         if (status == 0) {
 640                 if (uart_handle_sysrq_char(&port->uart, ch))
 641                         goto ignore_char;
 642                 status = (1 << TTY_NORMAL);
 643         }
 644
 645         /* handle overrun error */
 646         if (st & SC01STR_OEF) {
 647                 if (port->rx_brk)
 648                         goto try_again;
 649
 650                 _proto("Rx Overrun Error");
 651                 icount->overrun++;
 652                 overrun = 1;
 653         }
 654
 655 insert:
 656         status &= port->uart.read_status_mask;
 657
 658         if (!overrun && !(status & port->uart.ignore_status_mask)) {
 659                 int flag;
 660
 661                 if (status & (1 << TTY_BREAK))
 662                         flag = TTY_BREAK;
 663                 else if (status & (1 << TTY_PARITY))
 664                         flag = TTY_PARITY;
 665                 else if (status & (1 << TTY_FRAME))
 666                         flag = TTY_FRAME;
 667                 else
 668                         flag = TTY_NORMAL;
 669
 670                 tty_insert_flip_char(port, ch, flag);
 671         }
 672
 673         /* overrun is special, since it's reported immediately, and doesn't
 674          * affect the current character
 675          */
 676         if (overrun)
 677                 tty_insert_flip_char(port, 0, TTY_OVERRUN);
 678
 679         count--;
 680         if (count <= 0) {
 681                 if (!port->low_latency)
 682                         tty_flip_buffer_push(tty);
 683                 return;
 684         }
 685
 686 ignore_char:
 687         push = 1;
 688         goto try_again;
 689
 690 not_break:
 691         port->rx_brk = 0;
 692         goto process_errors;
 693 }
 694
 695 /*
 696  * handle an interrupt from the serial transmission "virtual DMA" driver
 697  * - note: the interrupt routine will disable its own interrupts when the Tx
 698  *   buffer is empty
 699  */
 700 static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
 701 {
 702         _enter("%s", port->name);
 703
 704         if (!port->uart.state || !port->uart.state->port.tty) {
 705                 mn10300_serial_dis_tx_intr(port);
 706                 return;
 707         }
 708
 709         if (uart_tx_stopped(&port->uart) ||
 710             uart_circ_empty(&port->uart.state->xmit))
 711                 mn10300_serial_dis_tx_intr(port);
 712
 713         if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
 714                 uart_write_wakeup(&port->uart);
 715 }
 716
 717 /*
 718  * deal with a change in the status of the CTS line
 719  */
 720 static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
 721 {
 722         u16 ctr;
 723
 724         port->tx_cts = st;
 725         port->uart.icount.cts++;
 726
 727         /* flip the CTS state selector flag to interrupt when it changes
 728          * back */
 729         ctr = *port->_control;
 730         ctr ^= SC2CTR_TWS;
 731         *port->_control = ctr;
 732
 733         uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
 734         wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
 735 }
 736
 737 /*
 738  * handle a virtual interrupt generated by the lower level "virtual DMA"
 739  * routines (irq is the baud timer interrupt)
 740  */
 741 static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
 742 {
 743         struct mn10300_serial_port *port = dev_id;
 744         u8 st;
 745
 746         spin_lock(&port->uart.lock);
 747
 748         if (port->intr_flags) {
 749                 _debug("INT %s: %x", port->name, port->intr_flags);
 750
 751                 if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
 752                         mn10300_serial_receive_interrupt(port);
 753
 754                 if (mask_test_and_clear(&port->intr_flags,
 755                                         MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
 756                         mn10300_serial_transmit_interrupt(port);
 757         }
 758
 759         /* the only modem control line amongst the whole lot is CTS on
 760          * serial port 2 */
 761         if (port->type == PORT_MN10300_CTS) {
 762                 st = *port->_status;
 763                 if ((port->tx_cts ^ st) & SC2STR_CTS)
 764                         mn10300_serial_cts_changed(port, st);
 765         }
 766
 767         spin_unlock(&port->uart.lock);
 768
 769         return IRQ_HANDLED;
 770 }
 771
 772 /*
 773  * return indication of whether the hardware transmit buffer is empty
 774  */
 775 static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
 776 {
 777         struct mn10300_serial_port *port =
 778                 container_of(_port, struct mn10300_serial_port, uart);
 779
 780         _enter("%s", port->name);
 781
 782         return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
 783                 0 : TIOCSER_TEMT;
 784 }
 785
 786 /*
 787  * set the modem control lines (we don't have any)
 788  */
 789 static void mn10300_serial_set_mctrl(struct uart_port *_port,
 790                                      unsigned int mctrl)
 791 {
 792         struct mn10300_serial_port *port __attribute__ ((unused)) =
 793                 container_of(_port, struct mn10300_serial_port, uart);
 794
 795         _enter("%s,%x", port->name, mctrl);
 796 }
 797
 798 /*
 799  * get the modem control line statuses
 800  */
 801 static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
 802 {
 803         struct mn10300_serial_port *port =
 804                 container_of(_port, struct mn10300_serial_port, uart);
 805
 806         _enter("%s", port->name);
 807
 808         if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
 809                 return TIOCM_CAR | TIOCM_DSR;
 810
 811         return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
 812 }
 813
 814 /*
 815  * stop transmitting characters
 816  */
 817 static void mn10300_serial_stop_tx(struct uart_port *_port)
 818 {
 819         struct mn10300_serial_port *port =
 820                 container_of(_port, struct mn10300_serial_port, uart);
 821
 822         _enter("%s", port->name);
 823
 824         /* disable the virtual DMA */
 825         mn10300_serial_dis_tx_intr(port);
 826 }
 827
 828 /*
 829  * start transmitting characters
 830  * - jump-start transmission if it has stalled
 831  *   - enable the serial Tx interrupt (used by the virtual DMA controller)
 832  *   - force an interrupt to happen if necessary
 833  */
 834 static void mn10300_serial_start_tx(struct uart_port *_port)
 835 {
 836         struct mn10300_serial_port *port =
 837                 container_of(_port, struct mn10300_serial_port, uart);
 838
 839         _enter("%s{%lu}",
 840                port->name,
 841                CIRC_CNT(&port->uart.state->xmit.head,
 842                         &port->uart.state->xmit.tail,
 843                         UART_XMIT_SIZE));
 844
 845         /* kick the virtual DMA controller */
 846         mn10300_serial_en_tx_intr(port);
 847
 848         _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
 849                *port->_control, *port->_intr, *port->_status,
 850                *port->_tmxmd,
 851                (port->div_timer == MNSCx_DIV_TIMER_8BIT) ?
 852                    *(volatile u8 *)port->_tmxbr : *port->_tmxbr,
 853                *port->tx_icr);
 854 }
 855
 856 /*
 857  * transmit a high-priority XON/XOFF character
 858  */
 859 static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
 860 {
 861         struct mn10300_serial_port *port =
 862                 container_of(_port, struct mn10300_serial_port, uart);
 863         unsigned long flags;
 864
 865         _enter("%s,%02x", port->name, ch);
 866
 867         if (likely(port->gdbstub)) {
 868                 port->tx_xchar = ch;
 869                 if (ch) {
 870                         spin_lock_irqsave(&port->uart.lock, flags);
 871                         mn10300_serial_en_tx_intr(port);
 872                         spin_unlock_irqrestore(&port->uart.lock, flags);
 873                 }
 874         }
 875 }
 876
 877 /*
 878  * stop receiving characters
 879  * - called whilst the port is being closed
 880  */
 881 static void mn10300_serial_stop_rx(struct uart_port *_port)
 882 {
 883         struct mn10300_serial_port *port =
 884                 container_of(_port, struct mn10300_serial_port, uart);
 885
 886         u16 ctr;
 887
 888         _enter("%s", port->name);
 889
 890         ctr = *port->_control;
 891         ctr &= ~SC01CTR_RXE;
 892         *port->_control = ctr;
 893
 894         mn10300_serial_dis_rx_intr(port);
 895 }
 896
 897 /*
 898  * enable modem status interrupts
 899  */
 900 static void mn10300_serial_enable_ms(struct uart_port *_port)
 901 {
 902         struct mn10300_serial_port *port =
 903                 container_of(_port, struct mn10300_serial_port, uart);
 904
 905         u16 ctr, cts;
 906
 907         _enter("%s", port->name);
 908
 909         if (port->type == PORT_MN10300_CTS) {
 910                 /* want to interrupt when CTS goes low if CTS is now high and
 911                  * vice versa
 912                  */
 913                 port->tx_cts = *port->_status;
 914
 915                 cts = (port->tx_cts & SC2STR_CTS) ?
 916                         SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
 917
 918                 ctr = *port->_control;
 919                 ctr &= ~SC2CTR_TWS;
 920                 ctr |= cts;
 921                 *port->_control = ctr;
 922
 923                 mn10300_serial_en_tx_intr(port);
 924         }
 925 }
 926
 927 /*
 928  * transmit or cease transmitting a break signal
 929  */
 930 static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
 931 {
 932         struct mn10300_serial_port *port =
 933                 container_of(_port, struct mn10300_serial_port, uart);
 934         unsigned long flags;
 935
 936         _enter("%s,%d", port->name, ctl);
 937
 938         spin_lock_irqsave(&port->uart.lock, flags);
 939         if (ctl) {
 940                 /* tell the virtual DMA handler to assert BREAK */
 941                 port->tx_flags |= MNSCx_TX_BREAK;
 942                 mn10300_serial_en_tx_intr(port);
 943         } else {
 944                 port->tx_flags &= ~MNSCx_TX_BREAK;
 945                 *port->_control &= ~SC01CTR_BKE;
 946                 mn10300_serial_en_tx_intr(port);
 947         }
 948         spin_unlock_irqrestore(&port->uart.lock, flags);
 949 }
 950
 951 /*
 952  * grab the interrupts and enable the port for reception
 953  */
 954 static int mn10300_serial_startup(struct uart_port *_port)
 955 {
 956         struct mn10300_serial_port *port =
 957                 container_of(_port, struct mn10300_serial_port, uart);
 958         struct mn10300_serial_int *pint;
 959
 960         _enter("%s{%d}", port->name, port->gdbstub);
 961
 962         if (unlikely(port->gdbstub))
 963                 return -EBUSY;
 964
 965         /* allocate an Rx buffer for the virtual DMA handler */
 966         port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
 967         if (!port->rx_buffer)
 968                 return -ENOMEM;
 969
 970         port->rx_inp = port->rx_outp = 0;
 971         port->tx_flags = 0;
 972
 973         /* finally, enable the device */
 974         *port->_intr = SC01ICR_TI;
 975         *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
 976
 977         pint = &mn10300_serial_int_tbl[port->rx_irq];
 978         pint->port = port;
 979         pint->vdma = mn10300_serial_vdma_rx_handler;
 980         pint = &mn10300_serial_int_tbl[port->tx_irq];
 981         pint->port = port;
 982         pint->vdma = mn10300_serial_vdma_tx_handler;
 983
 984         irq_set_chip(port->rx_irq, &mn10300_serial_low_pic);
 985         irq_set_chip(port->tx_irq, &mn10300_serial_low_pic);
 986         irq_set_chip(port->tm_irq, &mn10300_serial_pic);
 987
 988         if (request_irq(port->rx_irq, mn10300_serial_interrupt,
 989                         IRQF_DISABLED | IRQF_NOBALANCING,
 990                         port->rx_name, port) < 0)
 991                 goto error;
 992
 993         if (request_irq(port->tx_irq, mn10300_serial_interrupt,
 994                         IRQF_DISABLED | IRQF_NOBALANCING,
 995                         port->tx_name, port) < 0)
 996                 goto error2;
 997
 998         if (request_irq(port->tm_irq, mn10300_serial_interrupt,
 999                         IRQF_DISABLED | IRQF_NOBALANCING,
1000                         port->tm_name, port) < 0)
1001                 goto error3;
1002         mn10300_serial_mask_ack(port->tm_irq);
1003
1004         return 0;
1005
1006 error3:
1007         free_irq(port->tx_irq, port);
1008 error2:
1009         free_irq(port->rx_irq, port);
1010 error:
1011         kfree(port->rx_buffer);
1012         port->rx_buffer = NULL;
1013         return -EBUSY;
1014 }
1015
1016 /*
1017  * shutdown the port and release interrupts
1018  */
1019 static void mn10300_serial_shutdown(struct uart_port *_port)
1020 {
1021         unsigned long flags;
1022         u16 x;
1023         struct mn10300_serial_port *port =
1024                 container_of(_port, struct mn10300_serial_port, uart);
1025
1026         _enter("%s", port->name);
1027
1028         spin_lock_irqsave(&_port->lock, flags);
1029         mn10300_serial_dis_tx_intr(port);
1030
1031         *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL);
1032         x = *port->rx_icr;
1033         port->tx_flags = 0;
1034         spin_unlock_irqrestore(&_port->lock, flags);
1035
1036         /* disable the serial port and its baud rate timer */
1037         *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
1038         *port->_tmxmd = 0;
1039
1040         if (port->rx_buffer) {
1041                 void *buf = port->rx_buffer;
1042                 port->rx_buffer = NULL;
1043                 kfree(buf);
1044         }
1045
1046         /* disable all intrs */
1047         free_irq(port->tm_irq, port);
1048         free_irq(port->rx_irq, port);
1049         free_irq(port->tx_irq, port);
1050
1051         mn10300_serial_int_tbl[port->tx_irq].port = NULL;
1052         mn10300_serial_int_tbl[port->rx_irq].port = NULL;
1053 }
1054
1055 /*
1056  * this routine is called to set the UART divisor registers to match the
1057  * specified baud rate for a serial port.
1058  */
1059 static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
1060                                           struct ktermios *new,
1061                                           struct ktermios *old)
1062 {
1063         unsigned long flags;
1064         unsigned long ioclk = port->ioclk;
1065         unsigned cflag;
1066         int baud, bits, xdiv, tmp;
1067         u16 tmxbr, scxctr;
1068         u8 tmxmd, battempt;
1069         u8 div_timer = port->div_timer;
1070
1071         _enter("%s{%lu}", port->name, ioclk);
1072
1073         /* byte size and parity */
1074         cflag = new->c_cflag;
1075         switch (cflag & CSIZE) {
1076         case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9;  break;
1077         case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1078         default:  scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
1079         }
1080
1081         if (cflag & CSTOPB) {
1082                 scxctr |= SC01CTR_STB_2BIT;
1083                 bits++;
1084         }
1085
1086         if (cflag & PARENB) {
1087                 bits++;
1088                 if (cflag & PARODD)
1089                         scxctr |= SC01CTR_PB_ODD;
1090 #ifdef CMSPAR
1091                 else if (cflag & CMSPAR)
1092                         scxctr |= SC01CTR_PB_FIXED0;
1093 #endif
1094                 else
1095                         scxctr |= SC01CTR_PB_EVEN;
1096         }
1097
1098         /* Determine divisor based on baud rate */
1099         battempt = 0;
1100
1101         switch (port->uart.line) {
1102 #ifdef CONFIG_MN10300_TTYSM0
1103         case 0: /* ttySM0 */
1104 #if   defined(CONFIG_MN10300_TTYSM0_TIMER8)
1105                 scxctr |= SC0CTR_CK_TM8UFLOW_8;
1106 #elif defined(CONFIG_MN10300_TTYSM0_TIMER0)
1107                 scxctr |= SC0CTR_CK_TM0UFLOW_8;
1108 #elif defined(CONFIG_MN10300_TTYSM0_TIMER2)
1109                 scxctr |= SC0CTR_CK_TM2UFLOW_8;
1110 #else
1111 #error "Unknown config for ttySM0"
1112 #endif
1113                 break;
1114 #endif /* CONFIG_MN10300_TTYSM0 */
1115
1116 #ifdef CONFIG_MN10300_TTYSM1
1117         case 1: /* ttySM1 */
1118 #if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3)
1119 #if   defined(CONFIG_MN10300_TTYSM1_TIMER9)
1120                 scxctr |= SC1CTR_CK_TM9UFLOW_8;
1121 #elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
1122                 scxctr |= SC1CTR_CK_TM3UFLOW_8;
1123 #else
1124 #error "Unknown config for ttySM1"
1125 #endif
1126 #else /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1127 #if defined(CONFIG_MN10300_TTYSM1_TIMER12)
1128                 scxctr |= SC1CTR_CK_TM12UFLOW_8;
1129 #else
1130 #error "Unknown config for ttySM1"
1131 #endif
1132 #endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */
1133                 break;
1134 #endif /* CONFIG_MN10300_TTYSM1 */
1135
1136 #ifdef CONFIG_MN10300_TTYSM2
1137         case 2: /* ttySM2 */
1138 #if defined(CONFIG_AM33_2)
1139 #if   defined(CONFIG_MN10300_TTYSM2_TIMER10)
1140                 scxctr |= SC2CTR_CK_TM10UFLOW;
1141 #else
1142 #error "Unknown config for ttySM2"
1143 #endif
1144 #else /* CONFIG_AM33_2 */
1145 #if   defined(CONFIG_MN10300_TTYSM2_TIMER9)
1146                 scxctr |= SC2CTR_CK_TM9UFLOW_8;
1147 #elif defined(CONFIG_MN10300_TTYSM2_TIMER1)
1148                 scxctr |= SC2CTR_CK_TM1UFLOW_8;
1149 #elif defined(CONFIG_MN10300_TTYSM2_TIMER3)
1150                 scxctr |= SC2CTR_CK_TM3UFLOW_8;
1151 #else
1152 #error "Unknown config for ttySM2"
1153 #endif
1154 #endif /* CONFIG_AM33_2 */
1155                 break;
1156 #endif /* CONFIG_MN10300_TTYSM2 */
1157
1158         default:
1159                 break;
1160         }
1161
1162 try_alternative:
1163         baud = uart_get_baud_rate(&port->uart, new, old, 0,
1164                                   port->ioclk / 8);
1165
1166         _debug("ALT %d [baud %d]", battempt, baud);
1167
1168         if (!baud)
1169                 baud = 9600;    /* B0 transition handled in rs_set_termios */
1170         xdiv = 1;
1171         if (baud == 134) {
1172                 baud = 269;     /* 134 is really 134.5 */
1173                 xdiv = 2;
1174         }
1175
1176         if (baud == 38400 &&
1177             (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
1178             ) {
1179                 _debug("CUSTOM %u", port->uart.custom_divisor);
1180
1181                 if (div_timer == MNSCx_DIV_TIMER_16BIT) {
1182                         if (port->uart.custom_divisor <= 65535) {
1183                                 tmxmd = TM8MD_SRC_IOCLK;
1184                                 tmxbr = port->uart.custom_divisor;
1185                                 port->uart.uartclk = ioclk;
1186                                 goto timer_okay;
1187                         }
1188                         if (port->uart.custom_divisor / 8 <= 65535) {
1189                                 tmxmd = TM8MD_SRC_IOCLK_8;
1190                                 tmxbr = port->uart.custom_divisor / 8;
1191                                 port->uart.custom_divisor = tmxbr * 8;
1192                                 port->uart.uartclk = ioclk / 8;
1193                                 goto timer_okay;
1194                         }
1195                         if (port->uart.custom_divisor / 32 <= 65535) {
1196                                 tmxmd = TM8MD_SRC_IOCLK_32;
1197                                 tmxbr = port->uart.custom_divisor / 32;
1198                                 port->uart.custom_divisor = tmxbr * 32;
1199                                 port->uart.uartclk = ioclk / 32;
1200                                 goto timer_okay;
1201                         }
1202
1203                 } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
1204                         if (port->uart.custom_divisor <= 255) {
1205                                 tmxmd = TM2MD_SRC_IOCLK;
1206                                 tmxbr = port->uart.custom_divisor;
1207                                 port->uart.uartclk = ioclk;
1208                                 goto timer_okay;
1209                         }
1210                         if (port->uart.custom_divisor / 8 <= 255) {
1211                                 tmxmd = TM2MD_SRC_IOCLK_8;
1212                                 tmxbr = port->uart.custom_divisor / 8;
1213                                 port->uart.custom_divisor = tmxbr * 8;
1214                                 port->uart.uartclk = ioclk / 8;
1215                                 goto timer_okay;
1216                         }
1217                         if (port->uart.custom_divisor / 32 <= 255) {
1218                                 tmxmd = TM2MD_SRC_IOCLK_32;
1219                                 tmxbr = port->uart.custom_divisor / 32;
1220                                 port->uart.custom_divisor = tmxbr * 32;
1221                                 port->uart.uartclk = ioclk / 32;
1222                                 goto timer_okay;
1223                         }
1224                 }
1225         }
1226
1227         switch (div_timer) {
1228         case MNSCx_DIV_TIMER_16BIT:
1229                 port->uart.uartclk = ioclk;
1230                 tmxmd = TM8MD_SRC_IOCLK;
1231                 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1232                 if (tmp > 0 && tmp <= 65535)
1233                         goto timer_okay;
1234
1235                 port->uart.uartclk = ioclk / 8;
1236                 tmxmd = TM8MD_SRC_IOCLK_8;
1237                 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1238                 if (tmp > 0 && tmp <= 65535)
1239                         goto timer_okay;
1240
1241                 port->uart.uartclk = ioclk / 32;
1242                 tmxmd = TM8MD_SRC_IOCLK_32;
1243                 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1244                 if (tmp > 0 && tmp <= 65535)
1245                         goto timer_okay;
1246                 break;
1247
1248         case MNSCx_DIV_TIMER_8BIT:
1249                 port->uart.uartclk = ioclk;
1250                 tmxmd = TM2MD_SRC_IOCLK;
1251                 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1252                 if (tmp > 0 && tmp <= 255)
1253                         goto timer_okay;
1254
1255                 port->uart.uartclk = ioclk / 8;
1256                 tmxmd = TM2MD_SRC_IOCLK_8;
1257                 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1258                 if (tmp > 0 && tmp <= 255)
1259                         goto timer_okay;
1260
1261                 port->uart.uartclk = ioclk / 32;
1262                 tmxmd = TM2MD_SRC_IOCLK_32;
1263                 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1264                 if (tmp > 0 && tmp <= 255)
1265                         goto timer_okay;
1266                 break;
1267
1268         default:
1269                 BUG();
1270                 return;
1271         }
1272
1273         /* refuse to change to a baud rate we can't support */
1274         _debug("CAN'T SUPPORT");
1275
1276         switch (battempt) {
1277         case 0:
1278                 if (old) {
1279                         new->c_cflag &= ~CBAUD;
1280                         new->c_cflag |= (old->c_cflag & CBAUD);
1281                         battempt = 1;
1282                         goto try_alternative;
1283                 }
1284
1285         case 1:
1286                 /* as a last resort, if the quotient is zero, default to 9600
1287                  * bps */
1288                 new->c_cflag &= ~CBAUD;
1289                 new->c_cflag |= B9600;
1290                 battempt = 2;
1291                 goto try_alternative;
1292
1293         default:
1294                 /* hmmm... can't seem to support 9600 either
1295                  * - we could try iterating through the speeds we know about to
1296                  *   find the lowest
1297                  */
1298                 new->c_cflag &= ~CBAUD;
1299                 new->c_cflag |= B0;
1300
1301                 if (div_timer == MNSCx_DIV_TIMER_16BIT)
1302                         tmxmd = TM8MD_SRC_IOCLK_32;
1303                 else if (div_timer == MNSCx_DIV_TIMER_8BIT)
1304                         tmxmd = TM2MD_SRC_IOCLK_32;
1305                 tmxbr = 1;
1306
1307                 port->uart.uartclk = ioclk / 32;
1308                 break;
1309         }
1310 timer_okay:
1311
1312         _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
1313
1314         /* make the changes */
1315         spin_lock_irqsave(&port->uart.lock, flags);
1316
1317         uart_update_timeout(&port->uart, new->c_cflag, baud);
1318
1319         /* set the timer to produce the required baud rate */
1320         switch (div_timer) {
1321         case MNSCx_DIV_TIMER_16BIT:
1322                 *port->_tmxmd = 0;
1323                 *port->_tmxbr = tmxbr;
1324                 *port->_tmxmd = TM8MD_INIT_COUNTER;
1325                 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1326                 break;
1327
1328         case MNSCx_DIV_TIMER_8BIT:
1329                 *port->_tmxmd = 0;
1330                 *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
1331                 *port->_tmxmd = TM2MD_INIT_COUNTER;
1332                 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1333                 break;
1334         }
1335
1336         /* CTS flow control flag and modem status interrupts */
1337         scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
1338
1339         if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
1340                 /* want to interrupt when CTS goes low if CTS is now
1341                  * high and vice versa
1342                  */
1343                 port->tx_cts = *port->_status;
1344
1345                 if (port->tx_cts & SC2STR_CTS)
1346                         scxctr |= SC2CTR_TWE;
1347                 else
1348                         scxctr |= SC2CTR_TWE | SC2CTR_TWS;
1349         }
1350
1351         /* set up parity check flag */
1352         port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
1353         if (new->c_iflag & INPCK)
1354                 port->uart.read_status_mask |=
1355                         (1 << TTY_PARITY) | (1 << TTY_FRAME);
1356         if (new->c_iflag & (BRKINT | PARMRK))
1357                 port->uart.read_status_mask |= (1 << TTY_BREAK);
1358
1359         /* characters to ignore */
1360         port->uart.ignore_status_mask = 0;
1361         if (new->c_iflag & IGNPAR)
1362                 port->uart.ignore_status_mask |=
1363                         (1 << TTY_PARITY) | (1 << TTY_FRAME);
1364         if (new->c_iflag & IGNBRK) {
1365                 port->uart.ignore_status_mask |= (1 << TTY_BREAK);
1366                 /*
1367                  * If we're ignoring parity and break indicators,
1368                  * ignore overruns to (for real raw support).
1369                  */
1370                 if (new->c_iflag & IGNPAR)
1371                         port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
1372         }
1373
1374         /* Ignore all characters if CREAD is not set */
1375         if ((new->c_cflag & CREAD) == 0)
1376                 port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
1377
1378         scxctr |= SC01CTR_TXE | SC01CTR_RXE;
1379         scxctr |= *port->_control & SC01CTR_BKE;
1380         *port->_control = scxctr;
1381
1382         spin_unlock_irqrestore(&port->uart.lock, flags);
1383 }
1384
1385 /*
1386  * set the terminal I/O parameters
1387  */
1388 static void mn10300_serial_set_termios(struct uart_port *_port,
1389                                          struct ktermios *new,
1390                                          struct ktermios *old)
1391 {
1392         struct mn10300_serial_port *port =
1393                 container_of(_port, struct mn10300_serial_port, uart);
1394
1395         _enter("%s,%p,%p", port->name, new, old);
1396
1397         mn10300_serial_change_speed(port, new, old);
1398
1399         /* handle turning off CRTSCTS */
1400         if (!(new->c_cflag & CRTSCTS)) {
1401                 u16 ctr = *port->_control;
1402                 ctr &= ~SC2CTR_TWE;
1403                 *port->_control = ctr;
1404         }
1405
1406         /* change Transfer bit-order (LSB/MSB) */
1407         if (new->c_cflag & CODMSB)
1408                 *port->_control |= SC01CTR_OD_MSBFIRST; /* MSB MODE */
1409         else
1410                 *port->_control &= ~SC01CTR_OD_MSBFIRST; /* LSB MODE */
1411 }
1412
1413 /*
1414  * return description of port type
1415  */
1416 static const char *mn10300_serial_type(struct uart_port *_port)
1417 {
1418         struct mn10300_serial_port *port =
1419                 container_of(_port, struct mn10300_serial_port, uart);
1420
1421         if (port->uart.type == PORT_MN10300_CTS)
1422                 return "MN10300 SIF_CTS";
1423
1424         return "MN10300 SIF";
1425 }
1426
1427 /*
1428  * release I/O and memory regions in use by port
1429  */
1430 static void mn10300_serial_release_port(struct uart_port *_port)
1431 {
1432         struct mn10300_serial_port *port =
1433                 container_of(_port, struct mn10300_serial_port, uart);
1434
1435         _enter("%s", port->name);
1436
1437         release_mem_region((unsigned long) port->_iobase, 16);
1438 }
1439
1440 /*
1441  * request I/O and memory regions for port
1442  */
1443 static int mn10300_serial_request_port(struct uart_port *_port)
1444 {
1445         struct mn10300_serial_port *port =
1446                 container_of(_port, struct mn10300_serial_port, uart);
1447
1448         _enter("%s", port->name);
1449
1450         request_mem_region((unsigned long) port->_iobase, 16, port->name);
1451         return 0;
1452 }
1453
1454 /*
1455  * configure the type and reserve the ports
1456  */
1457 static void mn10300_serial_config_port(struct uart_port *_port, int type)
1458 {
1459         struct mn10300_serial_port *port =
1460                 container_of(_port, struct mn10300_serial_port, uart);
1461
1462         _enter("%s", port->name);
1463
1464         port->uart.type = PORT_MN10300;
1465
1466         if (port->options & MNSCx_OPT_CTS)
1467                 port->uart.type = PORT_MN10300_CTS;
1468
1469         mn10300_serial_request_port(_port);
1470 }
1471
1472 /*
1473  * verify serial parameters are suitable for this port type
1474  */
1475 static int mn10300_serial_verify_port(struct uart_port *_port,
1476                                         struct serial_struct *ss)
1477 {
1478         struct mn10300_serial_port *port =
1479                 container_of(_port, struct mn10300_serial_port, uart);
1480         void *mapbase = (void *) (unsigned long) port->uart.mapbase;
1481
1482         _enter("%s", port->name);
1483
1484         /* these things may not be changed */
1485         if (ss->irq             != port->uart.irq       ||
1486             ss->port            != port->uart.iobase    ||
1487             ss->io_type         != port->uart.iotype    ||
1488             ss->iomem_base      != mapbase ||
1489             ss->iomem_reg_shift != port->uart.regshift  ||
1490             ss->hub6            != port->uart.hub6      ||
1491             ss->xmit_fifo_size  != port->uart.fifosize)
1492                 return -EINVAL;
1493
1494         /* type may be changed on a port that supports CTS */
1495         if (ss->type != port->uart.type) {
1496                 if (!(port->options & MNSCx_OPT_CTS))
1497                         return -EINVAL;
1498
1499                 if (ss->type != PORT_MN10300 &&
1500                     ss->type != PORT_MN10300_CTS)
1501                         return -EINVAL;
1502         }
1503
1504         return 0;
1505 }
1506
1507 /*
1508  * initialise the MN10300 on-chip UARTs
1509  */
1510 static int __init mn10300_serial_init(void)
1511 {
1512         struct mn10300_serial_port *port;
1513         int ret, i;
1514
1515         printk(KERN_INFO "%s version %s (%s)\n",
1516                serial_name, serial_version, serial_revdate);
1517
1518 #if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2)
1519         {
1520                 int tmp;
1521                 SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
1522                 tmp = SC2TIM;
1523         }
1524 #endif
1525
1526         set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL),
1527                 mn10300_serial_vdma_interrupt);
1528
1529         ret = uart_register_driver(&mn10300_serial_driver);
1530         if (!ret) {
1531                 for (i = 0 ; i < NR_PORTS ; i++) {
1532                         port = mn10300_serial_ports[i];
1533                         if (!port || port->gdbstub)
1534                                 continue;
1535
1536                         switch (port->clock_src) {
1537                         case MNSCx_CLOCK_SRC_IOCLK:
1538                                 port->ioclk = MN10300_IOCLK;
1539                                 break;
1540
1541 #ifdef MN10300_IOBCLK
1542                         case MNSCx_CLOCK_SRC_IOBCLK:
1543                                 port->ioclk = MN10300_IOBCLK;
1544                                 break;
1545 #endif
1546                         default:
1547                                 BUG();
1548                         }
1549
1550                         ret = uart_add_one_port(&mn10300_serial_driver,
1551                                                 &port->uart);
1552
1553                         if (ret < 0) {
1554                                 _debug("ERROR %d", -ret);
1555                                 break;
1556                         }
1557                 }
1558
1559                 if (ret)
1560                         uart_unregister_driver(&mn10300_serial_driver);
1561         }
1562
1563         return ret;
1564 }
1565
1566 __initcall(mn10300_serial_init);
1567
1568
1569 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
1570
1571 /*
1572  * print a string to the serial port without disturbing the real user of the
1573  * port too much
1574  * - the console must be locked by the caller
1575  */
1576 static void mn10300_serial_console_write(struct console *co,
1577                                            const char *s, unsigned count)
1578 {
1579         struct mn10300_serial_port *port;
1580         unsigned i;
1581         u16 scxctr;
1582         u8 tmxmd;
1583         unsigned long flags;
1584         int locked = 1;
1585
1586         port = mn10300_serial_ports[co->index];
1587
1588         local_irq_save(flags);
1589         if (port->uart.sysrq) {
1590                 /* mn10300_serial_interrupt() already took the lock */
1591                 locked = 0;
1592         } else if (oops_in_progress) {
1593                 locked = spin_trylock(&port->uart.lock);
1594         } else
1595                 spin_lock(&port->uart.lock);
1596
1597         /* firstly hijack the serial port from the "virtual DMA" controller */
1598         mn10300_serial_dis_tx_intr(port);
1599
1600         /* the transmitter may be disabled */
1601         scxctr = *port->_control;
1602         if (!(scxctr & SC01CTR_TXE)) {
1603                 /* restart the UART clock */
1604                 tmxmd = *port->_tmxmd;
1605
1606                 switch (port->div_timer) {
1607                 case MNSCx_DIV_TIMER_16BIT:
1608                         *port->_tmxmd = 0;
1609                         *port->_tmxmd = TM8MD_INIT_COUNTER;
1610                         *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1611                         break;
1612
1613                 case MNSCx_DIV_TIMER_8BIT:
1614                         *port->_tmxmd = 0;
1615                         *port->_tmxmd = TM2MD_INIT_COUNTER;
1616                         *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1617                         break;
1618                 }
1619
1620                 /* enable the transmitter */
1621                 *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
1622
1623         } else if (scxctr & SC01CTR_BKE) {
1624                 /* stop transmitting BREAK */
1625                 *port->_control = (scxctr & ~SC01CTR_BKE);
1626         }
1627
1628         /* send the chars into the serial port (with LF -> LFCR conversion) */
1629         for (i = 0; i < count; i++) {
1630                 char ch = *s++;
1631
1632                 while (*port->_status & SC01STR_TBF)
1633                         continue;
1634                 *port->_txb = ch;
1635
1636                 if (ch == 0x0a) {
1637                         while (*port->_status & SC01STR_TBF)
1638                                 continue;
1639                         *port->_txb = 0xd;
1640                 }
1641         }
1642
1643         /* can't let the transmitter be turned off if it's actually
1644          * transmitting */
1645         while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
1646                 continue;
1647
1648         /* disable the transmitter if we re-enabled it */
1649         if (!(scxctr & SC01CTR_TXE))
1650                 *port->_control = scxctr;
1651
1652         mn10300_serial_en_tx_intr(port);
1653
1654         if (locked)
1655                 spin_unlock(&port->uart.lock);
1656         local_irq_restore(flags);
1657 }
1658
1659 /*
1660  * set up a serial port as a console
1661  * - construct a cflag setting for the first rs_open()
1662  * - initialize the serial port
1663  * - return non-zero if we didn't find a serial port.
1664  */
1665 static int __init mn10300_serial_console_setup(struct console *co,
1666                                                  char *options)
1667 {
1668         struct mn10300_serial_port *port;
1669         int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
1670
1671         for (i = 0 ; i < NR_PORTS ; i++) {
1672                 port = mn10300_serial_ports[i];
1673                 if (port && !port->gdbstub && port->uart.line == co->index)
1674                         goto found_device;
1675         }
1676
1677         return -ENODEV;
1678
1679 found_device:
1680         switch (port->clock_src) {
1681         case MNSCx_CLOCK_SRC_IOCLK:
1682                 port->ioclk = MN10300_IOCLK;
1683                 break;
1684
1685 #ifdef MN10300_IOBCLK
1686         case MNSCx_CLOCK_SRC_IOBCLK:
1687                 port->ioclk = MN10300_IOBCLK;
1688                 break;
1689 #endif
1690         default:
1691                 BUG();
1692         }
1693
1694         if (options)
1695                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1696
1697         return uart_set_options(&port->uart, co, baud, parity, bits, flow);
1698 }
1699
1700 /*
1701  * register console
1702  */
1703 static int __init mn10300_serial_console_init(void)
1704 {
1705         register_console(&mn10300_serial_console);
1706         return 0;
1707 }
1708
1709 console_initcall(mn10300_serial_console_init);
1710 #endif
1711
1712 #ifdef CONFIG_CONSOLE_POLL
1713 /*
1714  * Polled character reception for the kernel debugger
1715  */
1716 static int mn10300_serial_poll_get_char(struct uart_port *_port)
1717 {
1718         struct mn10300_serial_port *port =
1719                 container_of(_port, struct mn10300_serial_port, uart);
1720         unsigned ix;
1721         u8 st, ch;
1722
1723         _enter("%s", port->name);
1724
1725         if (mn10300_serial_int_tbl[port->rx_irq].port != NULL) {
1726                 do {
1727                         /* pull chars out of the hat */
1728                         ix = ACCESS_ONCE(port->rx_outp);
1729                         if (CIRC_CNT(port->rx_inp, ix, MNSC_BUFFER_SIZE) == 0)
1730                                 return NO_POLL_CHAR;
1731
1732                         smp_read_barrier_depends();
1733                         ch = port->rx_buffer[ix++];
1734                         st = port->rx_buffer[ix++];
1735                         smp_mb();
1736                         port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
1737
1738                 } while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF));
1739         } else {
1740                 do {
1741                         st = *port->_status;
1742                         if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
1743                                 continue;
1744                 } while (!(st & SC01STR_RBF));
1745
1746                 ch = *port->_rxb;
1747         }
1748
1749         return ch;
1750 }
1751
1752
1753 /*
1754  * Polled character transmission for the kernel debugger
1755  */
1756 static void mn10300_serial_poll_put_char(struct uart_port *_port,
1757                                          unsigned char ch)
1758 {
1759         struct mn10300_serial_port *port =
1760                 container_of(_port, struct mn10300_serial_port, uart);
1761         u8 intr, tmp;
1762
1763         /* wait for the transmitter to finish anything it might be doing (and
1764          * this includes the virtual DMA handler, so it might take a while) */
1765         while (*port->_status & (SC01STR_TBF | SC01STR_TXF))
1766                 continue;
1767
1768         /* disable the Tx ready interrupt */
1769         intr = *port->_intr;
1770         *port->_intr = intr & ~SC01ICR_TI;
1771         tmp = *port->_intr;
1772
1773         if (ch == 0x0a) {
1774                 *port->_txb = 0x0d;
1775                 while (*port->_status & SC01STR_TBF)
1776                         continue;
1777         }
1778
1779         *port->_txb = ch;
1780         while (*port->_status & SC01STR_TBF)
1781                 continue;
1782
1783         /* restore the Tx interrupt flag */
1784         *port->_intr = intr;
1785         tmp = *port->_intr;
1786 }
1787
1788 #endif /* CONFIG_CONSOLE_POLL */