arch/mn10300/unit-asb2305/include/unit/timex.h

   1 /* ASB2305 timer specifcations
   2  *
   3  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public Licence
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the Licence, or (at your option) any later version.
  10  */
  11 #ifndef _ASM_UNIT_TIMEX_H
  12 #define _ASM_UNIT_TIMEX_H
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/irq.h>
  16 #endif /* __ASSEMBLY__ */
  17
  18 #include <asm/timer-regs.h>
  19 #include <unit/clock.h>
  20
  21 /*
  22  * jiffies counter specifications
  23  */
  24
  25 #define TMJCBR_MAX              0xffff
  26 #define TMJCBC                  TM01BC
  27
  28 #define TMJCMD                  TM01MD
  29 #define TMJCBR                  TM01BR
  30 #define TMJCIRQ                 TM1IRQ
  31 #define TMJCICR                 TM1ICR
  32 #define TMJCICR_LEVEL           GxICR_LEVEL_5
  33
  34 #ifndef __ASSEMBLY__
  35
  36 static inline void startup_jiffies_counter(void)
  37 {
  38         unsigned rate;
  39         u16 md, t16;
  40
  41         /* use as little prescaling as possible to avoid losing accuracy */
  42         md = TM0MD_SRC_IOCLK;
  43         rate = MN10300_JCCLK / HZ;
  44
  45         if (rate > TMJCBR_MAX) {
  46                 md = TM0MD_SRC_IOCLK_8;
  47                 rate = MN10300_JCCLK / 8 / HZ;
  48
  49                 if (rate > TMJCBR_MAX) {
  50                         md = TM0MD_SRC_IOCLK_32;
  51                         rate = MN10300_JCCLK / 32 / HZ;
  52
  53                         BUG_ON(rate > TMJCBR_MAX);
  54                 }
  55         }
  56
  57         TMJCBR = rate - 1;
  58         t16 = TMJCBR;
  59
  60         TMJCMD =
  61                 md |
  62                 TM1MD_SRC_TM0CASCADE << 8 |
  63                 TM0MD_INIT_COUNTER |
  64                 TM1MD_INIT_COUNTER << 8;
  65
  66         TMJCMD =
  67                 md |
  68                 TM1MD_SRC_TM0CASCADE << 8 |
  69                 TM0MD_COUNT_ENABLE |
  70                 TM1MD_COUNT_ENABLE << 8;
  71
  72         t16 = TMJCMD;
  73
  74         TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
  75         t16 = TMJCICR;
  76 }
  77
  78 static inline void shutdown_jiffies_counter(void)
  79 {
  80 }
  81
  82 #endif /* !__ASSEMBLY__ */
  83
  84
  85 /*
  86  * timestamp counter specifications
  87  */
  88
  89 #define TMTSCBR_MAX             0xffffffff
  90 #define TMTSCBC                 TM45BC
  91
  92 #ifndef __ASSEMBLY__
  93
  94 static inline void startup_timestamp_counter(void)
  95 {
  96         /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
  97          * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
  98          */
  99         TM45BR = TMTSCBR_MAX;
 100
 101         TM4MD = TM4MD_SRC_IOCLK;
 102         TM4MD |= TM4MD_INIT_COUNTER;
 103         TM4MD &= ~TM4MD_INIT_COUNTER;
 104         TM4ICR = 0;
 105
 106         TM5MD = TM5MD_SRC_TM4CASCADE;
 107         TM5MD |= TM5MD_INIT_COUNTER;
 108         TM5MD &= ~TM5MD_INIT_COUNTER;
 109         TM5ICR = 0;
 110
 111         TM5MD |= TM5MD_COUNT_ENABLE;
 112         TM4MD |= TM4MD_COUNT_ENABLE;
 113 }
 114
 115 static inline void shutdown_timestamp_counter(void)
 116 {
 117         TM4MD = 0;
 118         TM5MD = 0;
 119 }
 120
 121 /*
 122  * we use a cascaded pair of 16-bit down-counting timers to count I/O
 123  * clock cycles for the purposes of time keeping
 124  */
 125 typedef unsigned long cycles_t;
 126
 127 static inline cycles_t read_timestamp_counter(void)
 128 {
 129         return (cycles_t) TMTSCBC;
 130 }
 131
 132 #endif /* !__ASSEMBLY__ */
 133
 134 #endif /* _ASM_UNIT_TIMEX_H */