2 * MPC8540 ADS Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "MPC8540ADS", "MPC85xxADS";
27 d-cache-line-size = <20>; // 32 bytes
28 i-cache-line-size = <20>; // 32 bytes
29 d-cache-size = <8000>; // L1, 32K
30 i-cache-size = <8000>; // L1, 32K
31 timebase-frequency = <0>; // 33 MHz, from uboot
32 bus-frequency = <0>; // 166 MHz
33 clock-frequency = <0>; // 825 MHz, from uboot
39 device_type = "memory";
40 reg = <00000000 08000000>; // 128M at 0x0
46 #interrupt-cells = <2>;
48 ranges = <0 e0000000 00100000>;
49 reg = <e0000000 00100000>; // CCSRBAR 1M
54 compatible = "fsl-i2c";
57 interrupt-parent = <&mpic>;
65 compatible = "gianfar";
67 phy0: ethernet-phy@0 {
68 interrupt-parent = <&mpic>;
71 device_type = "ethernet-phy";
73 phy1: ethernet-phy@1 {
74 interrupt-parent = <&mpic>;
77 device_type = "ethernet-phy";
79 phy3: ethernet-phy@3 {
80 interrupt-parent = <&mpic>;
83 device_type = "ethernet-phy";
90 device_type = "network";
92 compatible = "gianfar";
94 address = [ 00 E0 0C 00 73 00 ];
95 local-mac-address = [ 00 E0 0C 00 73 00 ];
96 interrupts = <d 2 e 2 12 2>;
97 interrupt-parent = <&mpic>;
102 #address-cells = <1>;
104 device_type = "network";
106 compatible = "gianfar";
108 address = [ 00 E0 0C 00 73 01 ];
109 local-mac-address = [ 00 E0 0C 00 73 01 ];
110 interrupts = <13 2 14 2 18 2>;
111 interrupt-parent = <&mpic>;
112 phy-handle = <&phy1>;
116 #address-cells = <1>;
118 device_type = "network";
120 compatible = "gianfar";
122 address = [ 00 E0 0C 00 73 02 ];
123 local-mac-address = [ 00 E0 0C 00 73 02 ];
125 interrupt-parent = <&mpic>;
126 phy-handle = <&phy3>;
130 device_type = "serial";
131 compatible = "ns16550";
132 reg = <4500 100>; // reg base, size
133 clock-frequency = <0>; // should we fill in in uboot?
135 interrupt-parent = <&mpic>;
139 device_type = "serial";
140 compatible = "ns16550";
141 reg = <4600 100>; // reg base, size
142 clock-frequency = <0>; // should we fill in in uboot?
144 interrupt-parent = <&mpic>;
147 interrupt-map-mask = <f800 0 0 7>;
151 1000 0 0 1 &mpic 31 1
152 1000 0 0 2 &mpic 32 1
153 1000 0 0 3 &mpic 33 1
154 1000 0 0 4 &mpic 34 1
157 1800 0 0 1 &mpic 34 1
158 1800 0 0 2 &mpic 31 1
159 1800 0 0 3 &mpic 32 1
160 1800 0 0 4 &mpic 33 1
163 2000 0 0 1 &mpic 33 1
164 2000 0 0 2 &mpic 34 1
165 2000 0 0 3 &mpic 31 1
166 2000 0 0 4 &mpic 32 1
169 2800 0 0 1 &mpic 32 1
170 2800 0 0 2 &mpic 33 1
171 2800 0 0 3 &mpic 34 1
172 2800 0 0 4 &mpic 31 1
175 6000 0 0 1 &mpic 31 1
176 6000 0 0 2 &mpic 32 1
177 6000 0 0 3 &mpic 33 1
178 6000 0 0 4 &mpic 34 1
181 6800 0 0 1 &mpic 34 1
182 6800 0 0 2 &mpic 31 1
183 6800 0 0 3 &mpic 32 1
184 6800 0 0 4 &mpic 33 1
187 7000 0 0 1 &mpic 33 1
188 7000 0 0 2 &mpic 34 1
189 7000 0 0 3 &mpic 31 1
190 7000 0 0 4 &mpic 32 1
193 7800 0 0 1 &mpic 32 1
194 7800 0 0 2 &mpic 33 1
195 7800 0 0 3 &mpic 34 1
196 7800 0 0 4 &mpic 31 1
199 9000 0 0 1 &mpic 31 1
200 9000 0 0 2 &mpic 32 1
201 9000 0 0 3 &mpic 33 1
202 9000 0 0 4 &mpic 34 1
205 9800 0 0 1 &mpic 34 1
206 9800 0 0 2 &mpic 31 1
207 9800 0 0 3 &mpic 32 1
208 9800 0 0 4 &mpic 33 1
211 a000 0 0 1 &mpic 33 1
212 a000 0 0 2 &mpic 34 1
213 a000 0 0 3 &mpic 31 1
214 a000 0 0 4 &mpic 32 1
217 a800 0 0 1 &mpic 32 1
218 a800 0 0 2 &mpic 33 1
219 a800 0 0 3 &mpic 34 1
220 a800 0 0 4 &mpic 31 1>;
221 interrupt-parent = <&mpic>;
224 ranges = <02000000 0 80000000 80000000 0 20000000
225 01000000 0 00000000 e2000000 0 00100000>;
226 clock-frequency = <3f940aa>;
227 #interrupt-cells = <1>;
229 #address-cells = <3>;
236 clock-frequency = <0>;
237 interrupt-controller;
238 #address-cells = <0>;
239 #interrupt-cells = <2>;
242 compatible = "chrp,open-pic";
243 device_type = "open-pic";