arch/powerpc/boot/dts/sbc8349.dts

   1 /*
   2  * SBC8349E Device Tree Source
   3  *
   4  * Copyright 2007 Wind River Inc.
   5  *
   6  * Paul Gortmaker (see MAINTAINERS for contact information)
   7  *
   8  *      -based largely on the Freescale MPC834x_MDS dts.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 /dts-v1/;
  17
  18 / {
  19         model = "SBC8349E";
  20         compatible = "SBC834xE";
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23
  24         aliases {
  25                 ethernet0 = &enet0;
  26                 ethernet1 = &enet1;
  27                 serial0 = &serial0;
  28                 serial1 = &serial1;
  29                 pci0 = &pci0;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8349@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         d-cache-line-size = <0x20>;     // 32 bytes
  40                         i-cache-line-size = <0x20>;     // 32 bytes
  41                         d-cache-size = <0x8000>;                // L1, 32K
  42                         i-cache-size = <0x8000>;                // L1, 32K
  43                         timebase-frequency = <0>;       // from bootloader
  44                         bus-frequency = <0>;            // from bootloader
  45                         clock-frequency = <0>;          // from bootloader
  46                 };
  47         };
  48
  49         memory {
  50                 device_type = "memory";
  51                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  52         };
  53
  54         soc8349@e0000000 {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 device_type = "soc";
  58                 ranges = <0x0 0xe0000000 0x00100000>;
  59                 reg = <0xe0000000 0x00000200>;
  60                 bus-frequency = <0>;
  61
  62                 wdt@200 {
  63                         compatible = "mpc83xx_wdt";
  64                         reg = <0x200 0x100>;
  65                 };
  66
  67                 i2c@3000 {
  68                         #address-cells = <1>;
  69                         #size-cells = <0>;
  70                         cell-index = <0>;
  71                         compatible = "fsl-i2c";
  72                         reg = <0x3000 0x100>;
  73                         interrupts = <0xe 0x8>;
  74                         interrupt-parent = <&ipic>;
  75                         dfsrr;
  76                 };
  77
  78                 i2c@3100 {
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81                         cell-index = <1>;
  82                         compatible = "fsl-i2c";
  83                         reg = <0x3100 0x100>;
  84                         interrupts = <0xf 0x8>;
  85                         interrupt-parent = <&ipic>;
  86                         dfsrr;
  87                 };
  88
  89                 spi@7000 {
  90                         compatible = "fsl_spi";
  91                         reg = <0x7000 0x1000>;
  92                         interrupts = <0x10 0x8>;
  93                         interrupt-parent = <&ipic>;
  94                         mode = "cpu";
  95                 };
  96
  97                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
  98                 /* port = 0 or 1 */
  99                 usb@22000 {
 100                         compatible = "fsl-usb2-mph";
 101                         reg = <0x22000 0x1000>;
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         interrupt-parent = <&ipic>;
 105                         interrupts = <0x27 0x8>;
 106                         phy_type = "ulpi";
 107                         port1;
 108                 };
 109                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 110                 usb@23000 {
 111                         device_type = "usb";
 112                         compatible = "fsl-usb2-dr";
 113                         reg = <0x23000 0x1000>;
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116                         interrupt-parent = <&ipic>;
 117                         interrupts = <0x26 0x8>;
 118                         dr_mode = "otg";
 119                         phy_type = "ulpi";
 120                 };
 121
 122                 mdio@24520 {
 123                         #address-cells = <1>;
 124                         #size-cells = <0>;
 125                         compatible = "fsl,gianfar-mdio";
 126                         reg = <0x24520 0x20>;
 127
 128                         phy0: ethernet-phy@19 {
 129                                 interrupt-parent = <&ipic>;
 130                                 interrupts = <0x14 0x8>;
 131                                 reg = <0x19>;
 132                                 device_type = "ethernet-phy";
 133                         };
 134                         phy1: ethernet-phy@1a {
 135                                 interrupt-parent = <&ipic>;
 136                                 interrupts = <0x15 0x8>;
 137                                 reg = <0x1a>;
 138                                 device_type = "ethernet-phy";
 139                         };
 140                 };
 141
 142                 enet0: ethernet@24000 {
 143                         cell-index = <0>;
 144                         device_type = "network";
 145                         model = "TSEC";
 146                         compatible = "gianfar";
 147                         reg = <0x24000 0x1000>;
 148                         local-mac-address = [ 00 00 00 00 00 00 ];
 149                         interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
 150                         interrupt-parent = <&ipic>;
 151                         phy-handle = <&phy0>;
 152                         linux,network-index = <0>;
 153                 };
 154
 155                 enet1: ethernet@25000 {
 156                         cell-index = <1>;
 157                         device_type = "network";
 158                         model = "TSEC";
 159                         compatible = "gianfar";
 160                         reg = <0x25000 0x1000>;
 161                         local-mac-address = [ 00 00 00 00 00 00 ];
 162                         interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
 163                         interrupt-parent = <&ipic>;
 164                         phy-handle = <&phy1>;
 165                         linux,network-index = <1>;
 166                 };
 167
 168                 serial0: serial@4500 {
 169                         cell-index = <0>;
 170                         device_type = "serial";
 171                         compatible = "ns16550";
 172                         reg = <0x4500 0x100>;
 173                         clock-frequency = <0>;
 174                         interrupts = <0x9 0x8>;
 175                         interrupt-parent = <&ipic>;
 176                 };
 177
 178                 serial1: serial@4600 {
 179                         cell-index = <1>;
 180                         device_type = "serial";
 181                         compatible = "ns16550";
 182                         reg = <0x4600 0x100>;
 183                         clock-frequency = <0>;
 184                         interrupts = <0xa 0x8>;
 185                         interrupt-parent = <&ipic>;
 186                 };
 187
 188                 /* May need to remove if on a part without crypto engine */
 189                 crypto@30000 {
 190                         model = "SEC2";
 191                         compatible = "talitos";
 192                         reg = <0x30000 0x10000>;
 193                         interrupts = <0xb 0x8>;
 194                         interrupt-parent = <&ipic>;
 195                         num-channels = <4>;
 196                         channel-fifo-len = <0x18>;
 197                         exec-units-mask = <0x0000007e>;
 198                         /* desc mask is for rev2.0,
 199                          * we need runtime fixup for >2.0 */
 200                         descriptor-types-mask = <0x01010ebf>;
 201                 };
 202
 203                 /* IPIC
 204                  * interrupts cell = <intr #, sense>
 205                  * sense values match linux IORESOURCE_IRQ_* defines:
 206                  * sense == 8: Level, low assertion
 207                  * sense == 2: Edge, high-to-low change
 208                  */
 209                 ipic: pic@700 {
 210                         interrupt-controller;
 211                         #address-cells = <0>;
 212                         #interrupt-cells = <2>;
 213                         reg = <0x700 0x100>;
 214                         device_type = "ipic";
 215                 };
 216         };
 217
 218         pci0: pci@e0008500 {
 219                 cell-index = <1>;
 220                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 221                 interrupt-map = <
 222
 223                                 /* IDSEL 0x11 */
 224                                  0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
 225                                  0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
 226                                  0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
 227                                  0x8800 0x0 0x0 0x4 &ipic 0x17 0x8>;
 228
 229                 interrupt-parent = <&ipic>;
 230                 interrupts = <0x42 0x8>;
 231                 bus-range = <0 0>;
 232                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 233                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 234                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 235                 clock-frequency = <66666666>;
 236                 #interrupt-cells = <1>;
 237                 #size-cells = <2>;
 238                 #address-cells = <3>;
 239                 reg = <0xe0008500 0x100>;
 240                 compatible = "fsl,mpc8349-pci";
 241                 device_type = "pci";
 242         };
 243 };