1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
51 #ifdef CONFIG_RELOCATABLE
52 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
53 ld r12,PACAKBASE(r13); /* get high part of &label */ \
54 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
55 LOAD_HANDLER(r12,label); \
57 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
59 mtmsrd r10,1; /* Set RI (EE=0) */ \
62 /* If not relocatable, we can jump directly -- and save messing with LR */
63 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
64 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
65 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
67 mtmsrd r10,1; /* Set RI (EE=0) */ \
72 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
73 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
74 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
76 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
77 EXCEPTION_PROLOG_1(area, extra, vec); \
78 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
81 * We're short on space and time in the exception prolog, so we can't
82 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
83 * low halfword of the address, but for Kdump we need the whole low
86 #define LOAD_HANDLER(reg, label) \
87 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \
88 ori reg,reg,(label)-_stext; /* virt addr of handler ... */
90 /* Exception register prefixes */
94 #if defined(CONFIG_RELOCATABLE)
96 * If we support interrupts with relocation on AND we're a relocatable
97 * kernel, we need to use LR to get to the 2nd level handler. So, save/restore
100 #define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13)
101 #define GET_LR(reg, area) ld reg,area+EX_LR(r13)
102 #define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg
104 /* ...else LR is unused and in register. */
105 #define SAVE_LR(reg, area)
106 #define GET_LR(reg, area) mflr reg
107 #define RESTORE_LR(reg, area)
110 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
112 std r9,area+EX_R9(r13); /* save r9 - r12 */ \
113 std r10,area+EX_R10(r13); \
114 BEGIN_FTR_SECTION_NESTED(66); \
115 mfspr r10,SPRN_CFAR; \
116 std r10,area+EX_CFAR(r13); \
117 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
120 std r11,area+EX_R11(r13); \
121 std r12,area+EX_R12(r13); \
123 std r10,area+EX_R13(r13)
124 #define EXCEPTION_PROLOG_1(area, extra, vec) \
125 __EXCEPTION_PROLOG_1(area, extra, vec)
127 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
128 ld r12,PACAKBASE(r13); /* get high part of &label */ \
129 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
130 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
131 LOAD_HANDLER(r12,label) \
132 mtspr SPRN_##h##SRR0,r12; \
133 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
134 mtspr SPRN_##h##SRR1,r10; \
136 b . /* prevent speculative execution */
137 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
138 __EXCEPTION_PROLOG_PSERIES_1(label, h)
140 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
141 EXCEPTION_PROLOG_1(area, extra, vec); \
142 EXCEPTION_PROLOG_PSERIES_1(label, h);
144 #define __KVMTEST(n) \
145 lbz r10,HSTATE_IN_GUEST(r13); \
149 #define __KVM_HANDLER(area, h, n) \
151 ld r10,area+EX_R10(r13); \
152 stw r9,HSTATE_SCRATCH1(r13); \
153 ld r9,area+EX_R9(r13); \
154 std r12,HSTATE_SCRATCH0(r13); \
158 #define __KVM_HANDLER_SKIP(area, h, n) \
160 cmpwi r10,KVM_GUEST_MODE_SKIP; \
161 ld r10,area+EX_R10(r13); \
163 stw r9,HSTATE_SCRATCH1(r13); \
164 ld r9,area+EX_R9(r13); \
165 std r12,HSTATE_SCRATCH0(r13); \
167 b kvmppc_interrupt; \
168 89: mtocrf 0x80,r9; \
169 ld r9,area+EX_R9(r13); \
170 b kvmppc_skip_##h##interrupt
172 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
173 #define KVMTEST(n) __KVMTEST(n)
174 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
175 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
179 #define KVM_HANDLER(area, h, n)
180 #define KVM_HANDLER_SKIP(area, h, n)
183 #ifdef CONFIG_KVM_BOOK3S_PR
184 #define KVMTEST_PR(n) __KVMTEST(n)
185 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
186 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
189 #define KVMTEST_PR(n)
190 #define KVM_HANDLER_PR(area, h, n)
191 #define KVM_HANDLER_PR_SKIP(area, h, n)
197 * The common exception prolog is used for all except a few exceptions
198 * such as a segment miss on a kernel address. We have to be prepared
199 * to take another exception from the point where we first touch the
200 * kernel stack onwards.
202 * On entry r13 points to the paca, r9-r13 are saved in the paca,
203 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
204 * SRR1, and relocation is on.
206 #define EXCEPTION_PROLOG_COMMON(n, area) \
207 andi. r10,r12,MSR_PR; /* See if coming from user */ \
208 mr r10,r1; /* Save r1 */ \
209 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
211 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
212 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
213 blt+ cr1,3f; /* abort if it is */ \
214 li r1,(n); /* will be reloaded later */ \
215 sth r1,PACA_TRAP_SAVE(r13); \
216 std r3,area+EX_R3(r13); \
217 addi r3,r13,area; /* r3 -> where regs are saved*/ \
219 3: std r9,_CCR(r1); /* save CR in stackframe */ \
220 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
221 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
222 std r10,0(r1); /* make stack chain pointer */ \
223 std r0,GPR0(r1); /* save r0 in stackframe */ \
224 std r10,GPR1(r1); /* save r1 in stackframe */ \
225 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
226 std r2,GPR2(r1); /* save r2 in stackframe */ \
227 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
228 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
229 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
230 ld r10,area+EX_R10(r13); \
233 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
234 ld r10,area+EX_R12(r13); \
235 ld r11,area+EX_R13(r13); \
239 BEGIN_FTR_SECTION_NESTED(66); \
240 ld r10,area+EX_CFAR(r13); \
241 std r10,ORIG_GPR3(r1); \
242 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
243 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
244 mflr r9; /* save LR in stackframe */ \
246 mfctr r10; /* save CTR in stackframe */ \
248 lbz r10,PACASOFTIRQEN(r13); \
249 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
253 std r9,_TRAP(r1); /* set trap number */ \
255 ld r11,exception_marker@toc(r2); \
256 std r10,RESULT(r1); /* clear regs->result */ \
257 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
263 #define STD_EXCEPTION_PSERIES(loc, vec, label) \
265 .globl label##_pSeries; \
268 SET_SCRATCH0(r13); /* save r13 */ \
269 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
270 EXC_STD, KVMTEST_PR, vec)
272 #define STD_EXCEPTION_HV(loc, vec, label) \
277 SET_SCRATCH0(r13); /* save r13 */ \
278 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
279 EXC_HV, KVMTEST, vec)
281 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
283 .globl label##_relon_pSeries; \
284 label##_relon_pSeries: \
286 /* No guest interrupts come through here */ \
287 SET_SCRATCH0(r13); /* save r13 */ \
288 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
289 EXC_STD, KVMTEST_PR, vec)
291 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
293 .globl label##_relon_hv; \
296 /* No guest interrupts come through here */ \
297 SET_SCRATCH0(r13); /* save r13 */ \
298 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
299 EXC_HV, KVMTEST, vec)
301 /* This associate vector numbers with bits in paca->irq_happened */
302 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
303 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
304 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
305 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
307 #define __SOFTEN_TEST(h, vec) \
308 lbz r10,PACASOFTIRQEN(r13); \
310 li r10,SOFTEN_VALUE_##vec; \
311 beq masked_##h##interrupt
312 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
314 #define SOFTEN_TEST_PR(vec) \
316 _SOFTEN_TEST(EXC_STD, vec)
318 #define SOFTEN_TEST_HV(vec) \
320 _SOFTEN_TEST(EXC_HV, vec)
322 #define SOFTEN_TEST_HV_201(vec) \
324 _SOFTEN_TEST(EXC_STD, vec)
326 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
327 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
329 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
331 SET_SCRATCH0(r13); /* save r13 */ \
332 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
333 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
334 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
335 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
337 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
339 .globl label##_pSeries; \
341 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
342 EXC_STD, SOFTEN_TEST_PR)
344 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
348 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
349 EXC_HV, SOFTEN_TEST_HV)
351 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
353 SET_SCRATCH0(r13); /* save r13 */ \
354 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
355 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
356 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
357 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
359 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
361 .globl label##_relon_pSeries; \
362 label##_relon_pSeries: \
363 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
364 EXC_STD, SOFTEN_NOTEST_PR)
366 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
368 .globl label##_relon_hv; \
370 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
371 EXC_HV, SOFTEN_NOTEST_HV)
374 * Our exception common code can be passed various "additions"
375 * to specify the behaviour of interrupts, whether to kick the
379 /* Exception addition: Hard disable interrupts */
380 #define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
385 #define RUNLATCH_ON \
387 CURRENT_THREAD_INFO(r3, r1); \
388 ld r4,TI_LOCAL_FLAGS(r3); \
389 andi. r0,r4,_TLF_RUNLATCH; \
390 beql ppc64_runlatch_on_trampoline; \
391 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
393 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
395 .globl label##_common; \
397 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
399 addi r3,r1,STACK_FRAME_OVERHEAD; \
403 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
404 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
405 ADD_NVGPRS;DISABLE_INTS)
408 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
409 * in the idle task and therefore need the special idle handling
410 * (finish nap and runlatch)
412 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
413 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
414 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
417 * When the idle code in power4_idle puts the CPU into NAP mode,
418 * it has to do so in a loop, and relies on the external interrupt
419 * and decrementer interrupt entry code to get it out of the loop.
420 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
421 * to signal that it is in the loop and needs help to get out.
423 #ifdef CONFIG_PPC_970_NAP
426 CURRENT_THREAD_INFO(r11, r1); \
427 ld r9,TI_LOCAL_FLAGS(r11); \
428 andi. r10,r9,_TLF_NAPPING; \
429 bnel power4_fixup_nap; \
430 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
435 #endif /* _ASM_POWERPC_EXCEPTION_H */