1 #ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
2 #define _ASM_POWERPC_PGTABLE_PPC64_H_
4 * This file contains the functions and defines necessary to modify and use
5 * the ppc64 hashed page table.
8 #ifdef CONFIG_PPC_64K_PAGES
9 #include <asm/pgtable-ppc64-64k.h>
11 #include <asm/pgtable-ppc64-4k.h>
14 #define FIRST_USER_ADDRESS 0
17 * Size of EA range mapped by our pagetables.
19 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
20 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
21 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
25 * Define the address range of the kernel non-linear virtual area
28 #ifdef CONFIG_PPC_BOOK3E
29 #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
31 #define KERN_VIRT_START ASM_CONST(0xD000000000000000)
33 #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
36 * The vmalloc space starts at the beginning of that region, and
37 * occupies half of it on hash CPUs and a quarter of it on Book3E
38 * (we keep a quarter for the virtual memmap)
40 #define VMALLOC_START KERN_VIRT_START
41 #ifdef CONFIG_PPC_BOOK3E
42 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2)
44 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
46 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
49 * The second half of the kernel virtual space is used for IO mappings,
50 * it's itself carved into the PIO region (ISA and PHB IO space) and
53 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
54 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
55 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
57 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
58 #define FULL_IO_SIZE 0x80000000ul
59 #define ISA_IO_BASE (KERN_IO_START)
60 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
61 #define PHB_IO_BASE (ISA_IO_END)
62 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
63 #define IOREMAP_BASE (PHB_IO_END)
64 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
70 #define REGION_SHIFT 60UL
71 #define REGION_MASK (0xfUL << REGION_SHIFT)
72 #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
74 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
75 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
76 #define VMEMMAP_REGION_ID (0xfUL) /* Server only */
77 #define USER_REGION_ID (0UL)
80 * Defines the address of the vmemap area, in its own region on
81 * hash table CPUs and after the vmalloc space on Book3E
83 #ifdef CONFIG_PPC_BOOK3E
84 #define VMEMMAP_BASE VMALLOC_END
85 #define VMEMMAP_END KERN_IO_START
87 #define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
89 #define vmemmap ((struct page *)VMEMMAP_BASE)
93 * Include the PTE bits definitions
95 #ifdef CONFIG_PPC_BOOK3S
96 #include <asm/pte-hash64.h>
98 #include <asm/pte-book3e.h>
100 #include <asm/pte-common.h>
102 #ifdef CONFIG_PPC_MM_SLICES
103 #define HAVE_ARCH_UNMAPPED_AREA
104 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
105 #endif /* CONFIG_PPC_MM_SLICES */
110 * This is the default implementation of various PTE accessors, it's
111 * used in all cases except Book3S with 64K pages where we have a
112 * concept of sub-pages
116 #ifdef STRICT_MM_TYPECHECKS
117 #define __real_pte(e,p) ((real_pte_t){(e)})
118 #define __rpte_to_pte(r) ((r).pte)
120 #define __real_pte(e,p) (e)
121 #define __rpte_to_pte(r) (__pte(r))
123 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
125 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
128 shift = mmu_psize_defs[psize].shift; \
130 #define pte_iterate_hashed_end() } while(0)
132 #ifdef CONFIG_PPC_HAS_HASH_64K
133 #define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
135 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
138 #endif /* __real_pte */
141 /* pte_clear moved to later in this file */
143 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
144 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
146 #define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
147 #define pmd_none(pmd) (!pmd_val(pmd))
148 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
149 || (pmd_val(pmd) & PMD_BAD_BITS))
150 #define pmd_present(pmd) (pmd_val(pmd) != 0)
151 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
152 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
153 #define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd))
155 #define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
156 #define pud_none(pud) (!pud_val(pud))
157 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
158 || (pud_val(pud) & PUD_BAD_BITS))
159 #define pud_present(pud) (pud_val(pud) != 0)
160 #define pud_clear(pudp) (pud_val(*(pudp)) = 0)
161 #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
162 #define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
164 #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
167 * Find an entry in a page-table-directory. We combine the address region
168 * (the high order N bits) and the pgd portion of the address.
170 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
172 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
174 #define pmd_offset(pudp,addr) \
175 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
177 #define pte_offset_kernel(dir,addr) \
178 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
180 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
181 #define pte_unmap(pte) do { } while(0)
183 /* to find an entry in a kernel page-table-directory */
184 /* This now only contains the vmalloc pages */
185 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
186 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
187 pte_t *ptep, unsigned long pte, int huge);
189 /* Atomic PTE updates */
190 static inline unsigned long pte_update(struct mm_struct *mm,
192 pte_t *ptep, unsigned long clr,
195 #ifdef PTE_ATOMIC_UPDATES
196 unsigned long old, tmp;
198 __asm__ __volatile__(
199 "1: ldarx %0,0,%3 # pte_update\n\
205 : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
206 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
209 unsigned long old = pte_val(*ptep);
210 *ptep = __pte(old & ~clr);
212 /* huge pages use the old page table lock */
214 assert_pte_locked(mm, addr);
216 #ifdef CONFIG_PPC_STD_MMU_64
217 if (old & _PAGE_HASHPTE)
218 hpte_need_flush(mm, addr, ptep, old, huge);
224 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
225 unsigned long addr, pte_t *ptep)
229 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
231 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0);
232 return (old & _PAGE_ACCESSED) != 0;
234 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
235 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
238 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
242 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
243 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
247 if ((pte_val(*ptep) & _PAGE_RW) == 0)
250 pte_update(mm, addr, ptep, _PAGE_RW, 0);
253 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
254 unsigned long addr, pte_t *ptep)
256 if ((pte_val(*ptep) & _PAGE_RW) == 0)
259 pte_update(mm, addr, ptep, _PAGE_RW, 1);
263 * We currently remove entries from the hashtable regardless of whether
264 * the entry was young or dirty. The generic routines only flush if the
265 * entry was young or dirty which is not good enough.
267 * We should be more intelligent about this but for the moment we override
268 * these functions and force a tlb flush unconditionally
270 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
271 #define ptep_clear_flush_young(__vma, __address, __ptep) \
273 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
278 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
279 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
280 unsigned long addr, pte_t *ptep)
282 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0);
286 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
289 pte_update(mm, addr, ptep, ~0UL, 0);
293 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
294 * function doesn't need to flush the hash entry
296 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
298 unsigned long bits = pte_val(entry) &
299 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
301 #ifdef PTE_ATOMIC_UPDATES
302 unsigned long old, tmp;
304 __asm__ __volatile__(
311 :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
312 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
315 unsigned long old = pte_val(*ptep);
316 *ptep = __pte(old | bits);
320 #define __HAVE_ARCH_PTE_SAME
321 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
323 #define pte_ERROR(e) \
324 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
325 #define pmd_ERROR(e) \
326 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
327 #define pgd_ERROR(e) \
328 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
330 /* Encode and de-code a swap entry */
331 #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
332 #define __swp_offset(entry) ((entry).val >> 8)
333 #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
334 #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
335 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
336 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
337 #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
338 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
340 void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
341 void pgtable_cache_init(void);
344 * find_linux_pte returns the address of a linux pte for a given
345 * effective address and directory. If not found, it returns zero.
347 static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
354 pg = pgdir + pgd_index(ea);
355 if (!pgd_none(*pg)) {
356 pu = pud_offset(pg, ea);
357 if (!pud_none(*pu)) {
358 pm = pmd_offset(pu, ea);
359 if (pmd_present(*pm))
360 pt = pte_offset_kernel(pm, ea);
366 #ifdef CONFIG_HUGETLB_PAGE
367 pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
370 static inline pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea,
375 return find_linux_pte(pgdir, ea);
377 #endif /* !CONFIG_HUGETLB_PAGE */
379 #endif /* __ASSEMBLY__ */
381 #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */