2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/iommu.h>
31 #include <linux/proc_fs.h>
32 #include <linux/rbtree.h>
33 #include <linux/reboot.h>
34 #include <linux/seq_file.h>
35 #include <linux/spinlock.h>
36 #include <linux/export.h>
39 #include <linux/atomic.h>
40 #include <asm/debug.h>
42 #include <asm/eeh_event.h>
44 #include <asm/iommu.h>
45 #include <asm/machdep.h>
46 #include <asm/ppc-pci.h>
51 * EEH, or "Extended Error Handling" is a PCI bridge technology for
52 * dealing with PCI bus errors that can't be dealt with within the
53 * usual PCI framework, except by check-stopping the CPU. Systems
54 * that are designed for high-availability/reliability cannot afford
55 * to crash due to a "mere" PCI error, thus the need for EEH.
56 * An EEH-capable bridge operates by converting a detected error
57 * into a "slot freeze", taking the PCI adapter off-line, making
58 * the slot behave, from the OS'es point of view, as if the slot
59 * were "empty": all reads return 0xff's and all writes are silently
60 * ignored. EEH slot isolation events can be triggered by parity
61 * errors on the address or data busses (e.g. during posted writes),
62 * which in turn might be caused by low voltage on the bus, dust,
63 * vibration, humidity, radioactivity or plain-old failed hardware.
65 * Note, however, that one of the leading causes of EEH slot
66 * freeze events are buggy device drivers, buggy device microcode,
67 * or buggy device hardware. This is because any attempt by the
68 * device to bus-master data to a memory address that is not
69 * assigned to the device will trigger a slot freeze. (The idea
70 * is to prevent devices-gone-wild from corrupting system memory).
71 * Buggy hardware/drivers will have a miserable time co-existing
74 * Ideally, a PCI device driver, when suspecting that an isolation
75 * event has occurred (e.g. by reading 0xff's), will then ask EEH
76 * whether this is the case, and then take appropriate steps to
77 * reset the PCI slot, the PCI device, and then resume operations.
78 * However, until that day, the checking is done here, with the
79 * eeh_check_failure() routine embedded in the MMIO macros. If
80 * the slot is found to be isolated, an "EEH Event" is synthesized
81 * and sent out for processing.
84 /* If a device driver keeps reading an MMIO register in an interrupt
85 * handler after a slot isolation event, it might be broken.
86 * This sets the threshold for how many read attempts we allow
87 * before printing an error message.
89 #define EEH_MAX_FAILS 2100000
91 /* Time to wait for a PCI slot to report status, in milliseconds */
92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
95 * EEH probe mode support, which is part of the flags,
96 * is to support multiple platforms for EEH. Some platforms
97 * like pSeries do PCI emunation based on device tree.
98 * However, other platforms like powernv probe PCI devices
99 * from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for
101 * particular OF node or PCI device so that the corresponding
102 * PE would be created there.
104 int eeh_subsystem_flags;
105 EXPORT_SYMBOL(eeh_subsystem_flags);
107 /* Platform dependent EEH operations */
108 struct eeh_ops *eeh_ops = NULL;
110 /* Lock to avoid races due to multiple reports of an error */
111 DEFINE_RAW_SPINLOCK(confirm_error_lock);
113 /* Lock to protect passed flags */
114 static DEFINE_MUTEX(eeh_dev_mutex);
116 /* Buffer for reporting pci register dumps. Its here in BSS, and
117 * not dynamically alloced, so that it ends up in RMO where RTAS
120 #define EEH_PCI_REGS_LOG_LEN 4096
121 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
124 * The struct is used to maintain the EEH global statistic
125 * information. Besides, the EEH global statistics will be
126 * exported to user space through procfs
129 u64 no_device; /* PCI device not found */
130 u64 no_dn; /* OF node not found */
131 u64 no_cfg_addr; /* Config address not found */
132 u64 ignored_check; /* EEH check skipped */
133 u64 total_mmio_ffs; /* Total EEH checks */
134 u64 false_positives; /* Unnecessary EEH checks */
135 u64 slot_resets; /* PE reset */
138 static struct eeh_stats eeh_stats;
140 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
142 static int __init eeh_setup(char *str)
144 if (!strcmp(str, "off"))
145 eeh_add_flag(EEH_FORCE_DISABLED);
149 __setup("eeh=", eeh_setup);
152 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
153 * @edev: device to report data for
154 * @buf: point to buffer in which to log
155 * @len: amount of room in buffer
157 * This routine captures assorted PCI configuration space data,
158 * and puts them into a buffer for RTAS error logging.
160 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char *buf, size_t len)
162 struct device_node *dn = eeh_dev_to_of_node(edev);
168 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
169 pr_warn("EEH: of node=%s\n", dn->full_name);
171 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
172 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
173 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
175 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
176 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
177 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
179 /* Gather bridge-specific registers */
180 if (edev->mode & EEH_DEV_BRIDGE) {
181 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
182 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
183 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
185 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
186 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
187 pr_warn("EEH: Bridge control: %04x\n", cfg);
190 /* Dump out the PCI-X command and status regs */
191 cap = edev->pcix_cap;
193 eeh_ops->read_config(dn, cap, 4, &cfg);
194 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
195 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
197 eeh_ops->read_config(dn, cap+4, 4, &cfg);
198 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
199 pr_warn("EEH: PCI-X status: %08x\n", cfg);
202 /* If PCI-E capable, dump PCI-E cap 10 */
203 cap = edev->pcie_cap;
205 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
206 pr_warn("EEH: PCI-E capabilities and status follow:\n");
208 for (i=0; i<=8; i++) {
209 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
210 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
214 pr_warn("%s\n", buffer);
216 l = scnprintf(buffer, sizeof(buffer),
217 "EEH: PCI-E %02x: %08x ",
220 l += scnprintf(buffer+l, sizeof(buffer)-l,
226 pr_warn("%s\n", buffer);
229 /* If AER capable, dump it */
232 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
233 pr_warn("EEH: PCI-E AER capability register set follows:\n");
235 for (i=0; i<=13; i++) {
236 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
237 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
241 pr_warn("%s\n", buffer);
243 l = scnprintf(buffer, sizeof(buffer),
244 "EEH: PCI-E AER %02x: %08x ",
247 l += scnprintf(buffer+l, sizeof(buffer)-l,
252 pr_warn("%s\n", buffer);
259 * eeh_slot_error_detail - Generate combined log including driver log and error log
261 * @severity: temporary or permanent error log
263 * This routine should be called to generate the combined log, which
264 * is comprised of driver log and error log. The driver log is figured
265 * out from the config space of the corresponding PCI device, while
266 * the error log is fetched through platform dependent function call.
268 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
271 struct eeh_dev *edev, *tmp;
274 * When the PHB is fenced or dead, it's pointless to collect
275 * the data from PCI config space because it should return
276 * 0xFF's. For ER, we still retrieve the data from the PCI
279 * For pHyp, we have to enable IO for log retrieval. Otherwise,
280 * 0xFF's is always returned from PCI config space.
282 if (!(pe->type & EEH_PE_PHB)) {
283 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG))
284 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
285 eeh_ops->configure_bridge(pe);
286 eeh_pe_restore_bars(pe);
289 eeh_pe_for_each_dev(pe, edev, tmp) {
290 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
291 EEH_PCI_REGS_LOG_LEN - loglen);
295 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
299 * eeh_token_to_phys - Convert EEH address token to phys address
300 * @token: I/O token, should be address in the form 0xA....
302 * This routine should be called to convert virtual I/O address
305 static inline unsigned long eeh_token_to_phys(unsigned long token)
312 * We won't find hugepages here, iomem
314 ptep = find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
317 WARN_ON(hugepage_shift);
318 pa = pte_pfn(*ptep) << PAGE_SHIFT;
320 return pa | (token & (PAGE_SIZE-1));
324 * On PowerNV platform, we might already have fenced PHB there.
325 * For that case, it's meaningless to recover frozen PE. Intead,
326 * We have to handle fenced PHB firstly.
328 static int eeh_phb_check_failure(struct eeh_pe *pe)
330 struct eeh_pe *phb_pe;
334 if (!eeh_has_flag(EEH_PROBE_MODE_DEV))
337 /* Find the PHB PE */
338 phb_pe = eeh_phb_pe_get(pe->phb);
340 pr_warn("%s Can't find PE for PHB#%d\n",
341 __func__, pe->phb->global_number);
345 /* If the PHB has been in problematic state */
346 eeh_serialize_lock(&flags);
347 if (phb_pe->state & EEH_PE_ISOLATED) {
352 /* Check PHB state */
353 ret = eeh_ops->get_state(phb_pe, NULL);
355 (ret == EEH_STATE_NOT_SUPPORT) ||
356 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
357 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
362 /* Isolate the PHB and send event */
363 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
364 eeh_serialize_unlock(flags);
366 pr_err("EEH: PHB#%x failure detected, location: %s\n",
367 phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe));
369 eeh_send_failure_event(phb_pe);
373 eeh_serialize_unlock(flags);
378 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
381 * Check for an EEH failure for the given device node. Call this
382 * routine if the result of a read was all 0xff's and you want to
383 * find out if this is due to an EEH slot freeze. This routine
384 * will query firmware for the EEH status.
386 * Returns 0 if there has not been an EEH error; otherwise returns
387 * a non-zero value and queues up a slot isolation event notification.
389 * It is safe to call this routine in an interrupt context.
391 int eeh_dev_check_failure(struct eeh_dev *edev)
394 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
396 struct device_node *dn;
398 struct eeh_pe *pe, *parent_pe, *phb_pe;
400 const char *location;
402 eeh_stats.total_mmio_ffs++;
411 dn = eeh_dev_to_of_node(edev);
412 dev = eeh_dev_to_pci_dev(edev);
413 pe = eeh_dev_to_pe(edev);
415 /* Access to IO BARs might get this far and still not want checking. */
417 eeh_stats.ignored_check++;
418 pr_debug("EEH: Ignored check for %s %s\n",
419 eeh_pci_name(dev), dn->full_name);
423 if (!pe->addr && !pe->config_addr) {
424 eeh_stats.no_cfg_addr++;
429 * On PowerNV platform, we might already have fenced PHB
430 * there and we need take care of that firstly.
432 ret = eeh_phb_check_failure(pe);
437 * If the PE isn't owned by us, we shouldn't check the
438 * state. Instead, let the owner handle it if the PE has
441 if (eeh_pe_passed(pe))
444 /* If we already have a pending isolation event for this
445 * slot, we know it's bad already, we don't need to check.
446 * Do this checking under a lock; as multiple PCI devices
447 * in one slot might report errors simultaneously, and we
448 * only want one error recovery routine running.
450 eeh_serialize_lock(&flags);
452 if (pe->state & EEH_PE_ISOLATED) {
454 if (pe->check_count % EEH_MAX_FAILS == 0) {
455 location = of_get_property(dn, "ibm,loc-code", NULL);
456 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
457 "location=%s driver=%s pci addr=%s\n",
458 pe->check_count, location,
459 eeh_driver_name(dev), eeh_pci_name(dev));
460 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
461 eeh_driver_name(dev));
468 * Now test for an EEH failure. This is VERY expensive.
469 * Note that the eeh_config_addr may be a parent device
470 * in the case of a device behind a bridge, or it may be
471 * function zero of a multi-function device.
472 * In any case they must share a common PHB.
474 ret = eeh_ops->get_state(pe, NULL);
476 /* Note that config-io to empty slots may fail;
477 * they are empty when they don't have children.
478 * We will punt with the following conditions: Failure to get
479 * PE's state, EEH not support and Permanently unavailable
480 * state, PE is in good state.
483 (ret == EEH_STATE_NOT_SUPPORT) ||
484 ((ret & active_flags) == active_flags)) {
485 eeh_stats.false_positives++;
486 pe->false_positives++;
492 * It should be corner case that the parent PE has been
493 * put into frozen state as well. We should take care
496 parent_pe = pe->parent;
498 /* Hit the ceiling ? */
499 if (parent_pe->type & EEH_PE_PHB)
502 /* Frozen parent PE ? */
503 ret = eeh_ops->get_state(parent_pe, NULL);
505 (ret & active_flags) != active_flags)
508 /* Next parent level */
509 parent_pe = parent_pe->parent;
512 eeh_stats.slot_resets++;
514 /* Avoid repeated reports of this failure, including problems
515 * with other functions on this device, and functions under
518 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
519 eeh_serialize_unlock(flags);
521 /* Most EEH events are due to device driver bugs. Having
522 * a stack trace will help the device-driver authors figure
523 * out what happened. So print that out.
525 phb_pe = eeh_phb_pe_get(pe->phb);
526 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
527 pe->phb->global_number, pe->addr);
528 pr_err("EEH: PE location: %s, PHB location: %s\n",
529 eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));
532 eeh_send_failure_event(pe);
537 eeh_serialize_unlock(flags);
541 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
544 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
545 * @token: I/O address
547 * Check for an EEH failure at the given I/O address. Call this
548 * routine if the result of a read was all 0xff's and you want to
549 * find out if this is due to an EEH slot freeze event. This routine
550 * will query firmware for the EEH status.
552 * Note this routine is safe to call in an interrupt context.
554 int eeh_check_failure(const volatile void __iomem *token)
557 struct eeh_dev *edev;
559 /* Finding the phys addr + pci device; this is pretty quick. */
560 addr = eeh_token_to_phys((unsigned long __force) token);
561 edev = eeh_addr_cache_get_dev(addr);
563 eeh_stats.no_device++;
567 return eeh_dev_check_failure(edev);
569 EXPORT_SYMBOL(eeh_check_failure);
573 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
576 * This routine should be called to reenable frozen MMIO or DMA
577 * so that it would work correctly again. It's useful while doing
578 * recovery or log collection on the indicated device.
580 int eeh_pci_enable(struct eeh_pe *pe, int function)
585 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
586 * Also, it's pointless to enable them on unfrozen PE. So
587 * we have to check before enabling IO or DMA.
590 case EEH_OPT_THAW_MMIO:
591 active_flag = EEH_STATE_MMIO_ACTIVE;
593 case EEH_OPT_THAW_DMA:
594 active_flag = EEH_STATE_DMA_ACTIVE;
596 case EEH_OPT_DISABLE:
598 case EEH_OPT_FREEZE_PE:
602 pr_warn("%s: Invalid function %d\n",
608 * Check if IO or DMA has been enabled before
612 rc = eeh_ops->get_state(pe, NULL);
616 /* Needn't enable it at all */
617 if (rc == EEH_STATE_NOT_SUPPORT)
620 /* It's already enabled */
621 if (rc & active_flag)
626 /* Issue the request */
627 rc = eeh_ops->set_option(pe, function);
629 pr_warn("%s: Unexpected state change %d on "
630 "PHB#%d-PE#%x, err=%d\n",
631 __func__, function, pe->phb->global_number,
634 /* Check if the request is finished successfully */
636 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
640 if (rc & active_flag)
650 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
651 * @dev: pci device struct
652 * @state: reset state to enter
657 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
659 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
660 struct eeh_pe *pe = eeh_dev_to_pe(edev);
663 pr_err("%s: No PE found on PCI device %s\n",
664 __func__, pci_name(dev));
669 case pcie_deassert_reset:
670 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
673 eeh_ops->reset(pe, EEH_RESET_HOT);
675 case pcie_warm_reset:
676 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
686 * eeh_set_pe_freset - Check the required reset for the indicated device
688 * @flag: return value
690 * Each device might have its preferred reset type: fundamental or
691 * hot reset. The routine is used to collected the information for
692 * the indicated device and its children so that the bunch of the
693 * devices could be reset properly.
695 static void *eeh_set_dev_freset(void *data, void *flag)
698 unsigned int *freset = (unsigned int *)flag;
699 struct eeh_dev *edev = (struct eeh_dev *)data;
701 dev = eeh_dev_to_pci_dev(edev);
703 *freset |= dev->needs_freset;
709 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
712 * Assert the PCI #RST line for 1/4 second.
714 static void eeh_reset_pe_once(struct eeh_pe *pe)
716 unsigned int freset = 0;
718 /* Determine type of EEH reset required for
719 * Partitionable Endpoint, a hot-reset (1)
720 * or a fundamental reset (3).
721 * A fundamental reset required by any device under
722 * Partitionable Endpoint trumps hot-reset.
724 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
727 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
729 eeh_ops->reset(pe, EEH_RESET_HOT);
731 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
735 * eeh_reset_pe - Reset the indicated PE
738 * This routine should be called to reset indicated device, including
739 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
740 * might be involved as well.
742 int eeh_reset_pe(struct eeh_pe *pe)
744 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
747 /* Take three shots at resetting the bus */
748 for (i=0; i<3; i++) {
749 eeh_reset_pe_once(pe);
752 * EEH_PE_ISOLATED is expected to be removed after
755 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
756 if ((rc & flags) == flags)
760 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
761 __func__, pe->phb->global_number, pe->addr);
764 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
765 i+1, pe->phb->global_number, pe->addr, rc);
772 * eeh_save_bars - Save device bars
773 * @edev: PCI device associated EEH device
775 * Save the values of the device bars. Unlike the restore
776 * routine, this routine is *not* recursive. This is because
777 * PCI devices are added individually; but, for the restore,
778 * an entire slot is reset at a time.
780 void eeh_save_bars(struct eeh_dev *edev)
783 struct device_node *dn;
787 dn = eeh_dev_to_of_node(edev);
789 for (i = 0; i < 16; i++)
790 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
793 * For PCI bridges including root port, we need enable bus
794 * master explicitly. Otherwise, it can't fetch IODA table
795 * entries correctly. So we cache the bit in advance so that
796 * we can restore it after reset, either PHB range or PE range.
798 if (edev->mode & EEH_DEV_BRIDGE)
799 edev->config_space[1] |= PCI_COMMAND_MASTER;
803 * eeh_ops_register - Register platform dependent EEH operations
804 * @ops: platform dependent EEH operations
806 * Register the platform dependent EEH operation callback
807 * functions. The platform should call this function before
808 * any other EEH operations.
810 int __init eeh_ops_register(struct eeh_ops *ops)
813 pr_warn("%s: Invalid EEH ops name for %p\n",
818 if (eeh_ops && eeh_ops != ops) {
819 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
820 __func__, eeh_ops->name, ops->name);
830 * eeh_ops_unregister - Unreigster platform dependent EEH operations
831 * @name: name of EEH platform operations
833 * Unregister the platform dependent EEH operation callback
836 int __exit eeh_ops_unregister(const char *name)
838 if (!name || !strlen(name)) {
839 pr_warn("%s: Invalid EEH ops name\n",
844 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
852 static int eeh_reboot_notifier(struct notifier_block *nb,
853 unsigned long action, void *unused)
855 eeh_clear_flag(EEH_ENABLED);
859 static struct notifier_block eeh_reboot_nb = {
860 .notifier_call = eeh_reboot_notifier,
864 * eeh_init - EEH initialization
866 * Initialize EEH by trying to enable it for all of the adapters in the system.
867 * As a side effect we can determine here if eeh is supported at all.
868 * Note that we leave EEH on so failed config cycles won't cause a machine
869 * check. If a user turns off EEH for a particular adapter they are really
870 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
871 * grant access to a slot if EEH isn't enabled, and so we always enable
872 * EEH for all slots/all devices.
874 * The eeh-force-off option disables EEH checking globally, for all slots.
875 * Even if force-off is set, the EEH hardware is still enabled, so that
876 * newer systems can boot.
880 struct pci_controller *hose, *tmp;
881 struct device_node *phb;
886 * We have to delay the initialization on PowerNV after
887 * the PCI hierarchy tree has been built because the PEs
888 * are figured out based on PCI devices instead of device
891 if (machine_is(powernv) && cnt++ <= 0)
894 /* Register reboot notifier */
895 ret = register_reboot_notifier(&eeh_reboot_nb);
897 pr_warn("%s: Failed to register notifier (%d)\n",
902 /* call platform initialization function */
904 pr_warn("%s: Platform EEH operation not found\n",
907 } else if ((ret = eeh_ops->init())) {
908 pr_warn("%s: Failed to call platform init function (%d)\n",
913 /* Initialize EEH event */
914 ret = eeh_event_init();
918 /* Enable EEH for all adapters */
919 if (eeh_has_flag(EEH_PROBE_MODE_DEVTREE)) {
920 list_for_each_entry_safe(hose, tmp,
921 &hose_list, list_node) {
923 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
925 } else if (eeh_has_flag(EEH_PROBE_MODE_DEV)) {
926 list_for_each_entry_safe(hose, tmp,
927 &hose_list, list_node)
928 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
930 pr_warn("%s: Invalid probe mode %x",
931 __func__, eeh_subsystem_flags);
936 * Call platform post-initialization. Actually, It's good chance
937 * to inform platform that EEH is ready to supply service if the
938 * I/O cache stuff has been built up.
940 if (eeh_ops->post_init) {
941 ret = eeh_ops->post_init();
947 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
949 pr_warn("EEH: No capable adapters found\n");
954 core_initcall_sync(eeh_init);
957 * eeh_add_device_early - Enable EEH for the indicated device_node
958 * @dn: device node for which to set up EEH
960 * This routine must be used to perform EEH initialization for PCI
961 * devices that were added after system boot (e.g. hotplug, dlpar).
962 * This routine must be called before any i/o is performed to the
963 * adapter (inluding any config-space i/o).
964 * Whether this actually enables EEH or not for this device depends
965 * on the CEC architecture, type of the device, on earlier boot
966 * command-line arguments & etc.
968 void eeh_add_device_early(struct device_node *dn)
970 struct pci_controller *phb;
973 * If we're doing EEH probe based on PCI device, we
974 * would delay the probe until late stage because
975 * the PCI device isn't available this moment.
977 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
980 if (!of_node_to_eeh_dev(dn))
982 phb = of_node_to_eeh_dev(dn)->phb;
984 /* USB Bus children of PCI devices will not have BUID's */
985 if (NULL == phb || 0 == phb->buid)
988 eeh_ops->of_probe(dn, NULL);
992 * eeh_add_device_tree_early - Enable EEH for the indicated device
995 * This routine must be used to perform EEH initialization for the
996 * indicated PCI device that was added after system boot (e.g.
999 void eeh_add_device_tree_early(struct device_node *dn)
1001 struct device_node *sib;
1003 for_each_child_of_node(dn, sib)
1004 eeh_add_device_tree_early(sib);
1005 eeh_add_device_early(dn);
1007 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1010 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1011 * @dev: pci device for which to set up EEH
1013 * This routine must be used to complete EEH initialization for PCI
1014 * devices that were added after system boot (e.g. hotplug, dlpar).
1016 void eeh_add_device_late(struct pci_dev *dev)
1018 struct device_node *dn;
1019 struct eeh_dev *edev;
1021 if (!dev || !eeh_enabled())
1024 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1026 dn = pci_device_to_OF_node(dev);
1027 edev = of_node_to_eeh_dev(dn);
1028 if (edev->pdev == dev) {
1029 pr_debug("EEH: Already referenced !\n");
1034 * The EEH cache might not be removed correctly because of
1035 * unbalanced kref to the device during unplug time, which
1036 * relies on pcibios_release_device(). So we have to remove
1037 * that here explicitly.
1040 eeh_rmv_from_parent_pe(edev);
1041 eeh_addr_cache_rmv_dev(edev->pdev);
1042 eeh_sysfs_remove_device(edev->pdev);
1043 edev->mode &= ~EEH_DEV_SYSFS;
1046 * We definitely should have the PCI device removed
1047 * though it wasn't correctly. So we needn't call
1048 * into error handler afterwards.
1050 edev->mode |= EEH_DEV_NO_HANDLER;
1053 dev->dev.archdata.edev = NULL;
1057 dev->dev.archdata.edev = edev;
1060 * We have to do the EEH probe here because the PCI device
1061 * hasn't been created yet in the early stage.
1063 if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1064 eeh_ops->dev_probe(dev, NULL);
1066 eeh_addr_cache_insert_dev(dev);
1070 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1073 * This routine must be used to perform EEH initialization for PCI
1074 * devices which are attached to the indicated PCI bus. The PCI bus
1075 * is added after system boot through hotplug or dlpar.
1077 void eeh_add_device_tree_late(struct pci_bus *bus)
1079 struct pci_dev *dev;
1081 list_for_each_entry(dev, &bus->devices, bus_list) {
1082 eeh_add_device_late(dev);
1083 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1084 struct pci_bus *subbus = dev->subordinate;
1086 eeh_add_device_tree_late(subbus);
1090 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1093 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1096 * This routine must be used to add EEH sysfs files for PCI
1097 * devices which are attached to the indicated PCI bus. The PCI bus
1098 * is added after system boot through hotplug or dlpar.
1100 void eeh_add_sysfs_files(struct pci_bus *bus)
1102 struct pci_dev *dev;
1104 list_for_each_entry(dev, &bus->devices, bus_list) {
1105 eeh_sysfs_add_device(dev);
1106 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1107 struct pci_bus *subbus = dev->subordinate;
1109 eeh_add_sysfs_files(subbus);
1113 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1116 * eeh_remove_device - Undo EEH setup for the indicated pci device
1117 * @dev: pci device to be removed
1119 * This routine should be called when a device is removed from
1120 * a running system (e.g. by hotplug or dlpar). It unregisters
1121 * the PCI device from the EEH subsystem. I/O errors affecting
1122 * this device will no longer be detected after this call; thus,
1123 * i/o errors affecting this slot may leave this device unusable.
1125 void eeh_remove_device(struct pci_dev *dev)
1127 struct eeh_dev *edev;
1129 if (!dev || !eeh_enabled())
1131 edev = pci_dev_to_eeh_dev(dev);
1133 /* Unregister the device with the EEH/PCI address search system */
1134 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1136 if (!edev || !edev->pdev || !edev->pe) {
1137 pr_debug("EEH: Not referenced !\n");
1142 * During the hotplug for EEH error recovery, we need the EEH
1143 * device attached to the parent PE in order for BAR restore
1144 * a bit later. So we keep it for BAR restore and remove it
1145 * from the parent PE during the BAR resotre.
1148 dev->dev.archdata.edev = NULL;
1149 if (!(edev->pe->state & EEH_PE_KEEP))
1150 eeh_rmv_from_parent_pe(edev);
1152 edev->mode |= EEH_DEV_DISCONNECTED;
1155 * We're removing from the PCI subsystem, that means
1156 * the PCI device driver can't support EEH or not
1157 * well. So we rely on hotplug completely to do recovery
1158 * for the specific PCI device.
1160 edev->mode |= EEH_DEV_NO_HANDLER;
1162 eeh_addr_cache_rmv_dev(dev);
1163 eeh_sysfs_remove_device(dev);
1164 edev->mode &= ~EEH_DEV_SYSFS;
1167 int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)
1171 ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
1173 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1174 __func__, ret, pe->phb->global_number, pe->addr);
1178 ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
1180 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1181 __func__, ret, pe->phb->global_number, pe->addr);
1185 /* Clear software isolated state */
1186 if (sw_state && (pe->state & EEH_PE_ISOLATED))
1187 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1193 * eeh_dev_open - Increase count of pass through devices for PE
1196 * Increase count of passed through devices for the indicated
1197 * PE. In the result, the EEH errors detected on the PE won't be
1198 * reported. The PE owner will be responsible for detection
1201 int eeh_dev_open(struct pci_dev *pdev)
1203 struct eeh_dev *edev;
1206 mutex_lock(&eeh_dev_mutex);
1208 /* No PCI device ? */
1212 /* No EEH device or PE ? */
1213 edev = pci_dev_to_eeh_dev(pdev);
1214 if (!edev || !edev->pe)
1218 * The PE might have been put into frozen state, but we
1219 * didn't detect that yet. The passed through PCI devices
1220 * in frozen PE won't work properly. Clear the frozen state
1223 ret = eeh_unfreeze_pe(edev->pe, true);
1227 /* Increase PE's pass through count */
1228 atomic_inc(&edev->pe->pass_dev_cnt);
1229 mutex_unlock(&eeh_dev_mutex);
1233 mutex_unlock(&eeh_dev_mutex);
1236 EXPORT_SYMBOL_GPL(eeh_dev_open);
1239 * eeh_dev_release - Decrease count of pass through devices for PE
1242 * Decrease count of pass through devices for the indicated PE. If
1243 * there is no passed through device in PE, the EEH errors detected
1244 * on the PE will be reported and handled as usual.
1246 void eeh_dev_release(struct pci_dev *pdev)
1248 struct eeh_dev *edev;
1250 mutex_lock(&eeh_dev_mutex);
1252 /* No PCI device ? */
1256 /* No EEH device ? */
1257 edev = pci_dev_to_eeh_dev(pdev);
1258 if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))
1261 /* Decrease PE's pass through count */
1262 atomic_dec(&edev->pe->pass_dev_cnt);
1263 WARN_ON(atomic_read(&edev->pe->pass_dev_cnt) < 0);
1265 mutex_unlock(&eeh_dev_mutex);
1267 EXPORT_SYMBOL(eeh_dev_release);
1269 #ifdef CONFIG_IOMMU_API
1271 static int dev_has_iommu_table(struct device *dev, void *data)
1273 struct pci_dev *pdev = to_pci_dev(dev);
1274 struct pci_dev **ppdev = data;
1275 struct iommu_table *tbl;
1280 tbl = get_iommu_table_base(dev);
1281 if (tbl && tbl->it_group) {
1290 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1291 * @group: IOMMU group
1293 * The routine is called to convert IOMMU group to EEH PE.
1295 struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group)
1297 struct pci_dev *pdev = NULL;
1298 struct eeh_dev *edev;
1301 /* No IOMMU group ? */
1305 ret = iommu_group_for_each_dev(group, &pdev, dev_has_iommu_table);
1309 /* No EEH device or PE ? */
1310 edev = pci_dev_to_eeh_dev(pdev);
1311 if (!edev || !edev->pe)
1316 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe);
1318 #endif /* CONFIG_IOMMU_API */
1321 * eeh_pe_set_option - Set options for the indicated PE
1323 * @option: requested option
1325 * The routine is called to enable or disable EEH functionality
1326 * on the indicated PE, to enable IO or DMA for the frozen PE.
1328 int eeh_pe_set_option(struct eeh_pe *pe, int option)
1337 * EEH functionality could possibly be disabled, just
1338 * return error for the case. And the EEH functinality
1339 * isn't expected to be disabled on one specific PE.
1342 case EEH_OPT_ENABLE:
1343 if (eeh_enabled()) {
1344 ret = eeh_unfreeze_pe(pe, true);
1349 case EEH_OPT_DISABLE:
1351 case EEH_OPT_THAW_MMIO:
1352 case EEH_OPT_THAW_DMA:
1353 if (!eeh_ops || !eeh_ops->set_option) {
1358 ret = eeh_pci_enable(pe, option);
1361 pr_debug("%s: Option %d out of range (%d, %d)\n",
1362 __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA);
1368 EXPORT_SYMBOL_GPL(eeh_pe_set_option);
1371 * eeh_pe_get_state - Retrieve PE's state
1374 * Retrieve the PE's state, which includes 3 aspects: enabled
1375 * DMA, enabled IO and asserted reset.
1377 int eeh_pe_get_state(struct eeh_pe *pe)
1379 int result, ret = 0;
1380 bool rst_active, dma_en, mmio_en;
1386 if (!eeh_ops || !eeh_ops->get_state)
1389 result = eeh_ops->get_state(pe, NULL);
1390 rst_active = !!(result & EEH_STATE_RESET_ACTIVE);
1391 dma_en = !!(result & EEH_STATE_DMA_ENABLED);
1392 mmio_en = !!(result & EEH_STATE_MMIO_ENABLED);
1395 ret = EEH_PE_STATE_RESET;
1396 else if (dma_en && mmio_en)
1397 ret = EEH_PE_STATE_NORMAL;
1398 else if (!dma_en && !mmio_en)
1399 ret = EEH_PE_STATE_STOPPED_IO_DMA;
1400 else if (!dma_en && mmio_en)
1401 ret = EEH_PE_STATE_STOPPED_DMA;
1403 ret = EEH_PE_STATE_UNAVAIL;
1407 EXPORT_SYMBOL_GPL(eeh_pe_get_state);
1409 static int eeh_pe_reenable_devices(struct eeh_pe *pe)
1411 struct eeh_dev *edev, *tmp;
1412 struct pci_dev *pdev;
1415 /* Restore config space */
1416 eeh_pe_restore_bars(pe);
1419 * Reenable PCI devices as the devices passed
1420 * through are always enabled before the reset.
1422 eeh_pe_for_each_dev(pe, edev, tmp) {
1423 pdev = eeh_dev_to_pci_dev(edev);
1427 ret = pci_reenable_device(pdev);
1429 pr_warn("%s: Failure %d reenabling %s\n",
1430 __func__, ret, pci_name(pdev));
1435 /* The PE is still in frozen state */
1436 ret = eeh_ops->set_option(pe, EEH_OPT_THAW_MMIO);
1438 pr_warn("%s: Failure %d enabling MMIO for PHB#%x-PE#%x\n",
1439 __func__, ret, pe->phb->global_number, pe->addr);
1443 ret = eeh_ops->set_option(pe, EEH_OPT_THAW_DMA);
1445 pr_warn("%s: Failure %d enabling DMA for PHB#%x-PE#%x\n",
1446 __func__, ret, pe->phb->global_number, pe->addr);
1450 /* Clear software isolated state */
1451 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1457 * eeh_pe_reset - Issue PE reset according to specified type
1459 * @option: reset type
1461 * The routine is called to reset the specified PE with the
1462 * indicated type, either fundamental reset or hot reset.
1463 * PE reset is the most important part for error recovery.
1465 int eeh_pe_reset(struct eeh_pe *pe, int option)
1473 if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset)
1477 case EEH_RESET_DEACTIVATE:
1478 ret = eeh_ops->reset(pe, option);
1482 ret = eeh_pe_reenable_devices(pe);
1485 case EEH_RESET_FUNDAMENTAL:
1487 * Proactively freeze the PE to drop all MMIO access
1488 * during reset, which should be banned as it's always
1489 * cause recursive EEH error.
1491 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
1493 ret = eeh_ops->reset(pe, option);
1496 pr_debug("%s: Unsupported option %d\n",
1503 EXPORT_SYMBOL_GPL(eeh_pe_reset);
1506 * eeh_pe_configure - Configure PCI bridges after PE reset
1509 * The routine is called to restore the PCI config space for
1510 * those PCI devices, especially PCI bridges affected by PE
1511 * reset issued previously.
1513 int eeh_pe_configure(struct eeh_pe *pe)
1523 EXPORT_SYMBOL_GPL(eeh_pe_configure);
1525 static int proc_eeh_show(struct seq_file *m, void *v)
1527 if (!eeh_enabled()) {
1528 seq_printf(m, "EEH Subsystem is globally disabled\n");
1529 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1531 seq_printf(m, "EEH Subsystem is enabled\n");
1534 "no device node=%llu\n"
1535 "no config address=%llu\n"
1536 "check not wanted=%llu\n"
1537 "eeh_total_mmio_ffs=%llu\n"
1538 "eeh_false_positives=%llu\n"
1539 "eeh_slot_resets=%llu\n",
1540 eeh_stats.no_device,
1542 eeh_stats.no_cfg_addr,
1543 eeh_stats.ignored_check,
1544 eeh_stats.total_mmio_ffs,
1545 eeh_stats.false_positives,
1546 eeh_stats.slot_resets);
1552 static int proc_eeh_open(struct inode *inode, struct file *file)
1554 return single_open(file, proc_eeh_show, NULL);
1557 static const struct file_operations proc_eeh_operations = {
1558 .open = proc_eeh_open,
1560 .llseek = seq_lseek,
1561 .release = single_release,
1564 #ifdef CONFIG_DEBUG_FS
1565 static int eeh_enable_dbgfs_set(void *data, u64 val)
1568 eeh_clear_flag(EEH_FORCE_DISABLED);
1570 eeh_add_flag(EEH_FORCE_DISABLED);
1572 /* Notify the backend */
1573 if (eeh_ops->post_init)
1574 eeh_ops->post_init();
1579 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1588 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1589 eeh_enable_dbgfs_set, "0x%llx\n");
1592 static int __init eeh_init_proc(void)
1594 if (machine_is(pseries) || machine_is(powernv)) {
1595 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1596 #ifdef CONFIG_DEBUG_FS
1597 debugfs_create_file("eeh_enable", 0600,
1598 powerpc_debugfs_root, NULL,
1599 &eeh_enable_dbgfs_ops);
1605 __initcall(eeh_init_proc);