2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
38 mfspr r11,SPRN_SRR0 ; \
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
49 b . ; /* prevent speculative execution */
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
58 2: mfspr r12,SPRN_SRR1 ; \
59 andi. r12,r12,MSR_PR ; \
61 mtspr SPRN_SRR0,r3 ; \
62 mtspr SPRN_SRR1,r4 ; \
63 mtspr SPRN_SDR1,r5 ; \
65 b . ; /* prevent speculative execution */
67 #if defined(CONFIG_RELOCATABLE)
69 * We can't branch directly; in the direct case we use LR
70 * and system_call_entry restores LR. (We thus need to move
71 * LR to r10 in the RFID case too.)
73 #define SYSCALL_PSERIES_2_DIRECT \
75 ld r12,PACAKBASE(r13) ; \
76 LOAD_HANDLER(r12, system_call_entry_direct) ; \
78 mfspr r12,SPRN_SRR1 ; \
79 /* Re-use of r13... No spare regs to do this */ \
82 GET_PACA(r13) ; /* get r13 back */ \
85 /* We can branch directly */
86 #define SYSCALL_PSERIES_2_DIRECT \
87 mfspr r12,SPRN_SRR1 ; \
89 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
90 b system_call_entry_direct ;
94 * This is the start of the interrupt handlers for pSeries
95 * This code runs with relocation off.
96 * Code from here to __end_interrupts gets copied down to real
97 * address 0x100 when we are running a relocatable kernel.
98 * Therefore any relative branches in this section must only
99 * branch to labels in this section.
102 .globl __start_interrupts
105 .globl system_reset_pSeries;
106 system_reset_pSeries:
107 HMT_MEDIUM_PPR_DISCARD
109 #ifdef CONFIG_PPC_P7_NAP
111 /* Running native on arch 2.06 or later, check if we are
112 * waking up from nap. We only handle no state loss and
113 * supervisor state loss. We do -not- handle hypervisor
114 * state loss at this time.
117 rlwinm. r13,r13,47-31,30,31
120 /* waking up from powersave (nap) state */
122 /* Total loss of HV state is fatal, we could try to use the
123 * PIR to locate a PACA, then use an emergency stack etc...
124 * but for now, let's just stay stuck here
129 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
130 li r0,KVM_HWTHREAD_IN_KERNEL
131 stb r0,HSTATE_HWTHREAD_STATE(r13)
132 /* Order setting hwthread_state vs. testing hwthread_req */
134 lbz r0,HSTATE_HWTHREAD_REQ(r13)
142 b .power7_wakeup_noloss
143 2: b .power7_wakeup_loss
145 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
146 #endif /* CONFIG_PPC_P7_NAP */
147 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
151 machine_check_pSeries_1:
152 /* This is moved out of line as it can be patched by FW, but
153 * some code path might still want to branch into the original
156 HMT_MEDIUM_PPR_DISCARD
157 SET_SCRATCH0(r13) /* save r13 */
158 #ifdef CONFIG_PPC_P7_NAP
160 /* Running native on arch 2.06 or later, check if we are
161 * waking up from nap. We only handle no state loss and
162 * supervisor state loss. We do -not- handle hypervisor
163 * state loss at this time.
166 rlwinm. r13,r13,47-31,30,31
169 /* waking up from powersave (nap) state */
171 /* Total loss of HV state is fatal. let's just stay stuck here */
174 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
175 #endif /* CONFIG_PPC_P7_NAP */
176 EXCEPTION_PROLOG_0(PACA_EXMC)
178 b machine_check_pSeries_early
180 b machine_check_pSeries_0
181 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
184 .globl data_access_pSeries
186 HMT_MEDIUM_PPR_DISCARD
189 b data_access_check_stab
190 data_access_not_stab:
191 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
192 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
196 .globl data_access_slb_pSeries
197 data_access_slb_pSeries:
198 HMT_MEDIUM_PPR_DISCARD
200 EXCEPTION_PROLOG_0(PACA_EXSLB)
201 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
202 std r3,PACA_EXSLB+EX_R3(r13)
205 /* Keep that around for when we re-implement dynamic VSIDs */
207 bge slb_miss_user_pseries
208 #endif /* __DISABLED__ */
210 #ifndef CONFIG_RELOCATABLE
214 * We can't just use a direct branch to .slb_miss_realmode
215 * because the distance from here to there depends on where
216 * the kernel ends up being put.
219 ld r10,PACAKBASE(r13)
220 LOAD_HANDLER(r10, .slb_miss_realmode)
225 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
228 .globl instruction_access_slb_pSeries
229 instruction_access_slb_pSeries:
230 HMT_MEDIUM_PPR_DISCARD
232 EXCEPTION_PROLOG_0(PACA_EXSLB)
233 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
234 std r3,PACA_EXSLB+EX_R3(r13)
235 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
237 /* Keep that around for when we re-implement dynamic VSIDs */
239 bge slb_miss_user_pseries
240 #endif /* __DISABLED__ */
242 #ifndef CONFIG_RELOCATABLE
246 ld r10,PACAKBASE(r13)
247 LOAD_HANDLER(r10, .slb_miss_realmode)
252 /* We open code these as we can't have a ". = x" (even with
253 * x = "." within a feature section
256 .globl hardware_interrupt_pSeries;
257 .globl hardware_interrupt_hv;
258 hardware_interrupt_pSeries:
259 hardware_interrupt_hv:
260 HMT_MEDIUM_PPR_DISCARD
262 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
263 EXC_HV, SOFTEN_TEST_HV)
264 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
266 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
267 EXC_STD, SOFTEN_TEST_HV_201)
268 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
269 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
271 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
272 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
274 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
275 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
277 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
278 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
281 .globl decrementer_pSeries
283 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
285 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
287 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
288 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
290 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
291 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
294 .globl system_call_pSeries
297 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
300 std r9,PACA_EXGEN+EX_R9(r13)
301 std r10,PACA_EXGEN+EX_R10(r13)
307 SYSCALL_PSERIES_2_RFID
309 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
311 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
312 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
314 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
315 * out of line to handle them
318 hv_data_storage_trampoline:
320 EXCEPTION_PROLOG_0(PACA_EXGEN)
324 hv_instr_storage_trampoline:
326 EXCEPTION_PROLOG_0(PACA_EXGEN)
330 emulation_assist_trampoline:
332 EXCEPTION_PROLOG_0(PACA_EXGEN)
333 b emulation_assist_hv
336 hv_exception_trampoline:
338 EXCEPTION_PROLOG_0(PACA_EXGEN)
342 hv_doorbell_trampoline:
344 EXCEPTION_PROLOG_0(PACA_EXGEN)
347 /* We need to deal with the Altivec unavailable exception
348 * here which is at 0xf20, thus in the middle of the
349 * prolog code of the PerformanceMonitor one. A little
350 * trickery is thus necessary
353 performance_monitor_pseries_trampoline:
355 EXCEPTION_PROLOG_0(PACA_EXGEN)
356 b performance_monitor_pSeries
359 altivec_unavailable_pseries_trampoline:
361 EXCEPTION_PROLOG_0(PACA_EXGEN)
362 b altivec_unavailable_pSeries
365 vsx_unavailable_pseries_trampoline:
367 EXCEPTION_PROLOG_0(PACA_EXGEN)
368 b vsx_unavailable_pSeries
371 facility_unavailable_trampoline:
373 EXCEPTION_PROLOG_0(PACA_EXGEN)
374 b facility_unavailable_pSeries
377 hv_facility_unavailable_trampoline:
379 EXCEPTION_PROLOG_0(PACA_EXGEN)
380 b facility_unavailable_hv
382 #ifdef CONFIG_CBE_RAS
383 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
384 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
385 #endif /* CONFIG_CBE_RAS */
387 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
388 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
391 .global denorm_exception_hv
393 HMT_MEDIUM_PPR_DISCARD
394 mtspr SPRN_SPRG_HSCRATCH0,r13
395 EXCEPTION_PROLOG_0(PACA_EXGEN)
396 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
398 #ifdef CONFIG_PPC_DENORMALISATION
400 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
401 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
402 addi r11,r11,-4 /* HSRR0 is next instruction */
407 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
408 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
410 #ifdef CONFIG_CBE_RAS
411 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
412 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
413 #endif /* CONFIG_CBE_RAS */
415 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
416 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
418 #ifdef CONFIG_CBE_RAS
419 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
420 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
423 #endif /* CONFIG_CBE_RAS */
426 /*** Out of line interrupts support ***/
429 /* moved from 0x200 */
430 machine_check_pSeries_early:
432 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
437 * Original R9 to R13 is saved on PACA_EXMC
439 * Switch to mc_emergency stack and handle re-entrancy (though we
440 * currently don't test for overflow). Save MCE registers srr1,
441 * srr0, dar and dsisr and then set ME=1
443 * We use paca->in_mce to check whether this is the first entry or
444 * nested machine check. We increment paca->in_mce to track nested
447 * If this is the first entry then set stack pointer to
448 * paca->mc_emergency_sp, otherwise r1 is already pointing to
449 * stack frame on mc_emergency stack.
451 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
452 * checkstop if we get another machine check exception before we do
453 * rfid with MSR_ME=1.
455 mr r11,r1 /* Save r1 */
456 lhz r10,PACA_IN_MCE(r13)
457 cmpwi r10,0 /* Are we in nested machine check */
458 bne 0f /* Yes, we are. */
459 /* First machine check entry */
460 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
461 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
462 addi r10,r10,1 /* increment paca->in_mce */
463 sth r10,PACA_IN_MCE(r13)
464 std r11,GPR1(r1) /* Save r1 on the stack. */
465 std r11,0(r1) /* make stack chain pointer */
466 mfspr r11,SPRN_SRR0 /* Save SRR0 */
468 mfspr r11,SPRN_SRR1 /* Save SRR1 */
470 mfspr r11,SPRN_DAR /* Save DAR */
472 mfspr r11,SPRN_DSISR /* Save DSISR */
474 std r9,_CCR(r1) /* Save CR in stackframe */
475 /* Save r9 through r13 from EXMC save area to stack frame. */
476 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
477 mfmsr r11 /* get MSR value */
478 ori r11,r11,MSR_ME /* turn on ME bit */
479 ori r11,r11,MSR_RI /* turn on RI bit */
480 ld r12,PACAKBASE(r13) /* get high part of &label */
481 LOAD_HANDLER(r12, machine_check_handle_early)
485 b . /* prevent speculative execution */
486 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
488 machine_check_pSeries:
489 .globl machine_check_fwnmi
491 HMT_MEDIUM_PPR_DISCARD
492 SET_SCRATCH0(r13) /* save r13 */
493 EXCEPTION_PROLOG_0(PACA_EXMC)
494 machine_check_pSeries_0:
495 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
496 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
497 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
499 /* moved from 0x300 */
500 data_access_check_stab:
502 std r9,PACA_EXSLB+EX_R9(r13)
503 std r10,PACA_EXSLB+EX_R10(r13)
507 rlwimi r10,r9,16,0x20
508 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
509 lbz r9,HSTATE_IN_GUEST(r13)
510 rlwimi r10,r9,8,0x300
514 beq do_stab_bolted_pSeries
516 ld r9,PACA_EXSLB+EX_R9(r13)
517 ld r10,PACA_EXSLB+EX_R10(r13)
518 b data_access_not_stab
519 do_stab_bolted_pSeries:
520 std r11,PACA_EXSLB+EX_R11(r13)
521 std r12,PACA_EXSLB+EX_R12(r13)
523 std r10,PACA_EXSLB+EX_R13(r13)
524 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
526 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
527 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
528 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
529 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
530 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
531 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
533 #ifdef CONFIG_PPC_DENORMALISATION
537 * To denormalise we need to move a copy of the register to itself.
538 * For POWER6 do that here for all FP regs.
541 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
542 xori r10,r10,(MSR_FE0|MSR_FE1)
546 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
547 #define FMR4(n) FMR2(n) ; FMR2(n+2)
548 #define FMR8(n) FMR4(n) ; FMR4(n+4)
549 #define FMR16(n) FMR8(n) ; FMR8(n+8)
550 #define FMR32(n) FMR16(n) ; FMR16(n+16)
555 * To denormalise we need to move a copy of the register to itself.
556 * For POWER7 do that here for the first 32 VSX registers only.
559 oris r10,r10,MSR_VSX@h
563 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
564 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
565 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
566 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
567 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
570 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
574 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
576 * To denormalise we need to move a copy of the register to itself.
577 * For POWER8 we need to do that for all 64 VSX registers
583 ld r9,PACA_EXGEN+EX_R9(r13)
584 RESTORE_PPR_PACA(PACA_EXGEN, r10)
586 ld r10,PACA_EXGEN+EX_CFAR(r13)
588 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
589 ld r10,PACA_EXGEN+EX_R10(r13)
590 ld r11,PACA_EXGEN+EX_R11(r13)
591 ld r12,PACA_EXGEN+EX_R12(r13)
592 ld r13,PACA_EXGEN+EX_R13(r13)
598 /* moved from 0xe00 */
599 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
600 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
601 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
602 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
603 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
604 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
605 STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
606 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
607 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
608 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
610 /* moved from 0xf00 */
611 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
612 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
613 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
614 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
615 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
616 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
617 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
618 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
619 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
620 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
623 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
624 * - If it was a decrementer interrupt, we bump the dec to max and and return.
625 * - If it was a doorbell we return immediately since doorbells are edge
626 * triggered and won't automatically refire.
627 * - else we hard disable and return.
628 * This is called with r10 containing the value to OR to the paca field.
630 #define MASKED_INTERRUPT(_H) \
631 masked_##_H##interrupt: \
632 std r11,PACA_EXGEN+EX_R11(r13); \
633 lbz r11,PACAIRQHAPPENED(r13); \
635 stb r11,PACAIRQHAPPENED(r13); \
636 cmpwi r10,PACA_IRQ_DEC; \
639 ori r10,r10,0xffff; \
640 mtspr SPRN_DEC,r10; \
642 1: cmpwi r10,PACA_IRQ_DBELL; \
644 mfspr r10,SPRN_##_H##SRR1; \
645 rldicl r10,r10,48,1; /* clear MSR_EE */ \
647 mtspr SPRN_##_H##SRR1,r10; \
649 ld r9,PACA_EXGEN+EX_R9(r13); \
650 ld r10,PACA_EXGEN+EX_R10(r13); \
651 ld r11,PACA_EXGEN+EX_R11(r13); \
660 * Called from arch_local_irq_enable when an interrupt needs
661 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
662 * which kind of interrupt. MSR:EE is already off. We generate a
663 * stackframe like if a real interrupt had happened.
665 * Note: While MSR:EE is off, we need to make sure that _MSR
666 * in the generated frame has EE set to 1 or the exception
667 * handler will not properly re-enable them.
669 _GLOBAL(__replay_interrupt)
670 /* We are going to jump to the exception common code which
671 * will retrieve various register values from the PACA which
672 * we don't give a damn about, so we don't bother storing them.
679 beq decrementer_common
681 beq hardware_interrupt_common
684 beq h_doorbell_common
687 beq doorbell_super_common
688 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
691 #ifdef CONFIG_PPC_PSERIES
693 * Vectors for the FWNMI option. Share common code.
695 .globl system_reset_fwnmi
698 HMT_MEDIUM_PPR_DISCARD
699 SET_SCRATCH0(r13) /* save r13 */
700 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
703 #endif /* CONFIG_PPC_PSERIES */
707 * This is used for when the SLB miss handler has to go virtual,
708 * which doesn't happen for now anymore but will once we re-implement
709 * dynamic VSIDs for shared page tables
711 slb_miss_user_pseries:
712 std r10,PACA_EXGEN+EX_R10(r13)
713 std r11,PACA_EXGEN+EX_R11(r13)
714 std r12,PACA_EXGEN+EX_R12(r13)
716 ld r11,PACA_EXSLB+EX_R9(r13)
717 ld r12,PACA_EXSLB+EX_R3(r13)
718 std r10,PACA_EXGEN+EX_R13(r13)
719 std r11,PACA_EXGEN+EX_R9(r13)
720 std r12,PACA_EXGEN+EX_R3(r13)
723 mfspr r11,SRR0 /* save SRR0 */
724 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
725 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
727 mfspr r12,SRR1 /* and SRR1 */
730 b . /* prevent spec. execution */
731 #endif /* __DISABLED__ */
733 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
734 kvmppc_skip_interrupt:
736 * Here all GPRs are unchanged from when the interrupt happened
737 * except for r13, which is saved in SPRG_SCRATCH0.
746 kvmppc_skip_Hinterrupt:
748 * Here all GPRs are unchanged from when the interrupt happened
749 * except for r13, which is saved in SPRG_SCRATCH0.
751 mfspr r13, SPRN_HSRR0
753 mtspr SPRN_HSRR0, r13
760 * Code from here down to __end_handlers is invoked from the
761 * exception prologs above. Because the prologs assemble the
762 * addresses of these handlers using the LOAD_HANDLER macro,
763 * which uses an ori instruction, these handlers must be in
764 * the first 64k of the kernel image.
767 /*** Common interrupt handlers ***/
769 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
771 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
772 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
773 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
774 #ifdef CONFIG_PPC_DOORBELL
775 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
777 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
779 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
780 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
781 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
782 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .emulation_assist_interrupt)
783 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
784 #ifdef CONFIG_PPC_DOORBELL
785 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
787 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
789 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
790 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
791 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
792 #ifdef CONFIG_ALTIVEC
793 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
795 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
797 #ifdef CONFIG_CBE_RAS
798 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
799 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
800 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
801 #endif /* CONFIG_CBE_RAS */
804 * Relocation-on interrupts: A subset of the interrupts can be delivered
805 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
806 * it. Addresses are the same as the original interrupt addresses, but
807 * offset by 0xc000000000004000.
808 * It's impossible to receive interrupts below 0x300 via this mechanism.
809 * KVM: None of these traps are from the guest ; anything that escalated
810 * to HV=1 from HV=0 is delivered via real mode handlers.
814 * This uses the standard macro, since the original 0x300 vector
815 * only has extra guff for STAB-based processors -- which never
818 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
820 .globl data_access_slb_relon_pSeries
821 data_access_slb_relon_pSeries:
823 EXCEPTION_PROLOG_0(PACA_EXSLB)
824 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
825 std r3,PACA_EXSLB+EX_R3(r13)
828 #ifndef CONFIG_RELOCATABLE
832 * We can't just use a direct branch to .slb_miss_realmode
833 * because the distance from here to there depends on where
834 * the kernel ends up being put.
837 ld r10,PACAKBASE(r13)
838 LOAD_HANDLER(r10, .slb_miss_realmode)
843 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
845 .globl instruction_access_slb_relon_pSeries
846 instruction_access_slb_relon_pSeries:
848 EXCEPTION_PROLOG_0(PACA_EXSLB)
849 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
850 std r3,PACA_EXSLB+EX_R3(r13)
851 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
853 #ifndef CONFIG_RELOCATABLE
857 ld r10,PACAKBASE(r13)
858 LOAD_HANDLER(r10, .slb_miss_realmode)
864 .globl hardware_interrupt_relon_pSeries;
865 .globl hardware_interrupt_relon_hv;
866 hardware_interrupt_relon_pSeries:
867 hardware_interrupt_relon_hv:
869 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
871 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
872 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
873 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
874 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
875 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
876 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
877 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
878 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
879 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
882 .globl system_call_relon_pSeries
883 system_call_relon_pSeries:
886 SYSCALL_PSERIES_2_DIRECT
889 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
892 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
895 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
898 emulation_assist_relon_trampoline:
900 EXCEPTION_PROLOG_0(PACA_EXGEN)
901 b emulation_assist_relon_hv
904 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
907 h_doorbell_relon_trampoline:
909 EXCEPTION_PROLOG_0(PACA_EXGEN)
910 b h_doorbell_relon_hv
913 performance_monitor_relon_pseries_trampoline:
915 EXCEPTION_PROLOG_0(PACA_EXGEN)
916 b performance_monitor_relon_pSeries
919 altivec_unavailable_relon_pseries_trampoline:
921 EXCEPTION_PROLOG_0(PACA_EXGEN)
922 b altivec_unavailable_relon_pSeries
925 vsx_unavailable_relon_pseries_trampoline:
927 EXCEPTION_PROLOG_0(PACA_EXGEN)
928 b vsx_unavailable_relon_pSeries
931 facility_unavailable_relon_trampoline:
933 EXCEPTION_PROLOG_0(PACA_EXGEN)
934 b facility_unavailable_relon_pSeries
937 hv_facility_unavailable_relon_trampoline:
939 EXCEPTION_PROLOG_0(PACA_EXGEN)
940 b hv_facility_unavailable_relon_hv
942 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
943 #ifdef CONFIG_PPC_DENORMALISATION
945 b denorm_exception_hv
947 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
949 /* Other future vectors */
951 .globl __end_interrupts
955 system_call_entry_direct:
956 #if defined(CONFIG_RELOCATABLE)
957 /* The first level prologue may have used LR to get here, saving
958 * orig in r10. To save hacking/ifdeffing common code, restore here.
965 ppc64_runlatch_on_trampoline:
966 b .__ppc64_runlatch_on
969 * Here we have detected that the kernel stack pointer is bad.
970 * R9 contains the saved CR, r13 points to the paca,
971 * r10 contains the (bad) kernel stack pointer,
972 * r11 and r12 contain the saved SRR0 and SRR1.
973 * We switch to using an emergency stack, save the registers there,
974 * and call kernel_bad_stack(), which panics.
977 ld r1,PACAEMERGSP(r13)
978 subi r1,r1,64+INT_FRAME_SIZE
1010 std r10,ORIG_GPR3(r1)
1011 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1014 lhz r12,PACA_TRAP_SAVE(r13)
1016 addi r11,r1,INT_FRAME_SIZE
1021 ld r11,exception_marker@toc(r2)
1023 std r11,STACK_FRAME_OVERHEAD-16(r1)
1024 1: addi r3,r1,STACK_FRAME_OVERHEAD
1025 bl .kernel_bad_stack
1029 * Here r13 points to the paca, r9 contains the saved CR,
1030 * SRR0 and SRR1 are saved in r11 and r12,
1031 * r9 - r13 are saved in paca->exgen.
1034 .globl data_access_common
1037 std r10,PACA_EXGEN+EX_DAR(r13)
1038 mfspr r10,SPRN_DSISR
1039 stw r10,PACA_EXGEN+EX_DSISR(r13)
1040 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
1043 ld r3,PACA_EXGEN+EX_DAR(r13)
1044 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1046 b .do_hash_page /* Try to handle as hpte fault */
1049 .globl h_data_storage_common
1050 h_data_storage_common:
1052 std r10,PACA_EXGEN+EX_DAR(r13)
1053 mfspr r10,SPRN_HDSISR
1054 stw r10,PACA_EXGEN+EX_DSISR(r13)
1055 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
1058 addi r3,r1,STACK_FRAME_OVERHEAD
1059 bl .unknown_exception
1063 .globl instruction_access_common
1064 instruction_access_common:
1065 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1069 andis. r4,r12,0x5820
1071 b .do_hash_page /* Try to handle as hpte fault */
1073 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
1076 * Here is the common SLB miss user that is used when going to virtual
1077 * mode for SLB misses, that is currently not used
1081 .globl slb_miss_user_common
1082 slb_miss_user_common:
1084 std r3,PACA_EXGEN+EX_DAR(r13)
1085 stw r9,PACA_EXGEN+EX_CCR(r13)
1086 std r10,PACA_EXGEN+EX_LR(r13)
1087 std r11,PACA_EXGEN+EX_SRR0(r13)
1088 bl .slb_allocate_user
1090 ld r10,PACA_EXGEN+EX_LR(r13)
1091 ld r3,PACA_EXGEN+EX_R3(r13)
1092 lwz r9,PACA_EXGEN+EX_CCR(r13)
1093 ld r11,PACA_EXGEN+EX_SRR0(r13)
1097 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1098 beq- unrecov_user_slb
1106 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1112 ld r9,PACA_EXGEN+EX_R9(r13)
1113 ld r10,PACA_EXGEN+EX_R10(r13)
1114 ld r11,PACA_EXGEN+EX_R11(r13)
1115 ld r12,PACA_EXGEN+EX_R12(r13)
1116 ld r13,PACA_EXGEN+EX_R13(r13)
1121 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1122 ld r4,PACA_EXGEN+EX_DAR(r13)
1129 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1132 1: addi r3,r1,STACK_FRAME_OVERHEAD
1133 bl .unrecoverable_exception
1136 #endif /* __DISABLED__ */
1140 * Machine check is different because we use a different
1141 * save area: PACA_EXMC instead of PACA_EXGEN.
1144 .globl machine_check_common
1145 machine_check_common:
1148 std r10,PACA_EXGEN+EX_DAR(r13)
1149 mfspr r10,SPRN_DSISR
1150 stw r10,PACA_EXGEN+EX_DSISR(r13)
1151 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1154 ld r3,PACA_EXGEN+EX_DAR(r13)
1155 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1159 addi r3,r1,STACK_FRAME_OVERHEAD
1160 bl .machine_check_exception
1164 .globl alignment_common
1167 std r10,PACA_EXGEN+EX_DAR(r13)
1168 mfspr r10,SPRN_DSISR
1169 stw r10,PACA_EXGEN+EX_DSISR(r13)
1170 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1171 ld r3,PACA_EXGEN+EX_DAR(r13)
1172 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1177 addi r3,r1,STACK_FRAME_OVERHEAD
1178 bl .alignment_exception
1182 .globl program_check_common
1183 program_check_common:
1184 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1187 addi r3,r1,STACK_FRAME_OVERHEAD
1188 bl .program_check_exception
1192 .globl fp_unavailable_common
1193 fp_unavailable_common:
1194 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1195 bne 1f /* if from user, just load it up */
1198 addi r3,r1,STACK_FRAME_OVERHEAD
1199 bl .kernel_fp_unavailable_exception
1202 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1204 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1205 * transaction), go do TM stuff
1207 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1209 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1212 b fast_exception_return
1213 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1214 2: /* User process was in a transaction */
1217 addi r3,r1,STACK_FRAME_OVERHEAD
1218 bl .fp_unavailable_tm
1222 .globl altivec_unavailable_common
1223 altivec_unavailable_common:
1224 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1225 #ifdef CONFIG_ALTIVEC
1228 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1229 BEGIN_FTR_SECTION_NESTED(69)
1230 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1231 * transaction), go do TM stuff
1233 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1235 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1238 b fast_exception_return
1239 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1240 2: /* User process was in a transaction */
1243 addi r3,r1,STACK_FRAME_OVERHEAD
1244 bl .altivec_unavailable_tm
1248 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1252 addi r3,r1,STACK_FRAME_OVERHEAD
1253 bl .altivec_unavailable_exception
1257 .globl vsx_unavailable_common
1258 vsx_unavailable_common:
1259 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1263 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1264 BEGIN_FTR_SECTION_NESTED(69)
1265 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1266 * transaction), go do TM stuff
1268 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1270 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1273 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1274 2: /* User process was in a transaction */
1277 addi r3,r1,STACK_FRAME_OVERHEAD
1278 bl .vsx_unavailable_tm
1282 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1286 addi r3,r1,STACK_FRAME_OVERHEAD
1287 bl .vsx_unavailable_exception
1290 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
1291 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception)
1294 .globl __end_handlers
1297 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1298 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1299 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1301 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1302 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1303 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1304 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1305 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1307 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1309 * Data area reserved for FWNMI option.
1310 * This address (0x7000) is fixed by the RPA.
1313 .globl fwnmi_data_area
1316 /* pseries and powernv need to keep the whole page from
1317 * 0x7000 to 0x8000 free for use by the firmware
1320 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1322 /* Space for CPU0's segment table */
1328 #ifdef CONFIG_PPC_POWERNV
1329 _GLOBAL(opal_mc_secondary_handler)
1330 HMT_MEDIUM_PPR_DISCARD
1335 std r3,PACA_OPAL_MC_EVT(r13)
1336 ld r13,OPAL_MC_SRR0(r3)
1338 ld r13,OPAL_MC_SRR1(r3)
1340 ld r3,OPAL_MC_GPR3(r3)
1342 b machine_check_pSeries
1343 #endif /* CONFIG_PPC_POWERNV */
1346 #define MACHINE_CHECK_HANDLER_WINDUP \
1347 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1349 mfmsr r9; /* get MSR value */ \
1351 mtmsrd r9,1; /* Clear MSR_RI */ \
1352 /* Move original SRR0 and SRR1 into the respective regs */ \
1354 mtspr SPRN_SRR1,r9; \
1356 mtspr SPRN_SRR0,r3; \
1364 REST_8GPRS(2, r1); \
1368 /* Decrement paca->in_mce. */ \
1369 lhz r12,PACA_IN_MCE(r13); \
1371 sth r12,PACA_IN_MCE(r13); \
1373 REST_2GPRS(12, r1); \
1374 /* restore original r1. */ \
1378 * Handle machine check early in real mode. We come here with
1379 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1382 .globl machine_check_handle_early
1383 machine_check_handle_early:
1384 std r0,GPR0(r1) /* Save r0 */
1385 EXCEPTION_PROLOG_COMMON_3(0x200)
1387 addi r3,r1,STACK_FRAME_OVERHEAD
1388 bl .machine_check_early
1390 #ifdef CONFIG_PPC_P7_NAP
1392 * Check if thread was in power saving mode. We come here when any
1393 * of the following is true:
1394 * a. thread wasn't in power saving mode
1395 * b. thread was in power saving mode with no state loss or
1396 * supervisor state loss
1398 * Go back to nap again if (b) is true.
1400 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1401 beq 4f /* No, it wasn;t */
1402 /* Thread was in power saving mode. Go back to nap again. */
1405 /* Supervisor state loss */
1407 stb r0,PACA_NAPSTATELOST(r13)
1408 3: bl .machine_check_queue_event
1409 MACHINE_CHECK_HANDLER_WINDUP
1412 b .power7_enter_nap_mode
1416 * Check if we are coming from hypervisor userspace. If yes then we
1417 * continue in host kernel in V mode to deliver the MC event.
1419 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1421 andi. r11,r12,MSR_PR /* See if coming from user. */
1422 bne 9f /* continue in V mode if we are. */
1425 #ifdef CONFIG_KVM_BOOK3S_64_HV
1427 * We are coming from kernel context. Check if we are coming from
1428 * guest. if yes, then we can continue. We will fall through
1429 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1431 lbz r11,HSTATE_IN_GUEST(r13)
1432 cmpwi r11,0 /* Check if coming from guest */
1433 bne 9f /* continue if we are. */
1436 * At this point we are not sure about what context we come from.
1437 * Queue up the MCE event and return from the interrupt.
1438 * But before that, check if this is an un-recoverable exception.
1439 * If yes, then stay on emergency stack and panic.
1441 andi. r11,r12,MSR_RI
1443 1: addi r3,r1,STACK_FRAME_OVERHEAD
1444 bl .unrecoverable_exception
1448 * Return from MC interrupt.
1449 * Queue up the MCE event so that we can log it later, while
1450 * returning from kernel or opal call.
1452 bl .machine_check_queue_event
1453 MACHINE_CHECK_HANDLER_WINDUP
1456 /* Deliver the machine check to host kernel in V mode. */
1457 MACHINE_CHECK_HANDLER_WINDUP
1458 b machine_check_pSeries
1461 * r13 points to the PACA, r9 contains the saved CR,
1462 * r12 contain the saved SRR1, SRR0 is still ready for return
1463 * r3 has the faulting address
1464 * r9 - r13 are saved in paca->exslb.
1465 * r3 is saved in paca->slb_r3
1466 * We assume we aren't going to take any exceptions during this procedure.
1468 _GLOBAL(slb_miss_realmode)
1470 #ifdef CONFIG_RELOCATABLE
1474 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1475 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1477 bl .slb_allocate_realmode
1479 /* All done -- return from exception. */
1481 ld r10,PACA_EXSLB+EX_LR(r13)
1482 ld r3,PACA_EXSLB+EX_R3(r13)
1483 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1487 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1493 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1496 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1497 ld r9,PACA_EXSLB+EX_R9(r13)
1498 ld r10,PACA_EXSLB+EX_R10(r13)
1499 ld r11,PACA_EXSLB+EX_R11(r13)
1500 ld r12,PACA_EXSLB+EX_R12(r13)
1501 ld r13,PACA_EXSLB+EX_R13(r13)
1503 b . /* prevent speculative execution */
1505 2: mfspr r11,SPRN_SRR0
1506 ld r10,PACAKBASE(r13)
1507 LOAD_HANDLER(r10,unrecov_slb)
1509 ld r10,PACAKMSR(r13)
1515 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1518 1: addi r3,r1,STACK_FRAME_OVERHEAD
1519 bl .unrecoverable_exception
1523 #ifdef CONFIG_PPC_970_NAP
1526 std r9,TI_LOCAL_FLAGS(r11)
1527 ld r10,_LINK(r1) /* make idle task do the */
1528 std r10,_NIP(r1) /* equivalent of a blr */
1536 _STATIC(do_hash_page)
1540 andis. r0,r4,0xa410 /* weird error? */
1541 bne- handle_page_fault /* if not, try to insert a HPTE */
1542 andis. r0,r4,DSISR_DABRMATCH@h
1543 bne- handle_dabr_fault
1546 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1547 bne- do_ste_alloc /* If so handle it */
1548 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1550 CURRENT_THREAD_INFO(r11, r1)
1551 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1552 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1553 bne 77f /* then don't call hash_page now */
1555 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1556 * accessing a userspace segment (even from the kernel). We assume
1557 * kernel addresses always have the high bit set.
1559 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1560 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1561 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1562 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1563 ori r4,r4,1 /* add _PAGE_PRESENT */
1564 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1567 * r3 contains the faulting address
1568 * r4 contains the required access permissions
1569 * r5 contains the trap number
1571 * at return r3 = 0 for success, 1 for page fault, negative for error
1573 bl .hash_page /* build HPTE if possible */
1574 cmpdi r3,0 /* see if hash_page succeeded */
1577 beq fast_exc_return_irq /* Return from exception on success */
1582 /* Here we have a page fault that hash_page can't handle. */
1586 addi r3,r1,STACK_FRAME_OVERHEAD
1592 addi r3,r1,STACK_FRAME_OVERHEAD
1597 /* We have a data breakpoint exception - handle it */
1602 addi r3,r1,STACK_FRAME_OVERHEAD
1604 12: b .ret_from_except_lite
1607 /* We have a page fault that hash_page could handle but HV refused
1612 addi r3,r1,STACK_FRAME_OVERHEAD
1618 * We come here as a result of a DSI at a point where we don't want
1619 * to call hash_page, such as when we are accessing memory (possibly
1620 * user memory) inside a PMU interrupt that occurred while interrupts
1621 * were soft-disabled. We want to invoke the exception handler for
1622 * the access, or panic if there isn't a handler.
1626 addi r3,r1,STACK_FRAME_OVERHEAD
1631 /* here we have a segment miss */
1633 bl .ste_allocate /* try to insert stab entry */
1635 bne- handle_page_fault
1636 b fast_exception_return
1639 * r13 points to the PACA, r9 contains the saved CR,
1640 * r11 and r12 contain the saved SRR0 and SRR1.
1641 * r9 - r13 are saved in paca->exslb.
1642 * We assume we aren't going to take any exceptions during this procedure.
1643 * We assume (DAR >> 60) == 0xc.
1646 _GLOBAL(do_stab_bolted)
1647 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1648 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1649 mfspr r11,SPRN_DAR /* ea */
1652 * check for bad kernel/user address
1653 * (ea & ~REGION_MASK) >= PGTABLE_RANGE
1655 rldicr. r9,r11,4,(63 - 46 - 4)
1656 li r9,0 /* VSID = 0 for bad address */
1661 * This is the kernel vsid, we take the top for context from
1662 * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
1663 * Here we know that (ea >> 60) == 0xc
1665 lis r9,(MAX_USER_CONTEXT + 1)@ha
1666 addi r9,r9,(MAX_USER_CONTEXT + 1)@l
1668 srdi r10,r11,SID_SHIFT
1669 rldimi r10,r9,ESID_BITS,0 /* proto vsid */
1670 ASM_VSID_SCRAMBLE(r10, r9, 256M)
1671 rldic r9,r10,12,16 /* r9 = vsid << 12 */
1674 /* Hash to the primary group */
1675 ld r10,PACASTABVIRT(r13)
1676 srdi r11,r11,SID_SHIFT
1677 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1679 /* Search the primary group for a free entry */
1680 1: ld r11,0(r10) /* Test valid bit of the current ste */
1687 /* Stick for only searching the primary group for now. */
1688 /* At least for now, we use a very simple random castout scheme */
1689 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1691 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1694 /* r10 currently points to an ste one past the group of interest */
1695 /* make it point to the randomly selected entry */
1697 or r10,r10,r11 /* r10 is the entry to invalidate */
1699 isync /* mark the entry invalid */
1701 rldicl r11,r11,56,1 /* clear the valid bit */
1706 clrrdi r11,r11,28 /* Get the esid part of the ste */
1709 2: std r9,8(r10) /* Store the vsid part of the ste */
1712 mfspr r11,SPRN_DAR /* Get the new esid */
1713 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1714 ori r11,r11,0x90 /* Turn on valid and kp */
1715 std r11,0(r10) /* Put new entry back into the stab */
1719 /* All done -- return from exception. */
1720 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1721 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1723 andi. r10,r12,MSR_RI
1726 mtcrf 0x80,r9 /* restore CR */
1734 ld r9,PACA_EXSLB+EX_R9(r13)
1735 ld r10,PACA_EXSLB+EX_R10(r13)
1736 ld r11,PACA_EXSLB+EX_R11(r13)
1737 ld r12,PACA_EXSLB+EX_R12(r13)
1738 ld r13,PACA_EXSLB+EX_R13(r13)
1740 b . /* prevent speculative execution */