2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/a.out.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
29 #include <linux/module.h>
30 #include <linux/prctl.h>
31 #include <linux/delay.h>
32 #include <linux/kprobes.h>
33 #include <linux/kexec.h>
34 #include <linux/backlight.h>
36 #include <asm/kdebug.h>
37 #include <asm/pgtable.h>
38 #include <asm/uaccess.h>
39 #include <asm/system.h>
41 #include <asm/machdep.h>
47 #ifdef CONFIG_PMAC_BACKLIGHT
48 #include <asm/backlight.h>
51 #include <asm/firmware.h>
52 #include <asm/processor.h>
54 #include <asm/kexec.h>
56 #ifdef CONFIG_PPC64 /* XXX */
57 #define _IO_BASE pci_io_base
59 cpumask_t cpus_in_sr = CPU_MASK_NONE;
63 #ifdef CONFIG_DEBUGGER
64 int (*__debugger)(struct pt_regs *regs);
65 int (*__debugger_ipi)(struct pt_regs *regs);
66 int (*__debugger_bpt)(struct pt_regs *regs);
67 int (*__debugger_sstep)(struct pt_regs *regs);
68 int (*__debugger_iabr_match)(struct pt_regs *regs);
69 int (*__debugger_dabr_match)(struct pt_regs *regs);
70 int (*__debugger_fault_handler)(struct pt_regs *regs);
72 EXPORT_SYMBOL(__debugger);
73 EXPORT_SYMBOL(__debugger_ipi);
74 EXPORT_SYMBOL(__debugger_bpt);
75 EXPORT_SYMBOL(__debugger_sstep);
76 EXPORT_SYMBOL(__debugger_iabr_match);
77 EXPORT_SYMBOL(__debugger_dabr_match);
78 EXPORT_SYMBOL(__debugger_fault_handler);
81 ATOMIC_NOTIFIER_HEAD(powerpc_die_chain);
83 int register_die_notifier(struct notifier_block *nb)
85 return atomic_notifier_chain_register(&powerpc_die_chain, nb);
87 EXPORT_SYMBOL(register_die_notifier);
89 int unregister_die_notifier(struct notifier_block *nb)
91 return atomic_notifier_chain_unregister(&powerpc_die_chain, nb);
93 EXPORT_SYMBOL(unregister_die_notifier);
96 * Trap & Exception support
99 static DEFINE_SPINLOCK(die_lock);
101 int die(const char *str, struct pt_regs *regs, long err)
103 static int die_counter;
109 spin_lock_irq(&die_lock);
111 #ifdef CONFIG_PMAC_BACKLIGHT
112 mutex_lock(&pmac_backlight_mutex);
113 if (machine_is(powermac) && pmac_backlight) {
114 struct backlight_properties *props;
116 down(&pmac_backlight->sem);
117 props = pmac_backlight->props;
118 props->brightness = props->max_brightness;
119 props->power = FB_BLANK_UNBLANK;
120 props->update_status(pmac_backlight);
121 up(&pmac_backlight->sem);
123 mutex_unlock(&pmac_backlight_mutex);
125 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
126 #ifdef CONFIG_PREEMPT
130 printk("SMP NR_CPUS=%d ", NR_CPUS);
132 #ifdef CONFIG_DEBUG_PAGEALLOC
133 printk("DEBUG_PAGEALLOC ");
138 printk("%s\n", ppc_md.name ? "" : ppc_md.name);
143 spin_unlock_irq(&die_lock);
145 if (kexec_should_crash(current) ||
146 kexec_sr_activated(smp_processor_id()))
148 crash_kexec_secondary(regs);
151 panic("Fatal exception in interrupt");
154 panic("Fatal exception: panic_on_oops");
161 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
165 if (!user_mode(regs)) {
166 if (die("Exception in kernel mode", regs, signr))
170 memset(&info, 0, sizeof(info));
171 info.si_signo = signr;
173 info.si_addr = (void __user *) addr;
174 force_sig_info(signr, &info, current);
177 * Init gets no signals that it doesn't have a handler for.
178 * That's all very well, but if it has caused a synchronous
179 * exception and we ignore the resulting signal, it will just
180 * generate the same exception over and over again and we get
181 * nowhere. Better to kill it and let the kernel panic.
183 if (current->pid == 1) {
184 __sighandler_t handler;
186 spin_lock_irq(¤t->sighand->siglock);
187 handler = current->sighand->action[signr-1].sa.sa_handler;
188 spin_unlock_irq(¤t->sighand->siglock);
189 if (handler == SIG_DFL) {
190 /* init has generated a synchronous exception
191 and it doesn't have a handler for the signal */
192 printk(KERN_CRIT "init has generated signal %d "
193 "but has no handler for it\n", signr);
200 void system_reset_exception(struct pt_regs *regs)
202 /* See if any machine dependent calls */
203 if (ppc_md.system_reset_exception) {
204 if (ppc_md.system_reset_exception(regs))
209 cpu_set(smp_processor_id(), cpus_in_sr);
212 die("System Reset", regs, SIGABRT);
215 * Some CPUs when released from the debugger will execute this path.
216 * These CPUs entered the debugger via a soft-reset. If the CPU was
217 * hung before entering the debugger it will return to the hung
218 * state when exiting this function. This causes a problem in
219 * kdump since the hung CPU(s) will not respond to the IPI sent
220 * from kdump. To prevent the problem we call crash_kexec_secondary()
221 * here. If a kdump had not been initiated or we exit the debugger
222 * with the "exit and recover" command (x) crash_kexec_secondary()
223 * will return after 5ms and the CPU returns to its previous state.
225 crash_kexec_secondary(regs);
227 /* Must die if the interrupt is not recoverable */
228 if (!(regs->msr & MSR_RI))
229 panic("Unrecoverable System Reset");
231 /* What should we do here? We could issue a shutdown or hard reset. */
236 * I/O accesses can cause machine checks on powermacs.
237 * Check if the NIP corresponds to the address of a sync
238 * instruction for which there is an entry in the exception
240 * Note that the 601 only takes a machine check on TEA
241 * (transfer error ack) signal assertion, and does not
242 * set any of the top 16 bits of SRR1.
245 static inline int check_io_access(struct pt_regs *regs)
247 #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
248 unsigned long msr = regs->msr;
249 const struct exception_table_entry *entry;
250 unsigned int *nip = (unsigned int *)regs->nip;
252 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
253 && (entry = search_exception_tables(regs->nip)) != NULL) {
255 * Check that it's a sync instruction, or somewhere
256 * in the twi; isync; nop sequence that inb/inw/inl uses.
257 * As the address is in the exception table
258 * we should be able to read the instr there.
259 * For the debug message, we look at the preceding
262 if (*nip == 0x60000000) /* nop */
264 else if (*nip == 0x4c00012c) /* isync */
266 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
271 rb = (*nip >> 11) & 0x1f;
272 printk(KERN_DEBUG "%s bad port %lx at %p\n",
273 (*nip & 0x100)? "OUT to": "IN from",
274 regs->gpr[rb] - _IO_BASE, nip);
276 regs->nip = entry->fixup;
280 #endif /* CONFIG_PPC_PMAC && CONFIG_PPC32 */
284 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
285 /* On 4xx, the reason for the machine check or program exception
287 #define get_reason(regs) ((regs)->dsisr)
288 #ifndef CONFIG_FSL_BOOKE
289 #define get_mc_reason(regs) ((regs)->dsisr)
291 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
293 #define REASON_FP ESR_FP
294 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
295 #define REASON_PRIVILEGED ESR_PPR
296 #define REASON_TRAP ESR_PTR
298 /* single-step stuff */
299 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
300 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
303 /* On non-4xx, the reason for the machine check or program
304 exception is in the MSR. */
305 #define get_reason(regs) ((regs)->msr)
306 #define get_mc_reason(regs) ((regs)->msr)
307 #define REASON_FP 0x100000
308 #define REASON_ILLEGAL 0x80000
309 #define REASON_PRIVILEGED 0x40000
310 #define REASON_TRAP 0x20000
312 #define single_stepping(regs) ((regs)->msr & MSR_SE)
313 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
317 * This is "fall-back" implementation for configurations
318 * which don't provide platform-specific machine check info
320 void __attribute__ ((weak))
321 platform_machine_check(struct pt_regs *regs)
325 void machine_check_exception(struct pt_regs *regs)
328 unsigned long reason = get_mc_reason(regs);
330 /* See if any machine dependent calls */
331 if (ppc_md.machine_check_exception)
332 recover = ppc_md.machine_check_exception(regs);
337 if (user_mode(regs)) {
339 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
343 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
344 /* the qspan pci read routines can cause machine checks -- Cort */
345 bad_page_fault(regs, regs->dar, SIGBUS);
349 if (debugger_fault_handler(regs)) {
354 if (check_io_access(regs))
357 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
358 if (reason & ESR_IMCP) {
359 printk("Instruction");
360 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
363 printk(" machine check in kernel mode.\n");
364 #elif defined(CONFIG_440A)
365 printk("Machine check in kernel mode.\n");
366 if (reason & ESR_IMCP){
367 printk("Instruction Synchronous Machine Check exception\n");
368 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
371 u32 mcsr = mfspr(SPRN_MCSR);
373 printk("Instruction Read PLB Error\n");
375 printk("Data Read PLB Error\n");
377 printk("Data Write PLB Error\n");
378 if (mcsr & MCSR_TLBP)
379 printk("TLB Parity Error\n");
380 if (mcsr & MCSR_ICP){
381 flush_instruction_cache();
382 printk("I-Cache Parity Error\n");
384 if (mcsr & MCSR_DCSP)
385 printk("D-Cache Search Parity Error\n");
386 if (mcsr & MCSR_DCFP)
387 printk("D-Cache Flush Parity Error\n");
388 if (mcsr & MCSR_IMPE)
389 printk("Machine Check exception is imprecise\n");
392 mtspr(SPRN_MCSR, mcsr);
394 #elif defined (CONFIG_E500)
395 printk("Machine check in kernel mode.\n");
396 printk("Caused by (from MCSR=%lx): ", reason);
398 if (reason & MCSR_MCP)
399 printk("Machine Check Signal\n");
400 if (reason & MCSR_ICPERR)
401 printk("Instruction Cache Parity Error\n");
402 if (reason & MCSR_DCP_PERR)
403 printk("Data Cache Push Parity Error\n");
404 if (reason & MCSR_DCPERR)
405 printk("Data Cache Parity Error\n");
406 if (reason & MCSR_GL_CI)
407 printk("Guarded Load or Cache-Inhibited stwcx.\n");
408 if (reason & MCSR_BUS_IAERR)
409 printk("Bus - Instruction Address Error\n");
410 if (reason & MCSR_BUS_RAERR)
411 printk("Bus - Read Address Error\n");
412 if (reason & MCSR_BUS_WAERR)
413 printk("Bus - Write Address Error\n");
414 if (reason & MCSR_BUS_IBERR)
415 printk("Bus - Instruction Data Error\n");
416 if (reason & MCSR_BUS_RBERR)
417 printk("Bus - Read Data Bus Error\n");
418 if (reason & MCSR_BUS_WBERR)
419 printk("Bus - Read Data Bus Error\n");
420 if (reason & MCSR_BUS_IPERR)
421 printk("Bus - Instruction Parity Error\n");
422 if (reason & MCSR_BUS_RPERR)
423 printk("Bus - Read Parity Error\n");
424 #elif defined (CONFIG_E200)
425 printk("Machine check in kernel mode.\n");
426 printk("Caused by (from MCSR=%lx): ", reason);
428 if (reason & MCSR_MCP)
429 printk("Machine Check Signal\n");
430 if (reason & MCSR_CP_PERR)
431 printk("Cache Push Parity Error\n");
432 if (reason & MCSR_CPERR)
433 printk("Cache Parity Error\n");
434 if (reason & MCSR_EXCP_ERR)
435 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
436 if (reason & MCSR_BUS_IRERR)
437 printk("Bus - Read Bus Error on instruction fetch\n");
438 if (reason & MCSR_BUS_DRERR)
439 printk("Bus - Read Bus Error on data load\n");
440 if (reason & MCSR_BUS_WRERR)
441 printk("Bus - Write Bus Error on buffered store or cache line push\n");
442 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
443 printk("Machine check in kernel mode.\n");
444 printk("Caused by (from SRR1=%lx): ", reason);
445 switch (reason & 0x601F0000) {
447 printk("Machine check signal\n");
449 case 0: /* for 601 */
451 case 0x140000: /* 7450 MSS error and TEA */
452 printk("Transfer error ack signal\n");
455 printk("Data parity error signal\n");
458 printk("Address parity error signal\n");
461 printk("L1 Data Cache error\n");
464 printk("L1 Instruction Cache error\n");
467 printk("L2 data cache parity error\n");
470 printk("Unknown values in msr\n");
472 #endif /* CONFIG_4xx */
475 * Optional platform-provided routine to print out
476 * additional info, e.g. bus error registers.
478 platform_machine_check(regs);
480 if (debugger_fault_handler(regs))
482 die("Machine check", regs, SIGBUS);
484 /* Must die if the interrupt is not recoverable */
485 if (!(regs->msr & MSR_RI))
486 panic("Unrecoverable Machine check");
489 void SMIException(struct pt_regs *regs)
491 die("System Management Interrupt", regs, SIGABRT);
494 void unknown_exception(struct pt_regs *regs)
496 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
497 regs->nip, regs->msr, regs->trap);
499 _exception(SIGTRAP, regs, 0, 0);
502 void instruction_breakpoint_exception(struct pt_regs *regs)
504 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
505 5, SIGTRAP) == NOTIFY_STOP)
507 if (debugger_iabr_match(regs))
509 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
512 void RunModeException(struct pt_regs *regs)
514 _exception(SIGTRAP, regs, 0, 0);
517 void __kprobes single_step_exception(struct pt_regs *regs)
519 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
521 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
522 5, SIGTRAP) == NOTIFY_STOP)
524 if (debugger_sstep(regs))
527 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
531 * After we have successfully emulated an instruction, we have to
532 * check if the instruction was being single-stepped, and if so,
533 * pretend we got a single-step exception. This was pointed out
534 * by Kumar Gala. -- paulus
536 static void emulate_single_step(struct pt_regs *regs)
538 if (single_stepping(regs)) {
539 clear_single_step(regs);
540 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
544 static void parse_fpe(struct pt_regs *regs)
549 flush_fp_to_thread(current);
551 fpscr = current->thread.fpscr.val;
553 /* Invalid operation */
554 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
558 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
562 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
566 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
570 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
573 _exception(SIGFPE, regs, code, regs->nip);
577 * Illegal instruction emulation support. Originally written to
578 * provide the PVR to user applications using the mfspr rd, PVR.
579 * Return non-zero if we can't emulate, or -EFAULT if the associated
580 * memory access caused an access fault. Return zero on success.
582 * There are a couple of ways to do this, either "decode" the instruction
583 * or directly match lots of bits. In this case, matching lots of
584 * bits is faster and easier.
587 #define INST_MFSPR_PVR 0x7c1f42a6
588 #define INST_MFSPR_PVR_MASK 0xfc1fffff
590 #define INST_DCBA 0x7c0005ec
591 #define INST_DCBA_MASK 0x7c0007fe
593 #define INST_MCRXR 0x7c000400
594 #define INST_MCRXR_MASK 0x7c0007fe
596 #define INST_STRING 0x7c00042a
597 #define INST_STRING_MASK 0x7c0007fe
598 #define INST_STRING_GEN_MASK 0x7c00067e
599 #define INST_LSWI 0x7c0004aa
600 #define INST_LSWX 0x7c00042a
601 #define INST_STSWI 0x7c0005aa
602 #define INST_STSWX 0x7c00052a
604 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
606 u8 rT = (instword >> 21) & 0x1f;
607 u8 rA = (instword >> 16) & 0x1f;
608 u8 NB_RB = (instword >> 11) & 0x1f;
613 /* Early out if we are an invalid form of lswx */
614 if ((instword & INST_STRING_MASK) == INST_LSWX)
615 if ((rT == rA) || (rT == NB_RB))
618 EA = (rA == 0) ? 0 : regs->gpr[rA];
620 switch (instword & INST_STRING_MASK) {
624 num_bytes = regs->xer & 0x7f;
628 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
634 while (num_bytes != 0)
637 u32 shift = 8 * (3 - (pos & 0x3));
639 switch ((instword & INST_STRING_MASK)) {
642 if (get_user(val, (u8 __user *)EA))
644 /* first time updating this reg,
648 regs->gpr[rT] |= val << shift;
652 val = regs->gpr[rT] >> shift;
653 if (put_user(val, (u8 __user *)EA))
657 /* move EA to next address */
661 /* manage our position within the register */
672 static int emulate_instruction(struct pt_regs *regs)
677 if (!user_mode(regs) || (regs->msr & MSR_LE))
679 CHECK_FULL_REGS(regs);
681 if (get_user(instword, (u32 __user *)(regs->nip)))
684 /* Emulate the mfspr rD, PVR. */
685 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
686 rd = (instword >> 21) & 0x1f;
687 regs->gpr[rd] = mfspr(SPRN_PVR);
691 /* Emulating the dcba insn is just a no-op. */
692 if ((instword & INST_DCBA_MASK) == INST_DCBA)
695 /* Emulate the mcrxr insn. */
696 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
697 int shift = (instword >> 21) & 0x1c;
698 unsigned long msk = 0xf0000000UL >> shift;
700 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
701 regs->xer &= ~0xf0000000UL;
705 /* Emulate load/store string insn. */
706 if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
707 return emulate_string_inst(regs, instword);
713 * Look through the list of trap instructions that are used for BUG(),
714 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
715 * that the exception was caused by a trap instruction of some kind.
716 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
719 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
721 #ifndef CONFIG_MODULES
722 #define module_find_bug(x) NULL
725 struct bug_entry *find_bug(unsigned long bugaddr)
727 struct bug_entry *bug;
729 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
730 if (bugaddr == bug->bug_addr)
732 return module_find_bug(bugaddr);
735 static int check_bug_trap(struct pt_regs *regs)
737 struct bug_entry *bug;
740 if (regs->msr & MSR_PR)
741 return 0; /* not in kernel */
742 addr = regs->nip; /* address of trap instruction */
743 if (addr < PAGE_OFFSET)
745 bug = find_bug(regs->nip);
748 if (bug->line & BUG_WARNING_TRAP) {
749 /* this is a WARN_ON rather than BUG/BUG_ON */
750 printk(KERN_ERR "Badness in %s at %s:%ld\n",
751 bug->function, bug->file,
752 bug->line & ~BUG_WARNING_TRAP);
756 printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
757 bug->function, bug->file, bug->line);
762 void __kprobes program_check_exception(struct pt_regs *regs)
764 unsigned int reason = get_reason(regs);
765 extern int do_mathemu(struct pt_regs *regs);
767 #ifdef CONFIG_MATH_EMULATION
768 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
769 * but there seems to be a hardware bug on the 405GP (RevD)
770 * that means ESR is sometimes set incorrectly - either to
771 * ESR_DST (!?) or 0. In the process of chasing this with the
772 * hardware people - not sure if it can happen on any illegal
773 * instruction or only on FP instructions, whether there is a
774 * pattern to occurences etc. -dgibson 31/Mar/2003 */
775 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
776 emulate_single_step(regs);
779 #endif /* CONFIG_MATH_EMULATION */
781 if (reason & REASON_FP) {
782 /* IEEE FP exception */
786 if (reason & REASON_TRAP) {
788 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
791 if (debugger_bpt(regs))
793 if (check_bug_trap(regs)) {
797 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
803 /* Try to emulate it if we should. */
804 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
805 switch (emulate_instruction(regs)) {
808 emulate_single_step(regs);
811 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
816 if (reason & REASON_PRIVILEGED)
817 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
819 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
822 void alignment_exception(struct pt_regs *regs)
826 /* we don't implement logging of alignment exceptions */
827 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
828 fixed = fix_alignment(regs);
831 regs->nip += 4; /* skip over emulated instruction */
832 emulate_single_step(regs);
836 /* Operand address was bad */
837 if (fixed == -EFAULT) {
839 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
841 /* Search exception table */
842 bad_page_fault(regs, regs->dar, SIGSEGV);
845 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
848 void StackOverflow(struct pt_regs *regs)
850 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
851 current, regs->gpr[1]);
854 panic("kernel stack overflow");
857 void nonrecoverable_exception(struct pt_regs *regs)
859 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
860 regs->nip, regs->msr);
862 die("nonrecoverable exception", regs, SIGKILL);
865 void trace_syscall(struct pt_regs *regs)
867 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
868 current, current->pid, regs->nip, regs->link, regs->gpr[0],
869 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
872 void kernel_fp_unavailable_exception(struct pt_regs *regs)
874 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
875 "%lx at %lx\n", regs->trap, regs->nip);
876 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
879 void altivec_unavailable_exception(struct pt_regs *regs)
881 #if !defined(CONFIG_ALTIVEC)
882 if (user_mode(regs)) {
883 /* A user program has executed an altivec instruction,
884 but this kernel doesn't support altivec. */
885 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
889 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
890 "%lx at %lx\n", regs->trap, regs->nip);
891 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
894 void performance_monitor_exception(struct pt_regs *regs)
900 void SoftwareEmulation(struct pt_regs *regs)
902 extern int do_mathemu(struct pt_regs *);
903 extern int Soft_emulate_8xx(struct pt_regs *);
906 CHECK_FULL_REGS(regs);
908 if (!user_mode(regs)) {
910 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
913 #ifdef CONFIG_MATH_EMULATION
914 errcode = do_mathemu(regs);
916 errcode = Soft_emulate_8xx(regs);
920 _exception(SIGFPE, regs, 0, 0);
921 else if (errcode == -EFAULT)
922 _exception(SIGSEGV, regs, 0, 0);
924 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
926 emulate_single_step(regs);
928 #endif /* CONFIG_8xx */
930 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
932 void DebugException(struct pt_regs *regs, unsigned long debug_status)
934 if (debug_status & DBSR_IC) { /* instruction completion */
935 regs->msr &= ~MSR_DE;
936 if (user_mode(regs)) {
937 current->thread.dbcr0 &= ~DBCR0_IC;
939 /* Disable instruction completion */
940 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
941 /* Clear the instruction completion event */
942 mtspr(SPRN_DBSR, DBSR_IC);
943 if (debugger_sstep(regs))
946 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
949 #endif /* CONFIG_4xx || CONFIG_BOOKE */
951 #if !defined(CONFIG_TAU_INT)
952 void TAUException(struct pt_regs *regs)
954 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
955 regs->nip, regs->msr, regs->trap, print_tainted());
957 #endif /* CONFIG_INT_TAU */
959 #ifdef CONFIG_ALTIVEC
960 void altivec_assist_exception(struct pt_regs *regs)
964 if (!user_mode(regs)) {
965 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
966 " at %lx\n", regs->nip);
967 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
970 flush_altivec_to_thread(current);
972 err = emulate_altivec(regs);
974 regs->nip += 4; /* skip emulated instruction */
975 emulate_single_step(regs);
979 if (err == -EFAULT) {
980 /* got an error reading the instruction */
981 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
983 /* didn't recognize the instruction */
984 /* XXX quick hack for now: set the non-Java bit in the VSCR */
985 if (printk_ratelimit())
986 printk(KERN_ERR "Unrecognized altivec instruction "
987 "in %s at %lx\n", current->comm, regs->nip);
988 current->thread.vscr.u[3] |= 0x10000;
991 #endif /* CONFIG_ALTIVEC */
993 #ifdef CONFIG_FSL_BOOKE
994 void CacheLockingException(struct pt_regs *regs, unsigned long address,
995 unsigned long error_code)
997 /* We treat cache locking instructions from the user
998 * as priv ops, in the future we could try to do
1001 if (error_code & (ESR_DLK|ESR_ILK))
1002 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1005 #endif /* CONFIG_FSL_BOOKE */
1008 void SPEFloatingPointException(struct pt_regs *regs)
1010 unsigned long spefscr;
1014 spefscr = current->thread.spefscr;
1015 fpexc_mode = current->thread.fpexc_mode;
1017 /* Hardware does not neccessarily set sticky
1018 * underflow/overflow/invalid flags */
1019 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1021 spefscr |= SPEFSCR_FOVFS;
1023 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1025 spefscr |= SPEFSCR_FUNFS;
1027 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1029 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1031 spefscr |= SPEFSCR_FINVS;
1033 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1036 current->thread.spefscr = spefscr;
1038 _exception(SIGFPE, regs, code, regs->nip);
1044 * We enter here if we get an unrecoverable exception, that is, one
1045 * that happened at a point where the RI (recoverable interrupt) bit
1046 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1047 * we therefore lost state by taking this exception.
1049 void unrecoverable_exception(struct pt_regs *regs)
1051 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1052 regs->trap, regs->nip);
1053 die("Unrecoverable exception", regs, SIGABRT);
1056 #ifdef CONFIG_BOOKE_WDT
1058 * Default handler for a Watchdog exception,
1059 * spins until a reboot occurs
1061 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1063 /* Generic WatchdogHandler, implement your own */
1064 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1068 void WatchdogException(struct pt_regs *regs)
1070 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1071 WatchdogHandler(regs);
1076 * We enter here if we discover during exception entry that we are
1077 * running in supervisor mode with a userspace value in the stack pointer.
1079 void kernel_bad_stack(struct pt_regs *regs)
1081 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1082 regs->gpr[1], regs->nip);
1083 die("Bad kernel stack pointer", regs, SIGABRT);
1086 void __init trap_init(void)