2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
16 * Copyright 2011 Freescale Semiconductor, Inc.
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
21 #include <linux/jiffies.h>
22 #include <linux/hrtimer.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
25 #include <linux/kvm_host.h>
26 #include <linux/clockchips.h>
30 #include <asm/byteorder.h>
31 #include <asm/kvm_ppc.h>
32 #include <asm/disassemble.h>
39 #define OP_31_XOP_TRAP 4
40 #define OP_31_XOP_LWZX 23
41 #define OP_31_XOP_DCBST 54
42 #define OP_31_XOP_TRAP_64 68
43 #define OP_31_XOP_DCBF 86
44 #define OP_31_XOP_LBZX 87
45 #define OP_31_XOP_STWX 151
46 #define OP_31_XOP_STBX 215
47 #define OP_31_XOP_LBZUX 119
48 #define OP_31_XOP_STBUX 247
49 #define OP_31_XOP_LHZX 279
50 #define OP_31_XOP_LHZUX 311
51 #define OP_31_XOP_MFSPR 339
52 #define OP_31_XOP_LHAX 343
53 #define OP_31_XOP_STHX 407
54 #define OP_31_XOP_STHUX 439
55 #define OP_31_XOP_MTSPR 467
56 #define OP_31_XOP_DCBI 470
57 #define OP_31_XOP_LWBRX 534
58 #define OP_31_XOP_TLBSYNC 566
59 #define OP_31_XOP_STWBRX 662
60 #define OP_31_XOP_LHBRX 790
61 #define OP_31_XOP_STHBRX 918
80 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
82 unsigned long dec_nsec;
83 unsigned long long dec_time;
85 pr_debug("mtDEC: %x\n", vcpu->arch.dec);
86 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
88 #ifdef CONFIG_PPC_BOOK3S
89 /* mtdec lowers the interrupt line when positive. */
90 kvmppc_core_dequeue_dec(vcpu);
92 /* POWER4+ triggers a dec interrupt if the value is < 0 */
93 if (vcpu->arch.dec & 0x80000000) {
94 kvmppc_core_queue_dec(vcpu);
100 /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
101 if (vcpu->arch.dec == 0)
106 * The decrementer ticks at the same rate as the timebase, so
107 * that's how we convert the guest DEC value to the number of
111 dec_time = vcpu->arch.dec;
113 * Guest timebase ticks at the same frequency as host decrementer.
114 * So use the host decrementer calculations for decrementer emulation.
116 dec_time = dec_time << decrementer_clockevent.shift;
117 do_div(dec_time, decrementer_clockevent.mult);
118 dec_nsec = do_div(dec_time, NSEC_PER_SEC);
119 hrtimer_start(&vcpu->arch.dec_timer,
120 ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
121 vcpu->arch.dec_jiffies = get_tb();
124 u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
126 u64 jd = tb - vcpu->arch.dec_jiffies;
129 if (vcpu->arch.dec < jd)
133 return vcpu->arch.dec - jd;
136 static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
138 enum emulation_result emulated = EMULATE_DONE;
139 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
143 vcpu->arch.shared->srr0 = spr_val;
146 vcpu->arch.shared->srr1 = spr_val;
149 /* XXX We need to context-switch the timebase for
150 * watchdog and FIT. */
151 case SPRN_TBWL: break;
152 case SPRN_TBWU: break;
155 vcpu->arch.dec = spr_val;
156 kvmppc_emulate_dec(vcpu);
160 vcpu->arch.shared->sprg0 = spr_val;
163 vcpu->arch.shared->sprg1 = spr_val;
166 vcpu->arch.shared->sprg2 = spr_val;
169 vcpu->arch.shared->sprg3 = spr_val;
173 emulated = kvmppc_core_emulate_mtspr(vcpu, sprn,
175 if (emulated == EMULATE_FAIL)
176 printk(KERN_INFO "mtspr: unknown spr "
181 kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
186 static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
188 enum emulation_result emulated = EMULATE_DONE;
193 spr_val = vcpu->arch.shared->srr0;
196 spr_val = vcpu->arch.shared->srr1;
199 spr_val = vcpu->arch.pvr;
202 spr_val = vcpu->vcpu_id;
205 /* Note: mftb and TBRL/TBWL are user-accessible, so
206 * the guest can always access the real TB anyways.
207 * In fact, we probably will never see these traps. */
209 spr_val = get_tb() >> 32;
216 spr_val = vcpu->arch.shared->sprg0;
219 spr_val = vcpu->arch.shared->sprg1;
222 spr_val = vcpu->arch.shared->sprg2;
225 spr_val = vcpu->arch.shared->sprg3;
227 /* Note: SPRG4-7 are user-readable, so we don't get
231 spr_val = kvmppc_get_dec(vcpu, get_tb());
234 emulated = kvmppc_core_emulate_mfspr(vcpu, sprn,
236 if (unlikely(emulated == EMULATE_FAIL)) {
237 printk(KERN_INFO "mfspr: unknown spr "
243 if (emulated == EMULATE_DONE)
244 kvmppc_set_gpr(vcpu, rt, spr_val);
245 kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
262 * XXX is_bigendian should depend on MMU mapping or MSR[LE]
264 /* XXX Should probably auto-generate instruction decoding for a particular core
265 * from opcode tables in the future. */
266 int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
268 u32 inst = kvmppc_get_last_inst(vcpu);
269 int ra = get_ra(inst);
270 int rs = get_rs(inst);
271 int rt = get_rt(inst);
272 int sprn = get_sprn(inst);
273 enum emulation_result emulated = EMULATE_DONE;
276 /* this default type might be overwritten by subcategories */
277 kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
279 pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
281 switch (get_op(inst)) {
283 #ifdef CONFIG_PPC_BOOK3S
285 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
287 kvmppc_core_queue_program(vcpu,
288 vcpu->arch.shared->esr | ESR_PTR);
294 switch (get_xop(inst)) {
298 case OP_31_XOP_TRAP_64:
300 #ifdef CONFIG_PPC_BOOK3S
301 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
303 kvmppc_core_queue_program(vcpu,
304 vcpu->arch.shared->esr | ESR_PTR);
309 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
313 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
316 case OP_31_XOP_LBZUX:
317 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
318 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
322 emulated = kvmppc_handle_store(run, vcpu,
323 kvmppc_get_gpr(vcpu, rs),
328 emulated = kvmppc_handle_store(run, vcpu,
329 kvmppc_get_gpr(vcpu, rs),
333 case OP_31_XOP_STBUX:
334 emulated = kvmppc_handle_store(run, vcpu,
335 kvmppc_get_gpr(vcpu, rs),
337 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
341 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
345 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
348 case OP_31_XOP_LHZUX:
349 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
350 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
353 case OP_31_XOP_MFSPR:
354 emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
358 emulated = kvmppc_handle_store(run, vcpu,
359 kvmppc_get_gpr(vcpu, rs),
363 case OP_31_XOP_STHUX:
364 emulated = kvmppc_handle_store(run, vcpu,
365 kvmppc_get_gpr(vcpu, rs),
367 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
370 case OP_31_XOP_MTSPR:
371 emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
374 case OP_31_XOP_DCBST:
377 /* Do nothing. The guest is performing dcbi because
378 * hardware DMA is not snooped by the dcache, but
379 * emulated DMA either goes through the dcache as
380 * normal writes, or the host kernel has handled dcache
384 case OP_31_XOP_LWBRX:
385 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
388 case OP_31_XOP_TLBSYNC:
391 case OP_31_XOP_STWBRX:
392 emulated = kvmppc_handle_store(run, vcpu,
393 kvmppc_get_gpr(vcpu, rs),
397 case OP_31_XOP_LHBRX:
398 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
401 case OP_31_XOP_STHBRX:
402 emulated = kvmppc_handle_store(run, vcpu,
403 kvmppc_get_gpr(vcpu, rs),
408 /* Attempt core-specific emulation below. */
409 emulated = EMULATE_FAIL;
414 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
417 /* TBD: Add support for other 64 bit load variants like ldu, ldux, ldx etc. */
420 emulated = kvmppc_handle_load(run, vcpu, rt, 8, 1);
424 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
425 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
429 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
433 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
434 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
438 emulated = kvmppc_handle_store(run, vcpu,
439 kvmppc_get_gpr(vcpu, rs),
443 /* TBD: Add support for other 64 bit store variants like stdu, stdux, stdx etc. */
446 emulated = kvmppc_handle_store(run, vcpu,
447 kvmppc_get_gpr(vcpu, rs),
452 emulated = kvmppc_handle_store(run, vcpu,
453 kvmppc_get_gpr(vcpu, rs),
455 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
459 emulated = kvmppc_handle_store(run, vcpu,
460 kvmppc_get_gpr(vcpu, rs),
465 emulated = kvmppc_handle_store(run, vcpu,
466 kvmppc_get_gpr(vcpu, rs),
468 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
472 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
476 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
477 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
481 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
485 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
486 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
490 emulated = kvmppc_handle_store(run, vcpu,
491 kvmppc_get_gpr(vcpu, rs),
496 emulated = kvmppc_handle_store(run, vcpu,
497 kvmppc_get_gpr(vcpu, rs),
499 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
503 emulated = EMULATE_FAIL;
506 if (emulated == EMULATE_FAIL) {
507 emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance);
508 if (emulated == EMULATE_AGAIN) {
510 } else if (emulated == EMULATE_FAIL) {
512 printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
513 "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
514 kvmppc_core_queue_program(vcpu, 0);
518 trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
520 /* Advance past emulated instruction. */
522 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);