2 * Wind River SBC8560 setup and early boot code.
4 * Copyright 2007 Wind River Systems Inc.
6 * By Paul Gortmaker (see MAINTAINERS for contact information)
8 * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/stddef.h>
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/delay.h>
21 #include <linux/seq_file.h>
22 #include <linux/of_platform.h>
24 #include <asm/system.h>
26 #include <asm/machdep.h>
27 #include <asm/pci-bridge.h>
29 #include <mm/mmu_decl.h>
32 #include <sysdev/fsl_soc.h>
33 #include <sysdev/fsl_pci.h>
39 #include <sysdev/cpm2_pic.h>
42 static void __init sbc8560_pic_init(void)
44 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
49 mpc85xx_cpm2_pic_init();
53 * Setup the architecture
60 static const struct cpm_pin sbc8560_pins[] = {
62 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
63 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
64 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
67 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
68 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
69 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
72 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
73 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
74 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
75 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
76 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
77 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
78 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
79 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
80 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
81 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
82 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
83 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
84 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
85 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
86 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
87 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
90 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
91 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
92 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
93 {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
94 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
95 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
96 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
97 {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
99 {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
100 {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
101 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
102 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
103 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
104 {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
105 {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
108 static void __init init_ioports(void)
112 for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
113 const struct cpm_pin *pin = &sbc8560_pins[i];
114 cpm2_set_pin(pin->port, pin->pin, pin->flags);
117 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
118 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
119 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
120 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
121 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
122 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
123 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
124 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
128 static void __init sbc8560_setup_arch(void)
131 struct device_node *np;
135 ppc_md.progress("sbc8560_setup_arch()", 0);
143 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
144 fsl_add_bridge(np, 1);
148 static void sbc8560_show_cpuinfo(struct seq_file *m)
150 uint pvid, svid, phid1;
152 pvid = mfspr(SPRN_PVR);
153 svid = mfspr(SPRN_SVR);
155 seq_printf(m, "Vendor\t\t: Wind River\n");
156 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
157 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
159 /* Display cpu Pll setting */
160 phid1 = mfspr(SPRN_HID1);
161 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
164 machine_device_initcall(sbc8560, mpc85xx_common_publish_devices);
167 * Called very early, device-tree isn't unflattened
169 static int __init sbc8560_probe(void)
171 unsigned long root = of_get_flat_dt_root();
173 return of_flat_dt_is_compatible(root, "SBC8560");
176 #ifdef CONFIG_RTC_DRV_M48T59
177 static int __init sbc8560_rtc_init(void)
179 struct device_node *np;
181 struct platform_device *rtc_dev;
183 np = of_find_compatible_node(NULL, NULL, "m48t59");
185 printk("No RTC in DTB. Has it been eaten by wild dogs?\n");
189 of_address_to_resource(np, 0, &res);
192 printk("Found RTC (m48t59) at i/o 0x%x\n", res.start);
194 rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1);
196 if (IS_ERR(rtc_dev)) {
197 printk("Registering sbc8560 RTC device failed\n");
198 return PTR_ERR(rtc_dev);
204 arch_initcall(sbc8560_rtc_init);
208 static __u8 __iomem *brstcr;
210 static int __init sbc8560_bdrstcr_init(void)
212 struct device_node *np;
215 np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr");
217 printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n");
221 of_address_to_resource(np, 0, &res);
223 printk(KERN_INFO "sbc8560: Found BRSTCR at %pR\n", &res);
225 brstcr = ioremap(res.start, resource_size(&res));
227 printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n");
234 arch_initcall(sbc8560_bdrstcr_init);
236 void sbc8560_rstcr_restart(char * cmd)
240 clrbits8(brstcr, 0x80);
245 define_machine(sbc8560) {
247 .probe = sbc8560_probe,
248 .setup_arch = sbc8560_setup_arch,
249 .init_IRQ = sbc8560_pic_init,
250 .show_cpuinfo = sbc8560_show_cpuinfo,
251 .get_irq = mpic_get_irq,
252 .restart = sbc8560_rstcr_restart,
253 .calibrate_decr = generic_calibrate_decr,
254 .progress = udbg_progress,