1 menu "Platform support"
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/maple/Kconfig"
10 source "arch/powerpc/platforms/pasemi/Kconfig"
11 source "arch/powerpc/platforms/ps3/Kconfig"
12 source "arch/powerpc/platforms/cell/Kconfig"
13 source "arch/powerpc/platforms/8xx/Kconfig"
14 source "arch/powerpc/platforms/82xx/Kconfig"
15 source "arch/powerpc/platforms/83xx/Kconfig"
16 source "arch/powerpc/platforms/85xx/Kconfig"
17 source "arch/powerpc/platforms/86xx/Kconfig"
18 source "arch/powerpc/platforms/embedded6xx/Kconfig"
19 source "arch/powerpc/platforms/44x/Kconfig"
20 source "arch/powerpc/platforms/40x/Kconfig"
21 source "arch/powerpc/platforms/amigaone/Kconfig"
22 source "arch/powerpc/platforms/wsp/Kconfig"
25 bool "KVM Guest support"
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
33 In case of doubt, say Y
36 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
41 In case of doubt, say Y
45 depends on 6xx || PPC64
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
49 be selected by all platforms that need it.
51 config PPC_OF_BOOT_TRAMPOLINE
52 bool "Support booting from Open Firmware or yaboot"
53 depends on 6xx || PPC64
56 Support from booting from Open Firmware or yaboot using an
57 Open Firmware client interface. This enables the kernel to
58 communicate with open firmware to retrieve system information
59 such as the device tree.
61 In case of doubt, say Y
63 config UDBG_RTAS_CONSOLE
64 bool "RTAS based debug console"
68 config PPC_SMP_MUXED_IPI
71 Select this opton if your platform supports SMP and your
72 interrupt controller provides less than 4 interrupts to each
73 cpu. This will enable the generic code to multiplex the 4
74 messages on to one ipi.
77 bool "BEAT based debug console"
89 config PPC_EPAPR_HV_PIC
99 bool "MPIC message register support"
103 Enables support for the MPIC message registers. These
104 registers are used for inter-processor communication.
119 config RTAS_ERROR_LOGGING
124 config PPC_RTAS_DAEMON
130 bool "Proc interface to RTAS"
131 depends on PPC_RTAS && PROC_FS
135 tristate "Firmware flash interface"
136 depends on PPC64 && RTAS_PROC
142 config MPIC_U3_HT_IRQS
146 config MPIC_BROKEN_REGREAD
150 This option enables a MPIC driver workaround for some chips
151 that have a bug that causes some interrupt source information
152 to not read back properly. It is safe to use on other chips as
153 well, but enabling it uses about 8KB of memory to keep copies
154 of the register contents in software.
157 depends on PPC_PSERIES
162 depends on PPC_PSERIES
163 bool "Support for GX bus based adapters"
165 Bus device driver for GX bus based adapters.
179 config PPC_INDIRECT_IO
183 config PPC_INDIRECT_PIO
185 select PPC_INDIRECT_IO
187 config PPC_INDIRECT_MMIO
189 select PPC_INDIRECT_IO
191 config PPC_IO_WORKAROUNDS
194 source "drivers/cpufreq/Kconfig"
196 menu "CPU Frequency drivers"
200 bool "Support for Apple PowerBooks"
201 depends on ADB_PMU && PPC32
202 select CPU_FREQ_TABLE
204 This adds support for frequency switching on Apple PowerBooks,
205 this currently includes some models of iBook & Titanium
208 config CPU_FREQ_PMAC64
209 bool "Support for some Apple G5s"
210 depends on PPC_PMAC && PPC64
211 select CPU_FREQ_TABLE
213 This adds support for frequency switching on Apple iMac G5,
214 and some of the more recent desktop G5 machines as well.
216 config PPC_PASEMI_CPUFREQ
217 bool "Support for PA Semi PWRficient"
218 depends on PPC_PASEMI
220 select CPU_FREQ_TABLE
222 This adds the support for frequency switching on PA Semi
223 PWRficient processors.
227 menu "CPUIdle driver"
229 source "drivers/cpuidle/Kconfig"
233 config PPC601_SYNC_FIX
234 bool "Workarounds for PPC601 bugs"
235 depends on 6xx && PPC_PMAC
237 Some versions of the PPC601 (the first PowerPC chip) have bugs which
238 mean that extra synchronization instructions are required near
239 certain instructions, typically those that make major changes to the
240 CPU state. These extra instructions reduce performance slightly.
241 If you say N here, these extra instructions will not be included,
242 resulting in a kernel which will run faster but may not run at all
243 on some systems with the PPC601 chip.
245 If in doubt, say Y here.
248 bool "On-chip CPU temperature sensor support"
251 G3 and G4 processors have an on-chip temperature sensor called the
252 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
253 temperature within 2-4 degrees Celsius. This option shows the current
254 on-die temperature in /proc/cpuinfo if the cpu supports it.
256 Unfortunately, on some chip revisions, this sensor is very inaccurate
257 and in many cases, does not work at all, so don't assume the cpu
258 temp is actually what /proc/cpuinfo says it is.
261 bool "Interrupt driven TAU driver (DANGEROUS)"
264 The TAU supports an interrupt driven mode which causes an interrupt
265 whenever the temperature goes out of range. This is the fastest way
266 to get notified the temp has exceeded a range. With this option off,
267 a timer is used to re-check the temperature periodically.
269 However, on some cpus it appears that the TAU interrupt hardware
270 is buggy and can cause a situation which would lead unexplained hard
273 Unless you are extending the TAU driver, or enjoy kernel/hardware
274 debugging, leave this option off.
277 bool "Average high and low temp"
280 The TAU hardware can compare the temperature to an upper and lower
281 bound. The default behavior is to show both the upper and lower
282 bound in /proc/cpuinfo. If the range is large, the temperature is
283 either changing a lot, or the TAU hardware is broken (likely on some
284 G4's). If the range is small (around 4 degrees), the temperature is
285 relatively stable. If you say Y here, a single temperature value,
286 halfway between the upper and lower bounds, will be reported in
289 If in doubt, say N here.
292 bool "Freescale QUICC Engine (QE) Support"
293 depends on FSL_SOC && PPC32
297 The QUICC Engine (QE) is a new generation of communications
298 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
299 Selecting this option means that you wish to build a kernel
300 for a machine with a QE coprocessor.
303 bool "QE GPIO support"
304 depends on QUICC_ENGINE
305 select ARCH_REQUIRE_GPIOLIB
307 Say Y here if you're going to use hardware that connects to the
311 bool "Enable support for the CPM2 (Communications Processor Module)"
312 depends on (FSL_SOC_BOOKE && PPC32) || 8260
315 select PPC_PCI_CHOICE
316 select ARCH_REQUIRE_GPIOLIB
318 The CPM2 (Communications Processor Module) is a coprocessor on
319 embedded CPUs made by Freescale. Selecting this option means that
320 you wish to build a kernel for a machine with a CPM2 coprocessor
321 on it (826x, 827x, 8560).
324 tristate "Axon DDR2 memory device driver"
325 depends on PPC_IBM_CELL_BLADE && BLOCK
328 It registers one block device per Axon's DDR2 memory bank found
329 on a system. Block devices are called axonram?, their major and
330 minor numbers are available in /proc/devices, /proc/partitions or
331 in /sys/block/axonram?/dev.
336 select GENERIC_ISA_DMA
338 Supports for the ULI1575 PCIe south bridge that exists on some
339 Freescale reference boards. The boards all use the ULI in pretty
348 Uses information from the OF or flattened device tree to instantiate
349 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
352 bool "Support for simple, memory-mapped GPIO controllers"
354 select ARCH_REQUIRE_GPIOLIB
356 Say Y here to support simple, memory-mapped GPIO controllers.
357 These are usually BCSRs used to control board's switches, LEDs,
358 chip-selects, Ethernet/USB PHY's power and various other small
359 on-board peripherals.
361 config MCU_MPC8349EMITX
362 bool "MPC8349E-mITX MCU driver"
363 depends on I2C=y && PPC_83xx
364 select ARCH_REQUIRE_GPIOLIB
366 Say Y here to enable soft power-off functionality on the Freescale
367 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
368 also register MCU GPIOs with the generic GPIO API, so you'll able
369 to use MCU pins as GPIOs.
372 bool "Xilinx PCI host bridge support"
373 depends on PCI && XILINX_VIRTEX