3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/list.h>
22 #include <linux/pci.h>
23 #include <linux/proc_fs.h>
24 #include <linux/rbtree.h>
25 #include <linux/seq_file.h>
26 #include <linux/spinlock.h>
27 #include <asm/atomic.h>
29 #include <asm/eeh_event.h>
31 #include <asm/machdep.h>
32 #include <asm/ppc-pci.h>
34 #include <asm/systemcfg.h>
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 100000
80 static int ibm_set_eeh_option;
81 static int ibm_set_slot_reset;
82 static int ibm_read_slot_reset_state;
83 static int ibm_read_slot_reset_state2;
84 static int ibm_slot_error_detail;
86 static int eeh_subsystem_enabled;
88 /* Lock to avoid races due to multiple reports of an error */
89 static DEFINE_SPINLOCK(confirm_error_lock);
91 /* Buffer for reporting slot-error-detail rtas calls */
92 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
93 static DEFINE_SPINLOCK(slot_errbuf_lock);
94 static int eeh_error_buf_size;
96 /* System monitoring statistics */
97 static DEFINE_PER_CPU(unsigned long, no_device);
98 static DEFINE_PER_CPU(unsigned long, no_dn);
99 static DEFINE_PER_CPU(unsigned long, no_cfg_addr);
100 static DEFINE_PER_CPU(unsigned long, ignored_check);
101 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
102 static DEFINE_PER_CPU(unsigned long, false_positives);
103 static DEFINE_PER_CPU(unsigned long, ignored_failures);
104 static DEFINE_PER_CPU(unsigned long, slot_resets);
107 * The pci address cache subsystem. This subsystem places
108 * PCI device address resources into a red-black tree, sorted
109 * according to the address range, so that given only an i/o
110 * address, the corresponding PCI device can be **quickly**
111 * found. It is safe to perform an address lookup in an interrupt
112 * context; this ability is an important feature.
114 * Currently, the only customer of this code is the EEH subsystem;
115 * thus, this code has been somewhat tailored to suit EEH better.
116 * In particular, the cache does *not* hold the addresses of devices
117 * for which EEH is not enabled.
119 * (Implementation Note: The RB tree seems to be better/faster
120 * than any hash algo I could think of for this problem, even
121 * with the penalty of slow pointer chases for d-cache misses).
123 struct pci_io_addr_range
125 struct rb_node rb_node;
126 unsigned long addr_lo;
127 unsigned long addr_hi;
128 struct pci_dev *pcidev;
132 static struct pci_io_addr_cache
134 struct rb_root rb_root;
135 spinlock_t piar_lock;
136 } pci_io_addr_cache_root;
138 static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
140 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
143 struct pci_io_addr_range *piar;
144 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
146 if (addr < piar->addr_lo) {
149 if (addr > piar->addr_hi) {
152 pci_dev_get(piar->pcidev);
162 * pci_get_device_by_addr - Get device, given only address
163 * @addr: mmio (PIO) phys address or i/o port number
165 * Given an mmio phys address, or a port number, find a pci device
166 * that implements this address. Be sure to pci_dev_put the device
167 * when finished. I/O port numbers are assumed to be offset
168 * from zero (that is, they do *not* have pci_io_addr added in).
169 * It is safe to call this function within an interrupt.
171 static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
176 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
177 dev = __pci_get_device_by_addr(addr);
178 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
184 * Handy-dandy debug print routine, does nothing more
185 * than print out the contents of our addr cache.
187 static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
192 n = rb_first(&cache->rb_root);
194 struct pci_io_addr_range *piar;
195 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
196 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
197 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
198 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
205 /* Insert address range into the rb tree. */
206 static struct pci_io_addr_range *
207 pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
208 unsigned long ahi, unsigned int flags)
210 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
211 struct rb_node *parent = NULL;
212 struct pci_io_addr_range *piar;
214 /* Walk tree, find a place to insert into tree */
217 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
218 if (ahi < piar->addr_lo) {
219 p = &parent->rb_left;
220 } else if (alo > piar->addr_hi) {
221 p = &parent->rb_right;
223 if (dev != piar->pcidev ||
224 alo != piar->addr_lo || ahi != piar->addr_hi) {
225 printk(KERN_WARNING "PIAR: overlapping address range\n");
230 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
240 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
241 alo, ahi, pci_name (dev));
244 rb_link_node(&piar->rb_node, parent, p);
245 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
250 static void __pci_addr_cache_insert_device(struct pci_dev *dev)
252 struct device_node *dn;
257 dn = pci_device_to_OF_node(dev);
259 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
263 /* Skip any devices for which EEH is not enabled. */
265 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
266 pdn->eeh_mode & EEH_MODE_NOCHECK) {
268 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
269 pci_name(dev), pdn->node->full_name);
274 /* The cache holds a reference to the device... */
277 /* Walk resources on this device, poke them into the tree */
278 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
279 unsigned long start = pci_resource_start(dev,i);
280 unsigned long end = pci_resource_end(dev,i);
281 unsigned int flags = pci_resource_flags(dev,i);
283 /* We are interested only bus addresses, not dma or other stuff */
284 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
286 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
288 pci_addr_cache_insert(dev, start, end, flags);
292 /* If there was nothing to add, the cache has no reference... */
298 * pci_addr_cache_insert_device - Add a device to the address cache
299 * @dev: PCI device whose I/O addresses we are interested in.
301 * In order to support the fast lookup of devices based on addresses,
302 * we maintain a cache of devices that can be quickly searched.
303 * This routine adds a device to that cache.
305 static void pci_addr_cache_insert_device(struct pci_dev *dev)
309 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
310 __pci_addr_cache_insert_device(dev);
311 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
314 static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
320 n = rb_first(&pci_io_addr_cache_root.rb_root);
322 struct pci_io_addr_range *piar;
323 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
325 if (piar->pcidev == dev) {
326 rb_erase(n, &pci_io_addr_cache_root.rb_root);
334 /* The cache no longer holds its reference to this device... */
340 * pci_addr_cache_remove_device - remove pci device from addr cache
341 * @dev: device to remove
343 * Remove a device from the addr-cache tree.
344 * This is potentially expensive, since it will walk
345 * the tree multiple times (once per resource).
346 * But so what; device removal doesn't need to be that fast.
348 static void pci_addr_cache_remove_device(struct pci_dev *dev)
352 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
353 __pci_addr_cache_remove_device(dev);
354 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
358 * pci_addr_cache_build - Build a cache of I/O addresses
360 * Build a cache of pci i/o addresses. This cache will be used to
361 * find the pci device that corresponds to a given address.
362 * This routine scans all pci busses to build the cache.
363 * Must be run late in boot process, after the pci controllers
364 * have been scaned for devices (after all device resources are known).
366 void __init pci_addr_cache_build(void)
368 struct pci_dev *dev = NULL;
370 if (!eeh_subsystem_enabled)
373 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
375 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
376 /* Ignore PCI bridges ( XXX why ??) */
377 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
380 pci_addr_cache_insert_device(dev);
384 /* Verify tree built up above, echo back the list of addrs. */
385 pci_addr_cache_print(&pci_io_addr_cache_root);
389 /* --------------------------------------------------------------- */
390 /* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
392 void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
397 /* Log the error with the rtas logger */
398 spin_lock_irqsave(&slot_errbuf_lock, flags);
399 memset(slot_errbuf, 0, eeh_error_buf_size);
401 rc = rtas_call(ibm_slot_error_detail,
402 8, 1, NULL, pdn->eeh_config_addr,
403 BUID_HI(pdn->phb->buid),
404 BUID_LO(pdn->phb->buid), NULL, 0,
405 virt_to_phys(slot_errbuf),
410 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
411 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
415 * read_slot_reset_state - Read the reset state of a device node's slot
416 * @dn: device node to read
417 * @rets: array to return results in
419 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
423 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
424 token = ibm_read_slot_reset_state2;
427 token = ibm_read_slot_reset_state;
428 rets[2] = 0; /* fake PE Unavailable info */
432 return rtas_call(token, 3, outputs, rets, pdn->eeh_config_addr,
433 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
437 * eeh_token_to_phys - convert EEH address token to phys address
438 * @token i/o token, should be address in the form 0xA....
440 static inline unsigned long eeh_token_to_phys(unsigned long token)
445 ptep = find_linux_pte(init_mm.pgd, token);
448 pa = pte_pfn(*ptep) << PAGE_SHIFT;
450 return pa | (token & (PAGE_SIZE-1));
454 * Return the "partitionable endpoint" (pe) under which this device lies
456 static struct device_node * find_device_pe(struct device_node *dn)
458 while ((dn->parent) && PCI_DN(dn->parent) &&
459 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
465 /** Mark all devices that are peers of this device as failed.
466 * Mark the device driver too, so that it can see the failure
467 * immediately; this is critical, since some drivers poll
468 * status registers in interrupts ... If a driver is polling,
469 * and the slot is frozen, then the driver can deadlock in
470 * an interrupt context, which is bad.
473 static inline void __eeh_mark_slot (struct device_node *dn)
476 PCI_DN(dn)->eeh_mode |= EEH_MODE_ISOLATED;
479 __eeh_mark_slot (dn->child);
484 static inline void __eeh_clear_slot (struct device_node *dn)
487 PCI_DN(dn)->eeh_mode &= ~EEH_MODE_ISOLATED;
489 __eeh_clear_slot (dn->child);
494 static inline void eeh_clear_slot (struct device_node *dn)
497 spin_lock_irqsave(&confirm_error_lock, flags);
498 __eeh_clear_slot (dn);
499 spin_unlock_irqrestore(&confirm_error_lock, flags);
503 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
505 * @dev pci device, if known
507 * Check for an EEH failure for the given device node. Call this
508 * routine if the result of a read was all 0xff's and you want to
509 * find out if this is due to an EEH slot freeze. This routine
510 * will query firmware for the EEH status.
512 * Returns 0 if there has not been an EEH error; otherwise returns
513 * a non-zero value and queues up a slot isolation event notification.
515 * It is safe to call this routine in an interrupt context.
517 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
523 struct device_node *pe_dn;
526 __get_cpu_var(total_mmio_ffs)++;
528 if (!eeh_subsystem_enabled)
532 __get_cpu_var(no_dn)++;
537 /* Access to IO BARs might get this far and still not want checking. */
538 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
539 pdn->eeh_mode & EEH_MODE_NOCHECK) {
540 __get_cpu_var(ignored_check)++;
542 printk ("EEH:ignored check (%x) for %s %s\n",
543 pdn->eeh_mode, pci_name (dev), dn->full_name);
548 if (!pdn->eeh_config_addr) {
549 __get_cpu_var(no_cfg_addr)++;
553 /* If we already have a pending isolation event for this
554 * slot, we know it's bad already, we don't need to check.
555 * Do this checking under a lock; as multiple PCI devices
556 * in one slot might report errors simultaneously, and we
557 * only want one error recovery routine running.
559 spin_lock_irqsave(&confirm_error_lock, flags);
561 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
562 pdn->eeh_check_count ++;
563 if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
564 printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
565 pdn->eeh_check_count);
568 /* re-read the slot reset state */
569 if (read_slot_reset_state(pdn, rets) != 0)
570 rets[0] = -1; /* reset state unknown */
572 /* If we are here, then we hit an infinite loop. Stop. */
573 panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
579 * Now test for an EEH failure. This is VERY expensive.
580 * Note that the eeh_config_addr may be a parent device
581 * in the case of a device behind a bridge, or it may be
582 * function zero of a multi-function device.
583 * In any case they must share a common PHB.
585 ret = read_slot_reset_state(pdn, rets);
587 /* If the call to firmware failed, punt */
589 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
591 __get_cpu_var(false_positives)++;
596 /* If EEH is not supported on this device, punt. */
598 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
600 __get_cpu_var(false_positives)++;
605 /* If not the kind of error we know about, punt. */
606 if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
607 __get_cpu_var(false_positives)++;
612 /* Note that config-io to empty slots may fail;
613 * we recognize empty because they don't have children. */
614 if ((rets[0] == 5) && (dn->child == NULL)) {
615 __get_cpu_var(false_positives)++;
620 __get_cpu_var(slot_resets)++;
622 /* Avoid repeated reports of this failure, including problems
623 * with other functions on this device, and functions under
625 pe_dn = find_device_pe (dn);
626 __eeh_mark_slot (pe_dn);
627 spin_unlock_irqrestore(&confirm_error_lock, flags);
629 eeh_send_failure_event (dn, dev, rets[0], rets[2]);
631 /* Most EEH events are due to device driver bugs. Having
632 * a stack trace will help the device-driver authors figure
633 * out what happened. So print that out. */
634 if (rets[0] != 5) dump_stack();
638 spin_unlock_irqrestore(&confirm_error_lock, flags);
642 EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
645 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
646 * @token i/o token, should be address in the form 0xA....
647 * @val value, should be all 1's (XXX why do we need this arg??)
649 * Check for an EEH failure at the given token address. Call this
650 * routine if the result of a read was all 0xff's and you want to
651 * find out if this is due to an EEH slot freeze event. This routine
652 * will query firmware for the EEH status.
654 * Note this routine is safe to call in an interrupt context.
656 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
660 struct device_node *dn;
662 /* Finding the phys addr + pci device; this is pretty quick. */
663 addr = eeh_token_to_phys((unsigned long __force) token);
664 dev = pci_get_device_by_addr(addr);
666 __get_cpu_var(no_device)++;
670 dn = pci_device_to_OF_node(dev);
671 eeh_dn_check_failure (dn, dev);
677 EXPORT_SYMBOL(eeh_check_failure);
679 /* ------------------------------------------------------------- */
680 /* The code below deals with enabling EEH for devices during the
681 * early boot sequence. EEH must be enabled before any PCI probing
687 struct eeh_early_enable_info {
688 unsigned int buid_hi;
689 unsigned int buid_lo;
692 /* Enable eeh for the given device node. */
693 static void *early_enable_eeh(struct device_node *dn, void *data)
695 struct eeh_early_enable_info *info = data;
697 char *status = get_property(dn, "status", NULL);
698 u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
699 u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
700 u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
703 struct pci_dn *pdn = PCI_DN(dn);
706 pdn->eeh_check_count = 0;
707 pdn->eeh_freeze_count = 0;
709 if (status && strcmp(status, "ok") != 0)
710 return NULL; /* ignore devices with bad status */
712 /* Ignore bad nodes. */
713 if (!class_code || !vendor_id || !device_id)
716 /* There is nothing to check on PCI to ISA bridges */
717 if (dn->type && !strcmp(dn->type, "isa")) {
718 pdn->eeh_mode |= EEH_MODE_NOCHECK;
723 * Now decide if we are going to "Disable" EEH checking
724 * for this device. We still run with the EEH hardware active,
725 * but we won't be checking for ff's. This means a driver
726 * could return bad data (very bad!), an interrupt handler could
727 * hang waiting on status bits that won't change, etc.
728 * But there are a few cases like display devices that make sense.
730 enable = 1; /* i.e. we will do checking */
731 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
735 pdn->eeh_mode |= EEH_MODE_NOCHECK;
737 /* Ok... see if this device supports EEH. Some do, some don't,
738 * and the only way to find out is to check each and every one. */
739 regs = (u32 *)get_property(dn, "reg", NULL);
741 /* First register entry is addr (00BBSS00) */
742 /* Try to enable eeh */
743 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
744 regs[0], info->buid_hi, info->buid_lo,
748 eeh_subsystem_enabled = 1;
749 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
750 pdn->eeh_config_addr = regs[0];
752 printk(KERN_DEBUG "EEH: %s: eeh enabled\n", dn->full_name);
756 /* This device doesn't support EEH, but it may have an
757 * EEH parent, in which case we mark it as supported. */
758 if (dn->parent && PCI_DN(dn->parent)
759 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
760 /* Parent supports EEH. */
761 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
762 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
767 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
775 * Initialize EEH by trying to enable it for all of the adapters in the system.
776 * As a side effect we can determine here if eeh is supported at all.
777 * Note that we leave EEH on so failed config cycles won't cause a machine
778 * check. If a user turns off EEH for a particular adapter they are really
779 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
780 * grant access to a slot if EEH isn't enabled, and so we always enable
781 * EEH for all slots/all devices.
783 * The eeh-force-off option disables EEH checking globally, for all slots.
784 * Even if force-off is set, the EEH hardware is still enabled, so that
785 * newer systems can boot.
787 void __init eeh_init(void)
789 struct device_node *phb, *np;
790 struct eeh_early_enable_info info;
792 spin_lock_init(&confirm_error_lock);
793 spin_lock_init(&slot_errbuf_lock);
795 np = of_find_node_by_path("/rtas");
799 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
800 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
801 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
802 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
803 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
805 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
808 eeh_error_buf_size = rtas_token("rtas-error-log-max");
809 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
810 eeh_error_buf_size = 1024;
812 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
813 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
814 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
815 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
818 /* Enable EEH for all adapters. Note that eeh requires buid's */
819 for (phb = of_find_node_by_name(NULL, "pci"); phb;
820 phb = of_find_node_by_name(phb, "pci")) {
823 buid = get_phb_buid(phb);
824 if (buid == 0 || PCI_DN(phb) == NULL)
827 info.buid_lo = BUID_LO(buid);
828 info.buid_hi = BUID_HI(buid);
829 traverse_pci_devices(phb, early_enable_eeh, &info);
832 if (eeh_subsystem_enabled)
833 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
835 printk(KERN_WARNING "EEH: No capable adapters found\n");
839 * eeh_add_device_early - enable EEH for the indicated device_node
840 * @dn: device node for which to set up EEH
842 * This routine must be used to perform EEH initialization for PCI
843 * devices that were added after system boot (e.g. hotplug, dlpar).
844 * This routine must be called before any i/o is performed to the
845 * adapter (inluding any config-space i/o).
846 * Whether this actually enables EEH or not for this device depends
847 * on the CEC architecture, type of the device, on earlier boot
848 * command-line arguments & etc.
850 void eeh_add_device_early(struct device_node *dn)
852 struct pci_controller *phb;
853 struct eeh_early_enable_info info;
855 if (!dn || !PCI_DN(dn))
857 phb = PCI_DN(dn)->phb;
858 if (NULL == phb || 0 == phb->buid) {
859 printk(KERN_WARNING "EEH: Expected buid but found none for %s\n",
865 info.buid_hi = BUID_HI(phb->buid);
866 info.buid_lo = BUID_LO(phb->buid);
867 early_enable_eeh(dn, &info);
869 EXPORT_SYMBOL_GPL(eeh_add_device_early);
872 * eeh_add_device_late - perform EEH initialization for the indicated pci device
873 * @dev: pci device for which to set up EEH
875 * This routine must be used to complete EEH initialization for PCI
876 * devices that were added after system boot (e.g. hotplug, dlpar).
878 void eeh_add_device_late(struct pci_dev *dev)
880 struct device_node *dn;
882 if (!dev || !eeh_subsystem_enabled)
886 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
890 dn = pci_device_to_OF_node(dev);
891 PCI_DN(dn)->pcidev = dev;
893 pci_addr_cache_insert_device (dev);
895 EXPORT_SYMBOL_GPL(eeh_add_device_late);
898 * eeh_remove_device - undo EEH setup for the indicated pci device
899 * @dev: pci device to be removed
901 * This routine should be when a device is removed from a running
902 * system (e.g. by hotplug or dlpar).
904 void eeh_remove_device(struct pci_dev *dev)
906 struct device_node *dn;
907 if (!dev || !eeh_subsystem_enabled)
910 /* Unregister the device with the EEH/PCI address search system */
912 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
914 pci_addr_cache_remove_device(dev);
916 dn = pci_device_to_OF_node(dev);
917 PCI_DN(dn)->pcidev = NULL;
920 EXPORT_SYMBOL_GPL(eeh_remove_device);
922 static int proc_eeh_show(struct seq_file *m, void *v)
925 unsigned long ffs = 0, positives = 0, failures = 0;
926 unsigned long resets = 0;
927 unsigned long no_dev = 0, no_dn = 0, no_cfg = 0, no_check = 0;
930 ffs += per_cpu(total_mmio_ffs, cpu);
931 positives += per_cpu(false_positives, cpu);
932 failures += per_cpu(ignored_failures, cpu);
933 resets += per_cpu(slot_resets, cpu);
934 no_dev += per_cpu(no_device, cpu);
935 no_dn += per_cpu(no_dn, cpu);
936 no_cfg += per_cpu(no_cfg_addr, cpu);
937 no_check += per_cpu(ignored_check, cpu);
940 if (0 == eeh_subsystem_enabled) {
941 seq_printf(m, "EEH Subsystem is globally disabled\n");
942 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
944 seq_printf(m, "EEH Subsystem is enabled\n");
947 "no device node=%ld\n"
948 "no config address=%ld\n"
949 "check not wanted=%ld\n"
950 "eeh_total_mmio_ffs=%ld\n"
951 "eeh_false_positives=%ld\n"
952 "eeh_ignored_failures=%ld\n"
953 "eeh_slot_resets=%ld\n",
954 no_dev, no_dn, no_cfg, no_check,
955 ffs, positives, failures, resets);
961 static int proc_eeh_open(struct inode *inode, struct file *file)
963 return single_open(file, proc_eeh_show, NULL);
966 static struct file_operations proc_eeh_operations = {
967 .open = proc_eeh_open,
970 .release = single_release,
973 static int __init eeh_init_proc(void)
975 struct proc_dir_entry *e;
977 if (systemcfg->platform & PLATFORM_PSERIES) {
978 e = create_proc_entry("ppc64/eeh", 0, NULL);
980 e->proc_fops = &proc_eeh_operations;
985 __initcall(eeh_init_proc);