2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/seq_file.h>
32 #include <linux/spinlock.h>
33 #include <linux/export.h>
36 #include <linux/atomic.h>
38 #include <asm/eeh_event.h>
40 #include <asm/machdep.h>
41 #include <asm/ppc-pci.h>
46 * EEH, or "Extended Error Handling" is a PCI bridge technology for
47 * dealing with PCI bus errors that can't be dealt with within the
48 * usual PCI framework, except by check-stopping the CPU. Systems
49 * that are designed for high-availability/reliability cannot afford
50 * to crash due to a "mere" PCI error, thus the need for EEH.
51 * An EEH-capable bridge operates by converting a detected error
52 * into a "slot freeze", taking the PCI adapter off-line, making
53 * the slot behave, from the OS'es point of view, as if the slot
54 * were "empty": all reads return 0xff's and all writes are silently
55 * ignored. EEH slot isolation events can be triggered by parity
56 * errors on the address or data busses (e.g. during posted writes),
57 * which in turn might be caused by low voltage on the bus, dust,
58 * vibration, humidity, radioactivity or plain-old failed hardware.
60 * Note, however, that one of the leading causes of EEH slot
61 * freeze events are buggy device drivers, buggy device microcode,
62 * or buggy device hardware. This is because any attempt by the
63 * device to bus-master data to a memory address that is not
64 * assigned to the device will trigger a slot freeze. (The idea
65 * is to prevent devices-gone-wild from corrupting system memory).
66 * Buggy hardware/drivers will have a miserable time co-existing
69 * Ideally, a PCI device driver, when suspecting that an isolation
70 * event has occurred (e.g. by reading 0xff's), will then ask EEH
71 * whether this is the case, and then take appropriate steps to
72 * reset the PCI slot, the PCI device, and then resume operations.
73 * However, until that day, the checking is done here, with the
74 * eeh_check_failure() routine embedded in the MMIO macros. If
75 * the slot is found to be isolated, an "EEH Event" is synthesized
76 * and sent out for processing.
79 /* If a device driver keeps reading an MMIO register in an interrupt
80 * handler after a slot isolation event, it might be broken.
81 * This sets the threshold for how many read attempts we allow
82 * before printing an error message.
84 #define EEH_MAX_FAILS 2100000
86 /* Time to wait for a PCI slot to report status, in milliseconds */
87 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
89 /* Platform dependent EEH operations */
90 struct eeh_ops *eeh_ops = NULL;
92 int eeh_subsystem_enabled;
93 EXPORT_SYMBOL(eeh_subsystem_enabled);
96 * EEH probe mode support. The intention is to support multiple
97 * platforms for EEH. Some platforms like pSeries do PCI emunation
98 * based on device tree. However, other platforms like powernv probe
99 * PCI devices from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for particular
101 * OF node or PCI device so that the corresponding PE would be created
106 /* Global EEH mutex */
107 DEFINE_MUTEX(eeh_mutex);
109 /* Lock to avoid races due to multiple reports of an error */
110 static DEFINE_RAW_SPINLOCK(confirm_error_lock);
112 /* Buffer for reporting pci register dumps. Its here in BSS, and
113 * not dynamically alloced, so that it ends up in RMO where RTAS
116 #define EEH_PCI_REGS_LOG_LEN 4096
117 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
120 * The struct is used to maintain the EEH global statistic
121 * information. Besides, the EEH global statistics will be
122 * exported to user space through procfs
125 u64 no_device; /* PCI device not found */
126 u64 no_dn; /* OF node not found */
127 u64 no_cfg_addr; /* Config address not found */
128 u64 ignored_check; /* EEH check skipped */
129 u64 total_mmio_ffs; /* Total EEH checks */
130 u64 false_positives; /* Unnecessary EEH checks */
131 u64 slot_resets; /* PE reset */
134 static struct eeh_stats eeh_stats;
136 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
139 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
140 * @edev: device to report data for
141 * @buf: point to buffer in which to log
142 * @len: amount of room in buffer
144 * This routine captures assorted PCI configuration space data,
145 * and puts them into a buffer for RTAS error logging.
147 static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
149 struct device_node *dn = eeh_dev_to_of_node(edev);
150 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
155 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
156 printk(KERN_WARNING "EEH: of node=%s\n", dn->full_name);
158 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg);
159 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
160 printk(KERN_WARNING "EEH: PCI device/vendor: %08x\n", cfg);
162 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg);
163 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
164 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
167 printk(KERN_WARNING "EEH: no PCI device for this of node\n");
171 /* Gather bridge-specific registers */
172 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
173 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg);
174 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
175 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
177 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg);
178 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
179 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
182 /* Dump out the PCI-X command and status regs */
183 cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
185 eeh_ops->read_config(dn, cap, 4, &cfg);
186 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
187 printk(KERN_WARNING "EEH: PCI-X cmd: %08x\n", cfg);
189 eeh_ops->read_config(dn, cap+4, 4, &cfg);
190 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
191 printk(KERN_WARNING "EEH: PCI-X status: %08x\n", cfg);
194 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
195 cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
197 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
199 "EEH: PCI-E capabilities and status follow:\n");
201 for (i=0; i<=8; i++) {
202 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
203 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
204 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
207 cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
209 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
211 "EEH: PCI-E AER capability register set follows:\n");
213 for (i=0; i<14; i++) {
214 eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
215 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
216 printk(KERN_WARNING "EEH: PCI-E AER %02x: %08x\n", i, cfg);
225 * eeh_slot_error_detail - Generate combined log including driver log and error log
227 * @severity: temporary or permanent error log
229 * This routine should be called to generate the combined log, which
230 * is comprised of driver log and error log. The driver log is figured
231 * out from the config space of the corresponding PCI device, while
232 * the error log is fetched through platform dependent function call.
234 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
237 struct eeh_dev *edev;
239 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
240 eeh_ops->configure_bridge(pe);
241 eeh_pe_restore_bars(pe);
244 eeh_pe_for_each_dev(pe, edev) {
245 loglen += eeh_gather_pci_data(edev, pci_regs_buf,
246 EEH_PCI_REGS_LOG_LEN);
249 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
253 * eeh_token_to_phys - Convert EEH address token to phys address
254 * @token: I/O token, should be address in the form 0xA....
256 * This routine should be called to convert virtual I/O address
259 static inline unsigned long eeh_token_to_phys(unsigned long token)
264 ptep = find_linux_pte(init_mm.pgd, token);
267 pa = pte_pfn(*ptep) << PAGE_SHIFT;
269 return pa | (token & (PAGE_SIZE-1));
273 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
276 * Check for an EEH failure for the given device node. Call this
277 * routine if the result of a read was all 0xff's and you want to
278 * find out if this is due to an EEH slot freeze. This routine
279 * will query firmware for the EEH status.
281 * Returns 0 if there has not been an EEH error; otherwise returns
282 * a non-zero value and queues up a slot isolation event notification.
284 * It is safe to call this routine in an interrupt context.
286 int eeh_dev_check_failure(struct eeh_dev *edev)
290 struct device_node *dn;
294 const char *location;
296 eeh_stats.total_mmio_ffs++;
298 if (!eeh_subsystem_enabled)
305 dn = eeh_dev_to_of_node(edev);
306 dev = eeh_dev_to_pci_dev(edev);
309 /* Access to IO BARs might get this far and still not want checking. */
311 eeh_stats.ignored_check++;
312 pr_debug("EEH: Ignored check for %s %s\n",
313 eeh_pci_name(dev), dn->full_name);
317 if (!pe->addr && !pe->config_addr) {
318 eeh_stats.no_cfg_addr++;
322 /* If we already have a pending isolation event for this
323 * slot, we know it's bad already, we don't need to check.
324 * Do this checking under a lock; as multiple PCI devices
325 * in one slot might report errors simultaneously, and we
326 * only want one error recovery routine running.
328 raw_spin_lock_irqsave(&confirm_error_lock, flags);
330 if (pe->state & EEH_PE_ISOLATED) {
332 if (pe->check_count % EEH_MAX_FAILS == 0) {
333 location = of_get_property(dn, "ibm,loc-code", NULL);
334 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
335 "location=%s driver=%s pci addr=%s\n",
336 pe->check_count, location,
337 eeh_driver_name(dev), eeh_pci_name(dev));
338 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
339 eeh_driver_name(dev));
346 * Now test for an EEH failure. This is VERY expensive.
347 * Note that the eeh_config_addr may be a parent device
348 * in the case of a device behind a bridge, or it may be
349 * function zero of a multi-function device.
350 * In any case they must share a common PHB.
352 ret = eeh_ops->get_state(pe, NULL);
354 /* Note that config-io to empty slots may fail;
355 * they are empty when they don't have children.
356 * We will punt with the following conditions: Failure to get
357 * PE's state, EEH not support and Permanently unavailable
358 * state, PE is in good state.
361 (ret == EEH_STATE_NOT_SUPPORT) ||
362 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
363 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
364 eeh_stats.false_positives++;
365 pe->false_positives++;
370 eeh_stats.slot_resets++;
372 /* Avoid repeated reports of this failure, including problems
373 * with other functions on this device, and functions under
376 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
377 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
379 eeh_send_failure_event(pe);
381 /* Most EEH events are due to device driver bugs. Having
382 * a stack trace will help the device-driver authors figure
383 * out what happened. So print that out.
385 WARN(1, "EEH: failure detected\n");
389 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
393 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
396 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
397 * @token: I/O token, should be address in the form 0xA....
398 * @val: value, should be all 1's (XXX why do we need this arg??)
400 * Check for an EEH failure at the given token address. Call this
401 * routine if the result of a read was all 0xff's and you want to
402 * find out if this is due to an EEH slot freeze event. This routine
403 * will query firmware for the EEH status.
405 * Note this routine is safe to call in an interrupt context.
407 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
410 struct eeh_dev *edev;
412 /* Finding the phys addr + pci device; this is pretty quick. */
413 addr = eeh_token_to_phys((unsigned long __force) token);
414 edev = eeh_addr_cache_get_dev(addr);
416 eeh_stats.no_device++;
420 eeh_dev_check_failure(edev);
422 pci_dev_put(eeh_dev_to_pci_dev(edev));
426 EXPORT_SYMBOL(eeh_check_failure);
430 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
433 * This routine should be called to reenable frozen MMIO or DMA
434 * so that it would work correctly again. It's useful while doing
435 * recovery or log collection on the indicated device.
437 int eeh_pci_enable(struct eeh_pe *pe, int function)
441 rc = eeh_ops->set_option(pe, function);
443 pr_warning("%s: Unexpected state change %d on PHB#%d-PE#%x, err=%d\n",
444 __func__, function, pe->phb->global_number, pe->addr, rc);
446 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
447 if (rc > 0 && (rc & EEH_STATE_MMIO_ENABLED) &&
448 (function == EEH_OPT_THAW_MMIO))
455 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
456 * @dev: pci device struct
457 * @state: reset state to enter
462 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
464 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
465 struct eeh_pe *pe = edev->pe;
468 pr_err("%s: No PE found on PCI device %s\n",
469 __func__, pci_name(dev));
474 case pcie_deassert_reset:
475 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
478 eeh_ops->reset(pe, EEH_RESET_HOT);
480 case pcie_warm_reset:
481 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
491 * eeh_set_pe_freset - Check the required reset for the indicated device
493 * @flag: return value
495 * Each device might have its preferred reset type: fundamental or
496 * hot reset. The routine is used to collected the information for
497 * the indicated device and its children so that the bunch of the
498 * devices could be reset properly.
500 static void *eeh_set_dev_freset(void *data, void *flag)
503 unsigned int *freset = (unsigned int *)flag;
504 struct eeh_dev *edev = (struct eeh_dev *)data;
506 dev = eeh_dev_to_pci_dev(edev);
508 *freset |= dev->needs_freset;
514 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
517 * Assert the PCI #RST line for 1/4 second.
519 static void eeh_reset_pe_once(struct eeh_pe *pe)
521 unsigned int freset = 0;
523 /* Determine type of EEH reset required for
524 * Partitionable Endpoint, a hot-reset (1)
525 * or a fundamental reset (3).
526 * A fundamental reset required by any device under
527 * Partitionable Endpoint trumps hot-reset.
529 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
532 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
534 eeh_ops->reset(pe, EEH_RESET_HOT);
536 /* The PCI bus requires that the reset be held high for at least
537 * a 100 milliseconds. We wait a bit longer 'just in case'.
539 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
540 msleep(PCI_BUS_RST_HOLD_TIME_MSEC);
542 /* We might get hit with another EEH freeze as soon as the
543 * pci slot reset line is dropped. Make sure we don't miss
544 * these, and clear the flag now.
546 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
548 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
550 /* After a PCI slot has been reset, the PCI Express spec requires
551 * a 1.5 second idle time for the bus to stabilize, before starting
554 #define PCI_BUS_SETTLE_TIME_MSEC 1800
555 msleep(PCI_BUS_SETTLE_TIME_MSEC);
559 * eeh_reset_pe - Reset the indicated PE
562 * This routine should be called to reset indicated device, including
563 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
564 * might be involved as well.
566 int eeh_reset_pe(struct eeh_pe *pe)
570 /* Take three shots at resetting the bus */
571 for (i=0; i<3; i++) {
572 eeh_reset_pe_once(pe);
574 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
575 if (rc == (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE))
579 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
580 __func__, pe->phb->global_number, pe->addr);
583 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
584 i+1, pe->phb->global_number, pe->addr, rc);
591 * eeh_save_bars - Save device bars
592 * @edev: PCI device associated EEH device
594 * Save the values of the device bars. Unlike the restore
595 * routine, this routine is *not* recursive. This is because
596 * PCI devices are added individually; but, for the restore,
597 * an entire slot is reset at a time.
599 void eeh_save_bars(struct eeh_dev *edev)
602 struct device_node *dn;
606 dn = eeh_dev_to_of_node(edev);
608 for (i = 0; i < 16; i++)
609 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]);
613 * eeh_ops_register - Register platform dependent EEH operations
614 * @ops: platform dependent EEH operations
616 * Register the platform dependent EEH operation callback
617 * functions. The platform should call this function before
618 * any other EEH operations.
620 int __init eeh_ops_register(struct eeh_ops *ops)
623 pr_warning("%s: Invalid EEH ops name for %p\n",
628 if (eeh_ops && eeh_ops != ops) {
629 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
630 __func__, eeh_ops->name, ops->name);
640 * eeh_ops_unregister - Unreigster platform dependent EEH operations
641 * @name: name of EEH platform operations
643 * Unregister the platform dependent EEH operation callback
646 int __exit eeh_ops_unregister(const char *name)
648 if (!name || !strlen(name)) {
649 pr_warning("%s: Invalid EEH ops name\n",
654 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
663 * eeh_init - EEH initialization
665 * Initialize EEH by trying to enable it for all of the adapters in the system.
666 * As a side effect we can determine here if eeh is supported at all.
667 * Note that we leave EEH on so failed config cycles won't cause a machine
668 * check. If a user turns off EEH for a particular adapter they are really
669 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
670 * grant access to a slot if EEH isn't enabled, and so we always enable
671 * EEH for all slots/all devices.
673 * The eeh-force-off option disables EEH checking globally, for all slots.
674 * Even if force-off is set, the EEH hardware is still enabled, so that
675 * newer systems can boot.
677 static int __init eeh_init(void)
679 struct pci_controller *hose, *tmp;
680 struct device_node *phb;
683 /* call platform initialization function */
685 pr_warning("%s: Platform EEH operation not found\n",
688 } else if ((ret = eeh_ops->init())) {
689 pr_warning("%s: Failed to call platform init function (%d)\n",
694 raw_spin_lock_init(&confirm_error_lock);
696 /* Enable EEH for all adapters */
697 if (eeh_probe_mode_devtree()) {
698 list_for_each_entry_safe(hose, tmp,
699 &hose_list, list_node) {
701 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
705 if (eeh_subsystem_enabled)
706 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
708 pr_warning("EEH: No capable adapters found\n");
713 core_initcall_sync(eeh_init);
716 * eeh_add_device_early - Enable EEH for the indicated device_node
717 * @dn: device node for which to set up EEH
719 * This routine must be used to perform EEH initialization for PCI
720 * devices that were added after system boot (e.g. hotplug, dlpar).
721 * This routine must be called before any i/o is performed to the
722 * adapter (inluding any config-space i/o).
723 * Whether this actually enables EEH or not for this device depends
724 * on the CEC architecture, type of the device, on earlier boot
725 * command-line arguments & etc.
727 static void eeh_add_device_early(struct device_node *dn)
729 struct pci_controller *phb;
731 if (!dn || !of_node_to_eeh_dev(dn))
733 phb = of_node_to_eeh_dev(dn)->phb;
735 /* USB Bus children of PCI devices will not have BUID's */
736 if (NULL == phb || 0 == phb->buid)
739 /* FIXME: hotplug support on POWERNV */
740 eeh_ops->of_probe(dn, NULL);
744 * eeh_add_device_tree_early - Enable EEH for the indicated device
747 * This routine must be used to perform EEH initialization for the
748 * indicated PCI device that was added after system boot (e.g.
751 void eeh_add_device_tree_early(struct device_node *dn)
753 struct device_node *sib;
755 for_each_child_of_node(dn, sib)
756 eeh_add_device_tree_early(sib);
757 eeh_add_device_early(dn);
759 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
762 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
763 * @dev: pci device for which to set up EEH
765 * This routine must be used to complete EEH initialization for PCI
766 * devices that were added after system boot (e.g. hotplug, dlpar).
768 static void eeh_add_device_late(struct pci_dev *dev)
770 struct device_node *dn;
771 struct eeh_dev *edev;
773 if (!dev || !eeh_subsystem_enabled)
776 pr_debug("EEH: Adding device %s\n", pci_name(dev));
778 dn = pci_device_to_OF_node(dev);
779 edev = of_node_to_eeh_dev(dn);
780 if (edev->pdev == dev) {
781 pr_debug("EEH: Already referenced !\n");
788 dev->dev.archdata.edev = edev;
790 eeh_addr_cache_insert_dev(dev);
791 eeh_sysfs_add_device(dev);
795 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
798 * This routine must be used to perform EEH initialization for PCI
799 * devices which are attached to the indicated PCI bus. The PCI bus
800 * is added after system boot through hotplug or dlpar.
802 void eeh_add_device_tree_late(struct pci_bus *bus)
806 list_for_each_entry(dev, &bus->devices, bus_list) {
807 eeh_add_device_late(dev);
808 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
809 struct pci_bus *subbus = dev->subordinate;
811 eeh_add_device_tree_late(subbus);
815 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
818 * eeh_remove_device - Undo EEH setup for the indicated pci device
819 * @dev: pci device to be removed
821 * This routine should be called when a device is removed from
822 * a running system (e.g. by hotplug or dlpar). It unregisters
823 * the PCI device from the EEH subsystem. I/O errors affecting
824 * this device will no longer be detected after this call; thus,
825 * i/o errors affecting this slot may leave this device unusable.
827 static void eeh_remove_device(struct pci_dev *dev)
829 struct eeh_dev *edev;
831 if (!dev || !eeh_subsystem_enabled)
833 edev = pci_dev_to_eeh_dev(dev);
835 /* Unregister the device with the EEH/PCI address search system */
836 pr_debug("EEH: Removing device %s\n", pci_name(dev));
838 if (!edev || !edev->pdev) {
839 pr_debug("EEH: Not referenced !\n");
843 dev->dev.archdata.edev = NULL;
846 eeh_rmv_from_parent_pe(edev);
847 eeh_addr_cache_rmv_dev(dev);
848 eeh_sysfs_remove_device(dev);
852 * eeh_remove_bus_device - Undo EEH setup for the indicated PCI device
855 * This routine must be called when a device is removed from the
856 * running system through hotplug or dlpar. The corresponding
857 * PCI address cache will be removed.
859 void eeh_remove_bus_device(struct pci_dev *dev)
861 struct pci_bus *bus = dev->subordinate;
862 struct pci_dev *child, *tmp;
864 eeh_remove_device(dev);
866 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
867 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
868 eeh_remove_bus_device(child);
871 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
873 static int proc_eeh_show(struct seq_file *m, void *v)
875 if (0 == eeh_subsystem_enabled) {
876 seq_printf(m, "EEH Subsystem is globally disabled\n");
877 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
879 seq_printf(m, "EEH Subsystem is enabled\n");
882 "no device node=%llu\n"
883 "no config address=%llu\n"
884 "check not wanted=%llu\n"
885 "eeh_total_mmio_ffs=%llu\n"
886 "eeh_false_positives=%llu\n"
887 "eeh_slot_resets=%llu\n",
890 eeh_stats.no_cfg_addr,
891 eeh_stats.ignored_check,
892 eeh_stats.total_mmio_ffs,
893 eeh_stats.false_positives,
894 eeh_stats.slot_resets);
900 static int proc_eeh_open(struct inode *inode, struct file *file)
902 return single_open(file, proc_eeh_show, NULL);
905 static const struct file_operations proc_eeh_operations = {
906 .open = proc_eeh_open,
909 .release = single_release,
912 static int __init eeh_init_proc(void)
914 if (machine_is(pseries))
915 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
918 __initcall(eeh_init_proc);