2 * Freescale MPC85xx/MPC86xx RapidIO support
4 * Copyright 2009 Sysgo AG
5 * Thomas Moll <thomas.moll@sysgo.com>
6 * - fixed maintenance access routines, check for aligned access
8 * Copyright 2009 Integrated Device Technology, Inc.
9 * Alex Bounine <alexandre.bounine@idt.com>
10 * - Added Port-Write message handling
11 * - Added Machine Check exception handling
13 * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
14 * Zhang Wei <wei.zhang@freescale.com>
16 * Copyright 2005 MontaVista Software, Inc.
17 * Matt Porter <mporter@kernel.crashing.org>
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/interrupt.h>
30 #include <linux/device.h>
31 #include <linux/of_platform.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37 #include <asm/machdep.h>
41 #undef DEBUG_PW /* Port-Write debugging */
43 #define RIO_PORT1_EDCSR 0x0640
44 #define RIO_PORT2_EDCSR 0x0680
45 #define RIO_PORT1_IECSR 0x10130
46 #define RIO_PORT2_IECSR 0x101B0
48 #define RIO_ATMU_REGS_OFFSET 0x10c00
49 #define RIO_GCCSR 0x13c
50 #define RIO_ESCSR 0x158
51 #define ESCSR_CLEAR 0x07120204
52 #define RIO_PORT2_ESCSR 0x178
53 #define RIO_CCSR 0x15c
54 #define RIO_LTLEDCSR_IER 0x80000000
55 #define RIO_LTLEDCSR_PRT 0x01000000
56 #define IECSR_CLEAR 0x80000000
57 #define RIO_ISR_AACR 0x10120
58 #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
60 #define __fsl_read_rio_config(x, addr, err, op) \
61 __asm__ __volatile__( \
62 "1: "op" %1,0(%2)\n" \
65 ".section .fixup,\"ax\"\n" \
69 ".section __ex_table,\"a\"\n" \
73 : "=r" (err), "=r" (x) \
74 : "b" (addr), "i" (-EFAULT), "0" (err))
76 void __iomem *rio_regs_win;
79 int fsl_rio_mcheck_exception(struct pt_regs *regs)
81 const struct exception_table_entry *entry;
87 reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
88 if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
89 /* Check if we are prepared to handle this fault */
90 entry = search_exception_tables(regs->nip);
92 pr_debug("RIO: %s - MC Exception handled\n",
94 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR),
97 regs->nip = entry->fixup;
104 EXPORT_SYMBOL_GPL(fsl_rio_mcheck_exception);
108 * fsl_local_config_read - Generate a MPC85xx local config space read
109 * @mport: RapidIO master port info
110 * @index: ID of RapdiIO interface
111 * @offset: Offset into configuration space
112 * @len: Length (in bytes) of the maintenance transaction
113 * @data: Value to be read into
115 * Generates a MPC85xx local configuration space read. Returns %0 on
116 * success or %-EINVAL on failure.
118 static int fsl_local_config_read(struct rio_mport *mport,
119 int index, u32 offset, int len, u32 *data)
121 struct rio_priv *priv = mport->priv;
122 pr_debug("fsl_local_config_read: index %d offset %8.8x\n", index,
124 *data = in_be32(priv->regs_win + offset);
130 * fsl_local_config_write - Generate a MPC85xx local config space write
131 * @mport: RapidIO master port info
132 * @index: ID of RapdiIO interface
133 * @offset: Offset into configuration space
134 * @len: Length (in bytes) of the maintenance transaction
135 * @data: Value to be written
137 * Generates a MPC85xx local configuration space write. Returns %0 on
138 * success or %-EINVAL on failure.
140 static int fsl_local_config_write(struct rio_mport *mport,
141 int index, u32 offset, int len, u32 data)
143 struct rio_priv *priv = mport->priv;
145 ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n",
146 index, offset, data);
147 out_be32(priv->regs_win + offset, data);
153 * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction
154 * @mport: RapidIO master port info
155 * @index: ID of RapdiIO interface
156 * @destid: Destination ID of transaction
157 * @hopcount: Number of hops to target device
158 * @offset: Offset into configuration space
159 * @len: Length (in bytes) of the maintenance transaction
160 * @val: Location to be read into
162 * Generates a MPC85xx read maintenance transaction. Returns %0 on
163 * success or %-EINVAL on failure.
166 fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
167 u8 hopcount, u32 offset, int len, u32 *val)
169 struct rio_priv *priv = mport->priv;
174 ("fsl_rio_config_read:"
175 " index %d destid %d hopcount %d offset %8.8x len %d\n",
176 index, destid, hopcount, offset, len);
178 /* 16MB maintenance window possible */
179 /* allow only aligned access to maintenance registers */
180 if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len))
183 out_be32(&priv->maint_atmu_regs->rowtar,
184 (destid << 22) | (hopcount << 12) | (offset >> 12));
185 out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
187 data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1));
190 __fsl_read_rio_config(rval, data, err, "lbz");
193 __fsl_read_rio_config(rval, data, err, "lhz");
196 __fsl_read_rio_config(rval, data, err, "lwz");
203 pr_debug("RIO: cfg_read error %d for %x:%x:%x\n",
204 err, destid, hopcount, offset);
213 * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction
214 * @mport: RapidIO master port info
215 * @index: ID of RapdiIO interface
216 * @destid: Destination ID of transaction
217 * @hopcount: Number of hops to target device
218 * @offset: Offset into configuration space
219 * @len: Length (in bytes) of the maintenance transaction
220 * @val: Value to be written
222 * Generates an MPC85xx write maintenance transaction. Returns %0 on
223 * success or %-EINVAL on failure.
226 fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
227 u8 hopcount, u32 offset, int len, u32 val)
229 struct rio_priv *priv = mport->priv;
232 ("fsl_rio_config_write:"
233 "index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
234 index, destid, hopcount, offset, len, val);
236 /* 16MB maintenance windows possible */
237 /* allow only aligned access to maintenance registers */
238 if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len))
241 out_be32(&priv->maint_atmu_regs->rowtar,
242 (destid << 22) | (hopcount << 12) | (offset >> 12));
243 out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
245 data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1));
248 out_8((u8 *) data, val);
251 out_be16((u16 *) data, val);
254 out_be32((u32 *) data, val);
263 void fsl_rio_port_error_handler(struct rio_mport *port, int offset)
265 /*XXX: Error recovery is not implemented, we just clear errors */
266 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
269 out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
270 out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
271 out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
273 out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
274 out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
275 out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
278 static inline void fsl_rio_info(struct device *dev, u32 ccsr)
283 switch (ccsr >> 30) {
294 dev_info(dev, "Hardware port width: %s\n", str);
296 switch ((ccsr >> 27) & 7) {
298 str = "Single-lane 0";
301 str = "Single-lane 2";
310 dev_info(dev, "Training connection status: %s\n", str);
313 if (!(ccsr & 0x80000000))
314 dev_info(dev, "Output port operating in 8-bit mode\n");
315 if (!(ccsr & 0x08000000))
316 dev_info(dev, "Input port operating in 8-bit mode\n");
321 * fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
322 * @dev: platform_device pointer
324 * Initializes MPC85xx RapidIO hardware interface, configures
325 * master port with system-specific info, and registers the
326 * master port with the RapidIO subsystem.
328 int fsl_rio_setup(struct platform_device *dev)
331 struct rio_mport *port;
332 struct rio_priv *priv;
334 const u32 *dt_range, *cell;
335 struct resource regs;
338 u64 law_start, law_size;
341 if (!dev->dev.of_node) {
342 dev_err(&dev->dev, "Device OF-Node is NULL");
346 rc = of_address_to_resource(dev->dev.of_node, 0, ®s);
348 dev_err(&dev->dev, "Can't get %s property 'reg'\n",
349 dev->dev.of_node->full_name);
352 dev_info(&dev->dev, "Of-device full name %s\n",
353 dev->dev.of_node->full_name);
354 dev_info(&dev->dev, "Regs: %pR\n", ®s);
356 dt_range = of_get_property(dev->dev.of_node, "ranges", &rlen);
358 dev_err(&dev->dev, "Can't get %s property 'ranges'\n",
359 dev->dev.of_node->full_name);
363 /* Get node address wide */
364 cell = of_get_property(dev->dev.of_node, "#address-cells", NULL);
368 aw = of_n_addr_cells(dev->dev.of_node);
369 /* Get node size wide */
370 cell = of_get_property(dev->dev.of_node, "#size-cells", NULL);
374 sw = of_n_size_cells(dev->dev.of_node);
375 /* Get parent address wide wide */
376 paw = of_n_addr_cells(dev->dev.of_node);
378 law_start = of_read_number(dt_range + aw, paw);
379 law_size = of_read_number(dt_range + aw + paw, sw);
381 dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n",
382 law_start, law_size);
384 ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL);
389 ops->lcread = fsl_local_config_read;
390 ops->lcwrite = fsl_local_config_write;
391 ops->cread = fsl_rio_config_read;
392 ops->cwrite = fsl_rio_config_write;
393 ops->pwenable = fsl_rio_pw_enable;
395 port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
402 priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
404 printk(KERN_ERR "Can't alloc memory for 'priv'\n");
409 INIT_LIST_HEAD(&port->dbells);
410 port->iores.start = law_start;
411 port->iores.end = law_start + law_size - 1;
412 port->iores.flags = IORESOURCE_MEM;
413 port->iores.name = "rio_io_win";
415 if (request_resource(&iomem_resource, &port->iores) < 0) {
416 dev_err(&dev->dev, "RIO: Error requesting master port region"
417 " 0x%016llx-0x%016llx\n",
418 (u64)port->iores.start, (u64)port->iores.end);
423 priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0);
424 dev_info(&dev->dev, "pwirq: %d\n", priv->pwirq);
425 strcpy(port->name, "RIO0 mport");
427 priv->dev = &dev->dev;
431 port->phys_efptr = 0x100;
433 priv->regs_win = ioremap(regs.start, resource_size(®s));
434 rio_regs_win = priv->regs_win;
436 /* Probe the master port phy type */
437 ccsr = in_be32(priv->regs_win + RIO_CCSR);
438 port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL;
439 dev_info(&dev->dev, "RapidIO PHY type: %s\n",
440 (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" :
441 ((port->phy_type == RIO_PHY_SERIAL) ? "serial" :
443 /* Checking the port training status */
444 if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
445 dev_err(&dev->dev, "Port is not ready. "
446 "Try to restart connection...\n");
447 switch (port->phy_type) {
450 out_be32(priv->regs_win + RIO_CCSR, 0);
452 setbits32(priv->regs_win + RIO_CCSR, 0x02000000);
454 setbits32(priv->regs_win + RIO_CCSR, 0x00600000);
456 case RIO_PHY_PARALLEL:
458 out_be32(priv->regs_win + RIO_CCSR, 0x22000000);
460 out_be32(priv->regs_win + RIO_CCSR, 0x44000000);
464 if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
465 dev_err(&dev->dev, "Port restart failed.\n");
469 dev_info(&dev->dev, "Port restart success!\n");
471 fsl_rio_info(&dev->dev, ccsr);
473 port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR))
474 & RIO_PEF_CTLS) >> 4;
475 dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n",
476 port->sys_size ? 65536 : 256);
478 if (rio_register_mport(port))
481 if (port->host_deviceid >= 0)
482 out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST |
483 RIO_PORT_GEN_MASTER | RIO_PORT_GEN_DISCOVERED);
485 out_be32(priv->regs_win + RIO_GCCSR, 0x00000000);
487 priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win
488 + RIO_ATMU_REGS_OFFSET);
489 priv->maint_atmu_regs = priv->atmu_regs + 1;
491 /* Set to receive any dist ID for serial RapidIO controller. */
492 if (port->phy_type == RIO_PHY_SERIAL)
493 out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA);
495 /* Configure maintenance transaction window */
496 out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12);
497 out_be32(&priv->maint_atmu_regs->rowar,
498 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1));
500 priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE);
502 fsl_rio_setup_rmu(port, dev->dev.of_node);
504 fsl_rio_port_write_init(port);
508 iounmap(priv->regs_win);
509 release_resource(&port->iores);
520 /* The probe function for RapidIO peer-to-peer network.
522 static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev)
524 printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n",
525 dev->dev.of_node->full_name);
527 return fsl_rio_setup(dev);
530 static const struct of_device_id fsl_of_rio_rpn_ids[] = {
532 .compatible = "fsl,rapidio-delta",
537 static struct platform_driver fsl_of_rio_rpn_driver = {
539 .name = "fsl-of-rio",
540 .owner = THIS_MODULE,
541 .of_match_table = fsl_of_rio_rpn_ids,
543 .probe = fsl_of_rio_rpn_probe,
546 static __init int fsl_of_rio_rpn_init(void)
548 return platform_driver_register(&fsl_of_rio_rpn_driver);
551 subsys_initcall(fsl_of_rio_rpn_init);