2 * Copyright 2007, Olof Johansson, PA Semi
4 * Based on arch/powerpc/sysdev/mpic_u3msi.c:
6 * Copyright 2006, Segher Boessenkool, IBM Corporation.
7 * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
18 #include <linux/irq.h>
19 #include <linux/bootmem.h>
20 #include <linux/msi.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
25 #include <asm/msi_bitmap.h>
29 /* Allocate 16 interrupts per device, to give an alignment of 16,
30 * since that's the size of the grouping w.r.t. affinity. If someone
31 * needs more than 32 MSI's down the road we'll have to rethink this,
32 * but it should be OK for now.
34 #define ALLOC_CHUNK 16
36 #define PASEMI_MSI_ADDR 0xfc080000
38 /* A bit ugly, can we get this from the pci_dev somehow? */
39 static struct mpic *msi_mpic;
42 static void mpic_pasemi_msi_mask_irq(struct irq_data *data)
44 pr_debug("mpic_pasemi_msi_mask_irq %d\n", data->irq);
49 static void mpic_pasemi_msi_unmask_irq(struct irq_data *data)
51 pr_debug("mpic_pasemi_msi_unmask_irq %d\n", data->irq);
52 mpic_unmask_irq(data);
56 static struct irq_chip mpic_pasemi_msi_chip = {
57 .irq_shutdown = mpic_pasemi_msi_mask_irq,
58 .irq_mask = mpic_pasemi_msi_mask_irq,
59 .irq_unmask = mpic_pasemi_msi_unmask_irq,
60 .irq_eoi = mpic_end_irq,
61 .irq_set_type = mpic_set_irq_type,
62 .irq_set_affinity = mpic_set_affinity,
66 static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
68 struct msi_desc *entry;
70 pr_debug("pasemi_msi_teardown_msi_irqs, pdev %p\n", pdev);
72 list_for_each_entry(entry, &pdev->msi_list, list) {
73 if (entry->irq == NO_IRQ)
76 irq_set_msi_desc(entry->irq, NULL);
77 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
78 virq_to_hw(entry->irq), ALLOC_CHUNK);
79 irq_dispose_mapping(entry->irq);
85 static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
88 struct msi_desc *entry;
92 if (type == PCI_CAP_ID_MSIX)
93 pr_debug("pasemi_msi: MSI-X untested, trying anyway\n");
94 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
98 msg.address_lo = PASEMI_MSI_ADDR;
100 list_for_each_entry(entry, &pdev->msi_list, list) {
101 /* Allocate 16 interrupts for now, since that's the grouping for
102 * affinity. This can be changed later if it turns out 32 is too
103 * few MSIs for someone, but restrictions will apply to how the
104 * sources can be changed independently.
106 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap,
109 pr_debug("pasemi_msi: failed allocating hwirq\n");
113 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
114 if (virq == NO_IRQ) {
115 pr_debug("pasemi_msi: failed mapping hwirq 0x%x\n",
117 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq,
122 /* Vector on MSI is really an offset, the hardware adds
123 * it to the value written at the magic address. So set
124 * it to 0 to remain sane.
126 mpic_set_vector(virq, 0);
128 irq_set_msi_desc(virq, entry);
129 irq_set_chip(virq, &mpic_pasemi_msi_chip);
130 irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
132 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \
133 "addr 0x%x\n", virq, hwirq, msg.address_lo);
135 /* Likewise, the device writes [0...511] into the target
136 * register to generate MSI [512...1023]
138 msg.data = hwirq-0x200;
139 write_msi_msg(virq, &msg);
145 int mpic_pasemi_msi_init(struct mpic *mpic)
149 if (!mpic->irqhost->of_node ||
150 !of_device_is_compatible(mpic->irqhost->of_node,
151 "pasemi,pwrficient-openpic"))
154 rc = mpic_msi_init_allocator(mpic);
156 pr_debug("pasemi_msi: Error allocating bitmap!\n");
160 pr_debug("pasemi_msi: Registering PA Semi MPIC MSI callbacks\n");
163 WARN_ON(ppc_md.setup_msi_irqs);
164 ppc_md.setup_msi_irqs = pasemi_msi_setup_msi_irqs;
165 ppc_md.teardown_msi_irqs = pasemi_msi_teardown_msi_irqs;