3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/pgtable.h"
11 #ifndef _ASM_S390_PGTABLE_H
12 #define _ASM_S390_PGTABLE_H
15 * The Linux memory management assumes a three-level page table setup. For
16 * s390 31 bit we "fold" the mid level into the top-level page table, so
17 * that we physically have the same two-level page table as the s390 mmu
18 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
19 * the hardware provides (region first and region second tables are not
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
30 #include <linux/sched.h>
31 #include <linux/mm_types.h>
32 #include <linux/page-flags.h>
36 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
37 extern void paging_init(void);
38 extern void vmem_map_init(void);
41 * The S390 doesn't have any external MMU info: the kernel page
42 * tables contain all the necessary information.
44 #define update_mmu_cache(vma, address, ptep) do { } while (0)
45 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
48 * ZERO_PAGE is a global shared page that is always zero; used
49 * for zero-mapped memory areas etc..
52 extern unsigned long empty_zero_page;
53 extern unsigned long zero_page_mask;
55 #define ZERO_PAGE(vaddr) \
56 (virt_to_page((void *)(empty_zero_page + \
57 (((unsigned long)(vaddr)) &zero_page_mask))))
58 #define __HAVE_COLOR_ZERO_PAGE
60 /* TODO: s390 cannot support io_remap_pfn_range... */
61 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
62 remap_pfn_range(vma, vaddr, pfn, size, prot)
64 #endif /* !__ASSEMBLY__ */
67 * PMD_SHIFT determines the size of the area a second-level page
69 * PGDIR_SHIFT determines what a third-level page table entry can map
74 # define PGDIR_SHIFT 20
75 #else /* CONFIG_64BIT */
78 # define PGDIR_SHIFT 42
79 #endif /* CONFIG_64BIT */
81 #define PMD_SIZE (1UL << PMD_SHIFT)
82 #define PMD_MASK (~(PMD_SIZE-1))
83 #define PUD_SIZE (1UL << PUD_SHIFT)
84 #define PUD_MASK (~(PUD_SIZE-1))
85 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
86 #define PGDIR_MASK (~(PGDIR_SIZE-1))
89 * entries per page directory level: the S390 is two-level, so
90 * we don't really have any PMD directory physically.
91 * for S390 segment-table entries are combined to one PGD
92 * that leads to 1024 pte per pgd
94 #define PTRS_PER_PTE 256
96 #define PTRS_PER_PMD 1
97 #define PTRS_PER_PUD 1
98 #else /* CONFIG_64BIT */
99 #define PTRS_PER_PMD 2048
100 #define PTRS_PER_PUD 2048
101 #endif /* CONFIG_64BIT */
102 #define PTRS_PER_PGD 2048
104 #define FIRST_USER_ADDRESS 0
106 #define pte_ERROR(e) \
107 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
108 #define pmd_ERROR(e) \
109 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
110 #define pud_ERROR(e) \
111 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
112 #define pgd_ERROR(e) \
113 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
117 * The vmalloc and module area will always be on the topmost area of the kernel
118 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc and modules.
119 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
120 * modules will reside. That makes sure that inter module branches always
121 * happen without trampolines and in addition the placement within a 2GB frame
122 * is branch prediction unit friendly.
124 extern unsigned long VMALLOC_START;
125 extern unsigned long VMALLOC_END;
126 extern struct page *vmemmap;
128 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
131 extern unsigned long MODULES_VADDR;
132 extern unsigned long MODULES_END;
133 #define MODULES_VADDR MODULES_VADDR
134 #define MODULES_END MODULES_END
135 #define MODULES_LEN (1UL << 31)
139 * A 31 bit pagetable entry of S390 has following format:
142 * 00000000001111111111222222222233
143 * 01234567890123456789012345678901
145 * I Page-Invalid Bit: Page is not available for address-translation
146 * P Page-Protection Bit: Store access not possible for page
148 * A 31 bit segmenttable entry of S390 has following format:
149 * | P-table origin | |PTL
151 * 00000000001111111111222222222233
152 * 01234567890123456789012345678901
154 * I Segment-Invalid Bit: Segment is not available for address-translation
155 * C Common-Segment Bit: Segment is not private (PoP 3-30)
156 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
158 * The 31 bit segmenttable origin of S390 has following format:
160 * |S-table origin | | STL |
162 * 00000000001111111111222222222233
163 * 01234567890123456789012345678901
165 * X Space-Switch event:
166 * G Segment-Invalid Bit: *
167 * P Private-Space Bit: Segment is not private (PoP 3-30)
168 * S Storage-Alteration:
169 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
171 * A 64 bit pagetable entry of S390 has following format:
173 * 0000000000111111111122222222223333333333444444444455555555556666
174 * 0123456789012345678901234567890123456789012345678901234567890123
176 * I Page-Invalid Bit: Page is not available for address-translation
177 * P Page-Protection Bit: Store access not possible for page
178 * C Change-bit override: HW is not required to set change bit
180 * A 64 bit segmenttable entry of S390 has following format:
181 * | P-table origin | TT
182 * 0000000000111111111122222222223333333333444444444455555555556666
183 * 0123456789012345678901234567890123456789012345678901234567890123
185 * I Segment-Invalid Bit: Segment is not available for address-translation
186 * C Common-Segment Bit: Segment is not private (PoP 3-30)
187 * P Page-Protection Bit: Store access not possible for page
190 * A 64 bit region table entry of S390 has following format:
191 * | S-table origin | TF TTTL
192 * 0000000000111111111122222222223333333333444444444455555555556666
193 * 0123456789012345678901234567890123456789012345678901234567890123
195 * I Segment-Invalid Bit: Segment is not available for address-translation
200 * The 64 bit regiontable origin of S390 has following format:
201 * | region table origon | DTTL
202 * 0000000000111111111122222222223333333333444444444455555555556666
203 * 0123456789012345678901234567890123456789012345678901234567890123
205 * X Space-Switch event:
206 * G Segment-Invalid Bit:
207 * P Private-Space Bit:
208 * S Storage-Alteration:
212 * A storage key has the following format:
216 * F : fetch protection bit
221 /* Hardware bits in the page table entry */
222 #define _PAGE_CO 0x100 /* HW Change-bit override */
223 #define _PAGE_RO 0x200 /* HW read-only bit */
224 #define _PAGE_INVALID 0x400 /* HW invalid bit */
226 /* Software bits in the page table entry */
227 #define _PAGE_SWT 0x001 /* SW pte type bit t */
228 #define _PAGE_SWX 0x002 /* SW pte type bit x */
229 #define _PAGE_SWC 0x004 /* SW pte changed bit */
230 #define _PAGE_SWR 0x008 /* SW pte referenced bit */
231 #define _PAGE_SWW 0x010 /* SW pte write bit */
232 #define _PAGE_SPECIAL 0x020 /* SW associated with special page */
233 #define __HAVE_ARCH_PTE_SPECIAL
235 /* Set of bits not changed in pte_modify */
236 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_CO | \
237 _PAGE_SWC | _PAGE_SWR)
239 /* Six different types of pages. */
240 #define _PAGE_TYPE_EMPTY 0x400
241 #define _PAGE_TYPE_NONE 0x401
242 #define _PAGE_TYPE_SWAP 0x403
243 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
244 #define _PAGE_TYPE_RO 0x200
245 #define _PAGE_TYPE_RW 0x000
248 * Only four types for huge pages, using the invalid bit and protection bit
249 * of a segment table entry.
251 #define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
252 #define _HPAGE_TYPE_NONE 0x220
253 #define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
254 #define _HPAGE_TYPE_RW 0x000
257 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
258 * pte_none and pte_file to find out the pte type WITHOUT holding the page
259 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
260 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
261 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
262 * This change is done while holding the lock, but the intermediate step
263 * of a previously valid pte with the hw invalid bit set can be observed by
264 * handle_pte_fault. That makes it necessary that all valid pte types with
265 * the hw invalid bit set must be distinguishable from the four pte types
266 * empty, none, swap and file.
269 * _PAGE_TYPE_EMPTY 1000 -> 1000
270 * _PAGE_TYPE_NONE 1001 -> 1001
271 * _PAGE_TYPE_SWAP 1011 -> 1011
272 * _PAGE_TYPE_FILE 11?1 -> 11?1
273 * _PAGE_TYPE_RO 0100 -> 1100
274 * _PAGE_TYPE_RW 0000 -> 1000
276 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
277 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
278 * pte_file is true for bits combinations 1101, 1111
279 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
284 /* Bits in the segment table address-space-control-element */
285 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
286 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
287 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
288 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
289 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
291 /* Bits in the segment table entry */
292 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
293 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
294 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
295 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
296 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
298 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
299 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
301 /* Page status table bits for virtualization */
302 #define RCP_ACC_BITS 0xf0000000UL
303 #define RCP_FP_BIT 0x08000000UL
304 #define RCP_PCL_BIT 0x00800000UL
305 #define RCP_HR_BIT 0x00400000UL
306 #define RCP_HC_BIT 0x00200000UL
307 #define RCP_GR_BIT 0x00040000UL
308 #define RCP_GC_BIT 0x00020000UL
309 #define RCP_IN_BIT 0x00002000UL /* IPTE notify bit */
311 /* User dirty / referenced bit for KVM's migration feature */
312 #define KVM_UR_BIT 0x00008000UL
313 #define KVM_UC_BIT 0x00004000UL
315 #else /* CONFIG_64BIT */
317 /* Bits in the segment/region table address-space-control-element */
318 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
319 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
320 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
321 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
322 #define _ASCE_REAL_SPACE 0x20 /* real space control */
323 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
324 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
325 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
326 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
327 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
328 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
330 /* Bits in the region table entry */
331 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
332 #define _REGION_ENTRY_RO 0x200 /* region protection bit */
333 #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
334 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
335 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
336 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
337 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
338 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
340 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
341 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
342 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
343 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
344 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
345 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
347 #define _REGION3_ENTRY_LARGE 0x400 /* RTTE-format control, large page */
348 #define _REGION3_ENTRY_RO 0x200 /* page protection bit */
349 #define _REGION3_ENTRY_CO 0x100 /* change-recording override */
351 /* Bits in the segment table entry */
352 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
353 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
354 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
355 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
357 #define _SEGMENT_ENTRY (0)
358 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
360 #define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
361 #define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
362 #define _SEGMENT_ENTRY_SPLIT_BIT 0 /* THP splitting bit number */
363 #define _SEGMENT_ENTRY_SPLIT (1UL << _SEGMENT_ENTRY_SPLIT_BIT)
365 /* Set of bits not changed in pmd_modify */
366 #define _SEGMENT_CHG_MASK (_SEGMENT_ENTRY_ORIGIN | _SEGMENT_ENTRY_LARGE \
367 | _SEGMENT_ENTRY_SPLIT | _SEGMENT_ENTRY_CO)
369 /* Page status table bits for virtualization */
370 #define RCP_ACC_BITS 0xf000000000000000UL
371 #define RCP_FP_BIT 0x0800000000000000UL
372 #define RCP_PCL_BIT 0x0080000000000000UL
373 #define RCP_HR_BIT 0x0040000000000000UL
374 #define RCP_HC_BIT 0x0020000000000000UL
375 #define RCP_GR_BIT 0x0004000000000000UL
376 #define RCP_GC_BIT 0x0002000000000000UL
377 #define RCP_IN_BIT 0x0000200000000000UL /* IPTE notify bit */
379 /* User dirty / referenced bit for KVM's migration feature */
380 #define KVM_UR_BIT 0x0000800000000000UL
381 #define KVM_UC_BIT 0x0000400000000000UL
383 #endif /* CONFIG_64BIT */
386 * A user page table pointer has the space-switch-event bit, the
387 * private-space-control bit and the storage-alteration-event-control
388 * bit set. A kernel page table pointer doesn't need them.
390 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
394 * Page protection definitions.
396 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
397 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
398 #define PAGE_RW __pgprot(_PAGE_TYPE_RO | _PAGE_SWW)
399 #define PAGE_RWC __pgprot(_PAGE_TYPE_RW | _PAGE_SWW | _PAGE_SWC)
401 #define PAGE_KERNEL PAGE_RWC
402 #define PAGE_SHARED PAGE_KERNEL
403 #define PAGE_COPY PAGE_RO
406 * On s390 the page table entry has an invalid bit and a read-only bit.
407 * Read permission implies execute permission and write permission
408 * implies read permission.
411 #define __P000 PAGE_NONE
412 #define __P001 PAGE_RO
413 #define __P010 PAGE_RO
414 #define __P011 PAGE_RO
415 #define __P100 PAGE_RO
416 #define __P101 PAGE_RO
417 #define __P110 PAGE_RO
418 #define __P111 PAGE_RO
420 #define __S000 PAGE_NONE
421 #define __S001 PAGE_RO
422 #define __S010 PAGE_RW
423 #define __S011 PAGE_RW
424 #define __S100 PAGE_RO
425 #define __S101 PAGE_RO
426 #define __S110 PAGE_RW
427 #define __S111 PAGE_RW
430 * Segment entry (large page) protection definitions.
432 #define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
433 #define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
434 #define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
436 static inline int mm_exclusive(struct mm_struct *mm)
438 return likely(mm == current->active_mm &&
439 atomic_read(&mm->context.attach_count) <= 1);
442 static inline int mm_has_pgste(struct mm_struct *mm)
445 if (unlikely(mm->context.has_pgste))
451 * pgd/pmd/pte query functions
455 static inline int pgd_present(pgd_t pgd) { return 1; }
456 static inline int pgd_none(pgd_t pgd) { return 0; }
457 static inline int pgd_bad(pgd_t pgd) { return 0; }
459 static inline int pud_present(pud_t pud) { return 1; }
460 static inline int pud_none(pud_t pud) { return 0; }
461 static inline int pud_large(pud_t pud) { return 0; }
462 static inline int pud_bad(pud_t pud) { return 0; }
464 #else /* CONFIG_64BIT */
466 static inline int pgd_present(pgd_t pgd)
468 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
470 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
473 static inline int pgd_none(pgd_t pgd)
475 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
477 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
480 static inline int pgd_bad(pgd_t pgd)
483 * With dynamic page table levels the pgd can be a region table
484 * entry or a segment table entry. Check for the bit that are
485 * invalid for either table entry.
488 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
489 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
490 return (pgd_val(pgd) & mask) != 0;
493 static inline int pud_present(pud_t pud)
495 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
497 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
500 static inline int pud_none(pud_t pud)
502 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
504 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
507 static inline int pud_large(pud_t pud)
509 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
511 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
514 static inline int pud_bad(pud_t pud)
517 * With dynamic page table levels the pud can be a region table
518 * entry or a segment table entry. Check for the bit that are
519 * invalid for either table entry.
522 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
523 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
524 return (pud_val(pud) & mask) != 0;
527 #endif /* CONFIG_64BIT */
529 static inline int pmd_present(pmd_t pmd)
531 unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
532 return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
533 !(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
536 static inline int pmd_none(pmd_t pmd)
538 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
539 !(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
542 static inline int pmd_large(pmd_t pmd)
545 return !!(pmd_val(pmd) & _SEGMENT_ENTRY_LARGE);
551 static inline int pmd_bad(pmd_t pmd)
553 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
554 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
557 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
558 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
559 unsigned long addr, pmd_t *pmdp);
561 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
562 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
563 unsigned long address, pmd_t *pmdp,
564 pmd_t entry, int dirty);
566 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
567 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
568 unsigned long address, pmd_t *pmdp);
570 #define __HAVE_ARCH_PMD_WRITE
571 static inline int pmd_write(pmd_t pmd)
573 return (pmd_val(pmd) & _SEGMENT_ENTRY_RO) == 0;
576 static inline int pmd_young(pmd_t pmd)
581 static inline int pte_none(pte_t pte)
583 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
586 static inline int pte_present(pte_t pte)
588 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
589 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
590 (!(pte_val(pte) & _PAGE_INVALID) &&
591 !(pte_val(pte) & _PAGE_SWT));
594 static inline int pte_file(pte_t pte)
596 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
597 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
600 static inline int pte_special(pte_t pte)
602 return (pte_val(pte) & _PAGE_SPECIAL);
605 #define __HAVE_ARCH_PTE_SAME
606 static inline int pte_same(pte_t a, pte_t b)
608 return pte_val(a) == pte_val(b);
611 static inline pgste_t pgste_get_lock(pte_t *ptep)
613 unsigned long new = 0;
621 " nihh %0,0xff7f\n" /* clear RCP_PCL_BIT in old */
622 " oihh %1,0x0080\n" /* set RCP_PCL_BIT in new */
625 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
626 : "Q" (ptep[PTRS_PER_PTE]) : "cc");
631 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
635 " nihh %1,0xff7f\n" /* clear RCP_PCL_BIT */
637 : "=Q" (ptep[PTRS_PER_PTE])
638 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE]) : "cc");
643 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
646 unsigned long address, bits;
649 if (pte_val(*ptep) & _PAGE_INVALID)
651 address = pte_val(*ptep) & PAGE_MASK;
652 skey = page_get_storage_key(address);
653 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
654 /* Clear page changed & referenced bit in the storage key */
655 if (bits & _PAGE_CHANGED)
656 page_set_storage_key(address, skey ^ bits, 0);
658 page_reset_referenced(address);
659 /* Transfer page changed & referenced bit to guest bits in pgste */
660 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
661 /* Get host changed & referenced bits from pgste */
662 bits |= (pgste_val(pgste) & (RCP_HR_BIT | RCP_HC_BIT)) >> 52;
663 /* Transfer page changed & referenced bit to kvm user bits */
664 pgste_val(pgste) |= bits << 45; /* KVM_UR_BIT & KVM_UC_BIT */
665 /* Clear relevant host bits in pgste. */
666 pgste_val(pgste) &= ~(RCP_HR_BIT | RCP_HC_BIT);
667 pgste_val(pgste) &= ~(RCP_ACC_BITS | RCP_FP_BIT);
668 /* Copy page access key and fetch protection bit to pgste */
670 (unsigned long) (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
671 /* Transfer referenced bit to pte */
672 pte_val(*ptep) |= (bits & _PAGE_REFERENCED) << 1;
678 static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
683 if (pte_val(*ptep) & _PAGE_INVALID)
685 /* Get referenced bit from storage key */
686 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK);
688 pgste_val(pgste) |= RCP_GR_BIT;
689 /* Get host referenced bit from pgste */
690 if (pgste_val(pgste) & RCP_HR_BIT) {
691 pgste_val(pgste) &= ~RCP_HR_BIT;
694 /* Transfer referenced bit to kvm user bits and pte */
696 pgste_val(pgste) |= KVM_UR_BIT;
697 pte_val(*ptep) |= _PAGE_SWR;
703 static inline void pgste_set_key(pte_t *ptep, pgste_t pgste, pte_t entry)
706 unsigned long address;
709 if (pte_val(entry) & _PAGE_INVALID)
711 VM_BUG_ON(!(pte_val(*ptep) & _PAGE_INVALID));
712 address = pte_val(entry) & PAGE_MASK;
714 * Set page access key and fetch protection bit from pgste.
715 * The guest C/R information is still in the PGSTE, set real
718 nkey = (pgste_val(pgste) & (RCP_ACC_BITS | RCP_FP_BIT)) >> 56;
719 page_set_storage_key(address, nkey, 0);
723 static inline void pgste_set_pte(pte_t *ptep, pte_t entry)
725 if (!MACHINE_HAS_ESOP && (pte_val(entry) & _PAGE_SWW)) {
727 * Without enhanced suppression-on-protection force
728 * the dirty bit on for all writable ptes.
730 pte_val(entry) |= _PAGE_SWC;
731 pte_val(entry) &= ~_PAGE_RO;
737 * struct gmap_struct - guest address space
738 * @mm: pointer to the parent mm_struct
739 * @table: pointer to the page directory
740 * @asce: address space control element for gmap page table
741 * @crst_list: list of all crst tables used in the guest address space
744 struct list_head list;
745 struct mm_struct *mm;
746 unsigned long *table;
748 struct list_head crst_list;
752 * struct gmap_rmap - reverse mapping for segment table entries
753 * @gmap: pointer to the gmap_struct
754 * @entry: pointer to a segment table entry
755 * @vmaddr: virtual address in the guest address space
758 struct list_head list;
760 unsigned long *entry;
761 unsigned long vmaddr;
765 * struct gmap_pgtable - gmap information attached to a page table
766 * @vmaddr: address of the 1MB segment in the process virtual memory
767 * @mapper: list of segment table entries mapping a page table
769 struct gmap_pgtable {
770 unsigned long vmaddr;
771 struct list_head mapper;
775 * struct gmap_notifier - notify function block for page invalidation
776 * @notifier_call: address of callback function
778 struct gmap_notifier {
779 struct list_head list;
780 void (*notifier_call)(struct gmap *gmap, unsigned long address);
783 struct gmap *gmap_alloc(struct mm_struct *mm);
784 void gmap_free(struct gmap *gmap);
785 void gmap_enable(struct gmap *gmap);
786 void gmap_disable(struct gmap *gmap);
787 int gmap_map_segment(struct gmap *gmap, unsigned long from,
788 unsigned long to, unsigned long len);
789 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
790 unsigned long __gmap_translate(unsigned long address, struct gmap *);
791 unsigned long gmap_translate(unsigned long address, struct gmap *);
792 unsigned long __gmap_fault(unsigned long address, struct gmap *);
793 unsigned long gmap_fault(unsigned long address, struct gmap *);
794 void gmap_discard(unsigned long from, unsigned long to, struct gmap *);
796 void gmap_register_ipte_notifier(struct gmap_notifier *);
797 void gmap_unregister_ipte_notifier(struct gmap_notifier *);
798 int gmap_ipte_notify(struct gmap *, unsigned long start, unsigned long len);
799 void gmap_do_ipte_notify(struct mm_struct *, unsigned long addr, pte_t *);
801 static inline pgste_t pgste_ipte_notify(struct mm_struct *mm,
803 pte_t *ptep, pgste_t pgste)
806 if (pgste_val(pgste) & RCP_IN_BIT) {
807 pgste_val(pgste) &= ~RCP_IN_BIT;
808 gmap_do_ipte_notify(mm, addr, ptep);
815 * Certain architectures need to do special things when PTEs
816 * within a page table are directly modified. Thus, the following
817 * hook is made available.
819 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
820 pte_t *ptep, pte_t entry)
824 if (mm_has_pgste(mm)) {
825 pgste = pgste_get_lock(ptep);
826 pgste_set_key(ptep, pgste, entry);
827 pgste_set_pte(ptep, entry);
828 pgste_set_unlock(ptep, pgste);
830 if (!(pte_val(entry) & _PAGE_INVALID) && MACHINE_HAS_EDAT1)
831 pte_val(entry) |= _PAGE_CO;
837 * query functions pte_write/pte_dirty/pte_young only work if
838 * pte_present() is true. Undefined behaviour if not..
840 static inline int pte_write(pte_t pte)
842 return (pte_val(pte) & _PAGE_SWW) != 0;
845 static inline int pte_dirty(pte_t pte)
847 return (pte_val(pte) & _PAGE_SWC) != 0;
850 static inline int pte_young(pte_t pte)
853 if (pte_val(pte) & _PAGE_SWR)
860 * pgd/pmd/pte modification functions
863 static inline void pgd_clear(pgd_t *pgd)
866 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
867 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
871 static inline void pud_clear(pud_t *pud)
874 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
875 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
879 static inline void pmd_clear(pmd_t *pmdp)
881 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
884 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
886 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
890 * The following pte modification functions only work if
891 * pte_present() is true. Undefined behaviour if not..
893 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
895 pte_val(pte) &= _PAGE_CHG_MASK;
896 pte_val(pte) |= pgprot_val(newprot);
897 if ((pte_val(pte) & _PAGE_SWC) && (pte_val(pte) & _PAGE_SWW))
898 pte_val(pte) &= ~_PAGE_RO;
902 static inline pte_t pte_wrprotect(pte_t pte)
904 pte_val(pte) &= ~_PAGE_SWW;
905 /* Do not clobber _PAGE_TYPE_NONE pages! */
906 if (!(pte_val(pte) & _PAGE_INVALID))
907 pte_val(pte) |= _PAGE_RO;
911 static inline pte_t pte_mkwrite(pte_t pte)
913 pte_val(pte) |= _PAGE_SWW;
914 if (pte_val(pte) & _PAGE_SWC)
915 pte_val(pte) &= ~_PAGE_RO;
919 static inline pte_t pte_mkclean(pte_t pte)
921 pte_val(pte) &= ~_PAGE_SWC;
922 /* Do not clobber _PAGE_TYPE_NONE pages! */
923 if (!(pte_val(pte) & _PAGE_INVALID))
924 pte_val(pte) |= _PAGE_RO;
928 static inline pte_t pte_mkdirty(pte_t pte)
930 pte_val(pte) |= _PAGE_SWC;
931 if (pte_val(pte) & _PAGE_SWW)
932 pte_val(pte) &= ~_PAGE_RO;
936 static inline pte_t pte_mkold(pte_t pte)
939 pte_val(pte) &= ~_PAGE_SWR;
944 static inline pte_t pte_mkyoung(pte_t pte)
949 static inline pte_t pte_mkspecial(pte_t pte)
951 pte_val(pte) |= _PAGE_SPECIAL;
955 #ifdef CONFIG_HUGETLB_PAGE
956 static inline pte_t pte_mkhuge(pte_t pte)
958 pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO);
964 * Get (and clear) the user dirty bit for a pte.
966 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
972 if (mm_has_pgste(mm)) {
973 pgste = pgste_get_lock(ptep);
974 pgste = pgste_update_all(ptep, pgste);
975 dirty = !!(pgste_val(pgste) & KVM_UC_BIT);
976 pgste_val(pgste) &= ~KVM_UC_BIT;
977 pgste_set_unlock(ptep, pgste);
984 * Get (and clear) the user referenced bit for a pte.
986 static inline int ptep_test_and_clear_user_young(struct mm_struct *mm,
992 if (mm_has_pgste(mm)) {
993 pgste = pgste_get_lock(ptep);
994 pgste = pgste_update_young(ptep, pgste);
995 young = !!(pgste_val(pgste) & KVM_UR_BIT);
996 pgste_val(pgste) &= ~KVM_UR_BIT;
997 pgste_set_unlock(ptep, pgste);
1002 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1003 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1004 unsigned long addr, pte_t *ptep)
1009 if (mm_has_pgste(vma->vm_mm)) {
1010 pgste = pgste_get_lock(ptep);
1011 pgste = pgste_update_young(ptep, pgste);
1013 *ptep = pte_mkold(pte);
1014 pgste_set_unlock(ptep, pgste);
1015 return pte_young(pte);
1020 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1021 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
1022 unsigned long address, pte_t *ptep)
1024 /* No need to flush TLB
1025 * On s390 reference bits are in storage key and never in TLB
1026 * With virtualization we handle the reference bit, without we
1027 * we can simply return */
1028 return ptep_test_and_clear_young(vma, address, ptep);
1031 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1033 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
1034 #ifndef CONFIG_64BIT
1035 /* pto must point to the start of the segment table */
1036 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
1038 /* ipte in zarch mode can do the math */
1043 : "=m" (*ptep) : "m" (*ptep),
1044 "a" (pto), "a" (address));
1049 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1050 * both clear the TLB for the unmapped pte. The reason is that
1051 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1052 * to modify an active pte. The sequence is
1053 * 1) ptep_get_and_clear
1055 * 3) flush_tlb_range
1056 * On s390 the tlb needs to get flushed with the modification of the pte
1057 * if the pte is active. The only way how this can be implemented is to
1058 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1061 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1062 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
1063 unsigned long address, pte_t *ptep)
1068 mm->context.flush_mm = 1;
1069 if (mm_has_pgste(mm)) {
1070 pgste = pgste_get_lock(ptep);
1071 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1075 if (!mm_exclusive(mm))
1076 __ptep_ipte(address, ptep);
1077 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1079 if (mm_has_pgste(mm)) {
1080 pgste = pgste_update_all(&pte, pgste);
1081 pgste_set_unlock(ptep, pgste);
1086 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1087 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
1088 unsigned long address,
1094 mm->context.flush_mm = 1;
1095 if (mm_has_pgste(mm)) {
1096 pgste = pgste_get_lock(ptep);
1097 pgste_ipte_notify(mm, address, ptep, pgste);
1101 if (!mm_exclusive(mm))
1102 __ptep_ipte(address, ptep);
1104 if (mm_has_pgste(mm))
1105 pgste = pgste_update_all(&pte, pgste);
1109 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
1110 unsigned long address,
1111 pte_t *ptep, pte_t pte)
1115 if (mm_has_pgste(mm)) {
1116 pgste = *(pgste_t *)(ptep + PTRS_PER_PTE);
1117 pgste_set_key(ptep, pgste, pte);
1118 pgste_set_pte(ptep, pte);
1119 pgste_set_unlock(ptep, pgste);
1124 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1125 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1126 unsigned long address, pte_t *ptep)
1131 if (mm_has_pgste(vma->vm_mm)) {
1132 pgste = pgste_get_lock(ptep);
1133 pgste = pgste_ipte_notify(vma->vm_mm, address, ptep, pgste);
1137 __ptep_ipte(address, ptep);
1138 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1140 if (mm_has_pgste(vma->vm_mm)) {
1141 pgste = pgste_update_all(&pte, pgste);
1142 pgste_set_unlock(ptep, pgste);
1148 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1149 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1150 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1151 * cannot be accessed while the batched unmap is running. In this case
1152 * full==1 and a simple pte_clear is enough. See tlb.h.
1154 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1155 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1156 unsigned long address,
1157 pte_t *ptep, int full)
1162 if (mm_has_pgste(mm)) {
1163 pgste = pgste_get_lock(ptep);
1165 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1170 __ptep_ipte(address, ptep);
1171 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1173 if (mm_has_pgste(mm)) {
1174 pgste = pgste_update_all(&pte, pgste);
1175 pgste_set_unlock(ptep, pgste);
1180 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1181 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1182 unsigned long address, pte_t *ptep)
1187 if (pte_write(pte)) {
1188 mm->context.flush_mm = 1;
1189 if (mm_has_pgste(mm)) {
1190 pgste = pgste_get_lock(ptep);
1191 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1194 if (!mm_exclusive(mm))
1195 __ptep_ipte(address, ptep);
1196 pte = pte_wrprotect(pte);
1198 if (mm_has_pgste(mm)) {
1199 pgste_set_pte(ptep, pte);
1200 pgste_set_unlock(ptep, pgste);
1207 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1208 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1209 unsigned long address, pte_t *ptep,
1210 pte_t entry, int dirty)
1214 if (pte_same(*ptep, entry))
1216 if (mm_has_pgste(vma->vm_mm)) {
1217 pgste = pgste_get_lock(ptep);
1218 pgste = pgste_ipte_notify(vma->vm_mm, address, ptep, pgste);
1221 __ptep_ipte(address, ptep);
1223 if (mm_has_pgste(vma->vm_mm)) {
1224 pgste_set_pte(ptep, entry);
1225 pgste_set_unlock(ptep, pgste);
1232 * Conversion functions: convert a page and protection to a page entry,
1233 * and a page entry and page directory to the page they refer to.
1235 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1238 pte_val(__pte) = physpage + pgprot_val(pgprot);
1242 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1244 unsigned long physpage = page_to_phys(page);
1245 pte_t __pte = mk_pte_phys(physpage, pgprot);
1247 if ((pte_val(__pte) & _PAGE_SWW) && PageDirty(page)) {
1248 pte_val(__pte) |= _PAGE_SWC;
1249 pte_val(__pte) &= ~_PAGE_RO;
1254 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1255 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1256 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1257 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1259 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1260 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1262 #ifndef CONFIG_64BIT
1264 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1265 #define pud_deref(pmd) ({ BUG(); 0UL; })
1266 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1268 #define pud_offset(pgd, address) ((pud_t *) pgd)
1269 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1271 #else /* CONFIG_64BIT */
1273 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1274 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1275 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1277 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1279 pud_t *pud = (pud_t *) pgd;
1280 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1281 pud = (pud_t *) pgd_deref(*pgd);
1282 return pud + pud_index(address);
1285 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1287 pmd_t *pmd = (pmd_t *) pud;
1288 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1289 pmd = (pmd_t *) pud_deref(*pud);
1290 return pmd + pmd_index(address);
1293 #endif /* CONFIG_64BIT */
1295 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1296 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1297 #define pte_page(x) pfn_to_page(pte_pfn(x))
1299 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1301 /* Find an entry in the lowest level page table.. */
1302 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1303 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1304 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1305 #define pte_unmap(pte) do { } while (0)
1307 static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
1309 unsigned long sto = (unsigned long) pmdp -
1310 pmd_index(address) * sizeof(pmd_t);
1312 if (!(pmd_val(*pmdp) & _SEGMENT_ENTRY_INV)) {
1314 " .insn rrf,0xb98e0000,%2,%3,0,0"
1316 : "m" (*pmdp), "a" (sto),
1317 "a" ((address & HPAGE_MASK))
1323 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1324 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1327 * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
1328 * Convert to segment table entry format.
1330 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1331 return pgprot_val(SEGMENT_NONE);
1332 if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1333 return pgprot_val(SEGMENT_RO);
1334 return pgprot_val(SEGMENT_RW);
1337 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1339 pmd_val(pmd) &= _SEGMENT_CHG_MASK;
1340 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1344 static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1347 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1351 static inline pmd_t pmd_mkwrite(pmd_t pmd)
1353 /* Do not clobber _HPAGE_TYPE_NONE pages! */
1354 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
1355 pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
1358 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1360 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1362 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1363 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
1365 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1366 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
1368 static inline int pmd_trans_splitting(pmd_t pmd)
1370 return pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT;
1373 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1374 pmd_t *pmdp, pmd_t entry)
1376 if (!(pmd_val(entry) & _SEGMENT_ENTRY_INV) && MACHINE_HAS_EDAT1)
1377 pmd_val(entry) |= _SEGMENT_ENTRY_CO;
1381 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1383 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1387 static inline pmd_t pmd_wrprotect(pmd_t pmd)
1389 pmd_val(pmd) |= _SEGMENT_ENTRY_RO;
1393 static inline pmd_t pmd_mkdirty(pmd_t pmd)
1395 /* No dirty bit in the segment table entry. */
1399 static inline pmd_t pmd_mkold(pmd_t pmd)
1401 /* No referenced bit in the segment table entry. */
1405 static inline pmd_t pmd_mkyoung(pmd_t pmd)
1407 /* No referenced bit in the segment table entry. */
1411 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1412 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1413 unsigned long address, pmd_t *pmdp)
1415 unsigned long pmd_addr = pmd_val(*pmdp) & HPAGE_MASK;
1420 if (MACHINE_HAS_RRBM) {
1421 counter = PTRS_PER_PTE >> 6;
1423 "0: .insn rre,0xb9ae0000,%0,%3\n" /* rrbm */
1427 : "=&d" (tmp), "+&d" (rc), "+d" (counter),
1429 : "a" (64 * 4096UL) : "cc");
1432 counter = PTRS_PER_PTE;
1439 : "+d" (rc), "+d" (counter), "+a" (pmd_addr)
1440 : "a" (4096UL) : "cc");
1445 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
1446 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
1447 unsigned long address, pmd_t *pmdp)
1451 __pmd_idte(address, pmdp);
1456 #define __HAVE_ARCH_PMDP_CLEAR_FLUSH
1457 static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
1458 unsigned long address, pmd_t *pmdp)
1460 return pmdp_get_and_clear(vma->vm_mm, address, pmdp);
1463 #define __HAVE_ARCH_PMDP_INVALIDATE
1464 static inline void pmdp_invalidate(struct vm_area_struct *vma,
1465 unsigned long address, pmd_t *pmdp)
1467 __pmd_idte(address, pmdp);
1470 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1471 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1472 unsigned long address, pmd_t *pmdp)
1476 if (pmd_write(pmd)) {
1477 __pmd_idte(address, pmdp);
1478 set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
1482 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1483 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1485 static inline int pmd_trans_huge(pmd_t pmd)
1487 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1490 static inline int has_transparent_hugepage(void)
1492 return MACHINE_HAS_HPAGE ? 1 : 0;
1495 static inline unsigned long pmd_pfn(pmd_t pmd)
1497 return pmd_val(pmd) >> PAGE_SHIFT;
1499 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1502 * 31 bit swap entry format:
1503 * A page-table entry has some bits we have to treat in a special way.
1504 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1505 * exception will occur instead of a page translation exception. The
1506 * specifiation exception has the bad habit not to store necessary
1507 * information in the lowcore.
1508 * Bit 21 and bit 22 are the page invalid bit and the page protection
1509 * bit. We set both to indicate a swapped page.
1510 * Bit 30 and 31 are used to distinguish the different page types. For
1511 * a swapped page these bits need to be zero.
1512 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1513 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1514 * plus 24 for the offset.
1515 * 0| offset |0110|o|type |00|
1516 * 0 0000000001111111111 2222 2 22222 33
1517 * 0 1234567890123456789 0123 4 56789 01
1519 * 64 bit swap entry format:
1520 * A page-table entry has some bits we have to treat in a special way.
1521 * Bits 52 and bit 55 have to be zero, otherwise an specification
1522 * exception will occur instead of a page translation exception. The
1523 * specifiation exception has the bad habit not to store necessary
1524 * information in the lowcore.
1525 * Bit 53 and bit 54 are the page invalid bit and the page protection
1526 * bit. We set both to indicate a swapped page.
1527 * Bit 62 and 63 are used to distinguish the different page types. For
1528 * a swapped page these bits need to be zero.
1529 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1530 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1531 * plus 56 for the offset.
1532 * | offset |0110|o|type |00|
1533 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1534 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1536 #ifndef CONFIG_64BIT
1537 #define __SWP_OFFSET_MASK (~0UL >> 12)
1539 #define __SWP_OFFSET_MASK (~0UL >> 11)
1541 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1544 offset &= __SWP_OFFSET_MASK;
1545 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1546 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1550 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1551 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1552 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1554 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1555 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1557 #ifndef CONFIG_64BIT
1558 # define PTE_FILE_MAX_BITS 26
1559 #else /* CONFIG_64BIT */
1560 # define PTE_FILE_MAX_BITS 59
1561 #endif /* CONFIG_64BIT */
1563 #define pte_to_pgoff(__pte) \
1564 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1566 #define pgoff_to_pte(__off) \
1567 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1568 | _PAGE_TYPE_FILE })
1570 #endif /* !__ASSEMBLY__ */
1572 #define kern_addr_valid(addr) (1)
1574 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1575 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1576 extern int s390_enable_sie(void);
1579 * No page table caches to initialise
1581 static inline void pgtable_cache_init(void) { }
1582 static inline void check_pgt_cache(void) { }
1584 #include <asm-generic/pgtable.h>
1586 #endif /* _S390_PAGE_H */