2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
22 #include <linux/interrupt.h>
23 #include <linux/cpu.h>
24 #include <linux/stop_machine.h>
25 #include <linux/time.h>
26 #include <linux/sysdev.h>
27 #include <linux/delay.h>
28 #include <linux/init.h>
29 #include <linux/smp.h>
30 #include <linux/types.h>
31 #include <linux/profile.h>
32 #include <linux/timex.h>
33 #include <linux/notifier.h>
34 #include <linux/clocksource.h>
35 #include <linux/clockchips.h>
36 #include <linux/bootmem.h>
37 #include <asm/uaccess.h>
38 #include <asm/delay.h>
39 #include <asm/s390_ext.h>
40 #include <asm/div64.h>
43 #include <asm/irq_regs.h>
44 #include <asm/timer.h>
48 /* change this if you have some constant time drift */
49 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
50 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
52 /* The value of the TOD clock for 1.1.1970. */
53 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
56 * Create a small time difference between the timer interrupts
57 * on the different cpus to avoid lock contention.
59 #define CPU_DEVIATION (smp_processor_id() << 12)
61 #define TICK_SIZE tick
63 static ext_int_info_t ext_int_info_cc;
64 static ext_int_info_t ext_int_etr_cc;
65 static u64 sched_clock_base_cc;
67 static DEFINE_PER_CPU(struct clock_event_device, comparators);
70 * Scheduler clock - returns current time in nanosec units.
72 unsigned long long sched_clock(void)
74 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
78 * Monotonic_clock - returns # of nanoseconds passed since time_init()
80 unsigned long long monotonic_clock(void)
84 EXPORT_SYMBOL(monotonic_clock);
86 void tod_to_timeval(__u64 todval, struct timespec *xtime)
88 unsigned long long sec;
93 todval -= (sec * 1000000) << 12;
94 xtime->tv_nsec = ((todval * 1000) >> 12);
97 #ifdef CONFIG_PROFILING
98 #define s390_do_profile() profile_tick(CPU_PROFILING)
100 #define s390_do_profile() do { ; } while(0)
101 #endif /* CONFIG_PROFILING */
103 void clock_comparator_work(void)
105 struct clock_event_device *cd;
107 S390_lowcore.clock_comparator = -1ULL;
108 set_clock_comparator(S390_lowcore.clock_comparator);
109 cd = &__get_cpu_var(comparators);
110 cd->event_handler(cd);
115 * Fixup the clock comparator.
117 static void fixup_clock_comparator(unsigned long long delta)
119 /* If nobody is waiting there's nothing to fix. */
120 if (S390_lowcore.clock_comparator == -1ULL)
122 S390_lowcore.clock_comparator += delta;
123 set_clock_comparator(S390_lowcore.clock_comparator);
126 static int s390_next_event(unsigned long delta,
127 struct clock_event_device *evt)
129 S390_lowcore.clock_comparator = get_clock() + delta;
130 set_clock_comparator(S390_lowcore.clock_comparator);
134 static void s390_set_mode(enum clock_event_mode mode,
135 struct clock_event_device *evt)
140 * Set up lowcore and control register of the current cpu to
141 * enable TOD clock and clock comparator interrupts.
143 void init_cpu_timer(void)
145 struct clock_event_device *cd;
148 S390_lowcore.clock_comparator = -1ULL;
149 set_clock_comparator(S390_lowcore.clock_comparator);
151 cpu = smp_processor_id();
152 cd = &per_cpu(comparators, cpu);
153 cd->name = "comparator";
154 cd->features = CLOCK_EVT_FEAT_ONESHOT;
157 cd->min_delta_ns = 1;
158 cd->max_delta_ns = LONG_MAX;
160 cd->cpumask = cpumask_of_cpu(cpu);
161 cd->set_next_event = s390_next_event;
162 cd->set_mode = s390_set_mode;
164 clockevents_register_device(cd);
166 /* Enable clock comparator timer interrupt. */
169 /* Always allow the timing alert external interrupt. */
173 static void clock_comparator_interrupt(__u16 code)
175 if (S390_lowcore.clock_comparator == -1ULL)
176 set_clock_comparator(S390_lowcore.clock_comparator);
179 static void etr_timing_alert(struct etr_irq_parm *);
180 static void stp_timing_alert(struct stp_irq_parm *);
182 static void timing_alert_interrupt(__u16 code)
184 if (S390_lowcore.ext_params & 0x00c40000)
185 etr_timing_alert((struct etr_irq_parm *)
186 &S390_lowcore.ext_params);
187 if (S390_lowcore.ext_params & 0x00038000)
188 stp_timing_alert((struct stp_irq_parm *)
189 &S390_lowcore.ext_params);
192 static void etr_reset(void);
193 static void stp_reset(void);
196 * Get the TOD clock running.
198 static u64 __init reset_tod_clock(void)
204 if (store_clock(&time) == 0)
206 /* TOD clock not running. Set the clock to Unix Epoch. */
207 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
208 panic("TOD clock not operational.");
210 return TOD_UNIX_EPOCH;
213 static cycle_t read_tod_clock(void)
218 static struct clocksource clocksource_tod = {
221 .read = read_tod_clock,
225 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
229 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
231 if (clock != &clocksource_tod)
234 /* Make userspace gettimeofday spin until we're done. */
235 ++vdso_data->tb_update_count;
237 vdso_data->xtime_tod_stamp = clock->cycle_last;
238 vdso_data->xtime_clock_sec = xtime.tv_sec;
239 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
240 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
241 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
243 ++vdso_data->tb_update_count;
246 extern struct timezone sys_tz;
248 void update_vsyscall_tz(void)
250 /* Make userspace gettimeofday spin until we're done. */
251 ++vdso_data->tb_update_count;
253 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
254 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
256 ++vdso_data->tb_update_count;
260 * Initialize the TOD clock and the CPU timer of
263 void __init time_init(void)
265 sched_clock_base_cc = reset_tod_clock();
268 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime);
269 set_normalized_timespec(&wall_to_monotonic,
270 -xtime.tv_sec, -xtime.tv_nsec);
272 /* request the clock comparator external interrupt */
273 if (register_early_external_interrupt(0x1004,
274 clock_comparator_interrupt,
275 &ext_int_info_cc) != 0)
276 panic("Couldn't request external interrupt 0x1004");
278 if (clocksource_register(&clocksource_tod) != 0)
279 panic("Could not register TOD clock source");
281 /* request the timing alert external interrupt */
282 if (register_early_external_interrupt(0x1406,
283 timing_alert_interrupt,
284 &ext_int_etr_cc) != 0)
285 panic("Couldn't request external interrupt 0x1406");
287 /* Enable TOD clock interrupts on the boot cpu. */
290 #ifdef CONFIG_VIRT_TIMER
296 * The time is "clock". old is what we think the time is.
297 * Adjust the value by a multiple of jiffies and add the delta to ntp.
298 * "delay" is an approximation how long the synchronization took. If
299 * the time correction is positive, then "delay" is subtracted from
300 * the time difference and only the remaining part is passed to ntp.
302 static unsigned long long adjust_time(unsigned long long old,
303 unsigned long long clock,
304 unsigned long long delay)
306 unsigned long long delta, ticks;
310 /* It is later than we thought. */
311 delta = ticks = clock - old;
312 delta = ticks = (delta < delay) ? 0 : delta - delay;
313 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
314 adjust.offset = ticks * (1000000 / HZ);
316 /* It is earlier than we thought. */
317 delta = ticks = old - clock;
318 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
320 adjust.offset = -ticks * (1000000 / HZ);
322 sched_clock_base_cc += delta;
323 if (adjust.offset != 0) {
324 printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
326 adjust.modes = ADJ_OFFSET_SINGLESHOT;
327 do_adjtimex(&adjust);
332 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
333 static unsigned long clock_sync_flags;
335 #define CLOCK_SYNC_HAS_ETR 0
336 #define CLOCK_SYNC_HAS_STP 1
337 #define CLOCK_SYNC_ETR 2
338 #define CLOCK_SYNC_STP 3
341 * The synchronous get_clock function. It will write the current clock
342 * value to the clock pointer and return 0 if the clock is in sync with
343 * the external time source. If the clock mode is local it will return
344 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
347 int get_sync_clock(unsigned long long *clock)
350 unsigned int sw0, sw1;
352 sw_ptr = &get_cpu_var(clock_sync_word);
353 sw0 = atomic_read(sw_ptr);
354 *clock = get_clock();
355 sw1 = atomic_read(sw_ptr);
356 put_cpu_var(clock_sync_sync);
357 if (sw0 == sw1 && (sw0 & 0x80000000U))
358 /* Success: time is in sync. */
360 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
361 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
363 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
364 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
368 EXPORT_SYMBOL(get_sync_clock);
371 * Make get_sync_clock return -EAGAIN.
373 static void disable_sync_clock(void *dummy)
375 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
377 * Clear the in-sync bit 2^31. All get_sync_clock calls will
378 * fail until the sync bit is turned back on. In addition
379 * increase the "sequence" counter to avoid the race of an
380 * etr event and the complete recovery against get_sync_clock.
382 atomic_clear_mask(0x80000000, sw_ptr);
387 * Make get_sync_clock return 0 again.
388 * Needs to be called from a context disabled for preemption.
390 static void enable_sync_clock(void)
392 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
393 atomic_set_mask(0x80000000, sw_ptr);
396 /* Single threaded workqueue used for etr and stp sync events */
397 static struct workqueue_struct *time_sync_wq;
399 static void __init time_init_wq(void)
402 time_sync_wq = create_singlethread_workqueue("timesync");
406 * External Time Reference (ETR) code.
408 static int etr_port0_online;
409 static int etr_port1_online;
410 static int etr_steai_available;
412 static int __init early_parse_etr(char *p)
414 if (strncmp(p, "off", 3) == 0)
415 etr_port0_online = etr_port1_online = 0;
416 else if (strncmp(p, "port0", 5) == 0)
417 etr_port0_online = 1;
418 else if (strncmp(p, "port1", 5) == 0)
419 etr_port1_online = 1;
420 else if (strncmp(p, "on", 2) == 0)
421 etr_port0_online = etr_port1_online = 1;
424 early_param("etr", early_parse_etr);
427 ETR_EVENT_PORT0_CHANGE,
428 ETR_EVENT_PORT1_CHANGE,
429 ETR_EVENT_PORT_ALERT,
430 ETR_EVENT_SYNC_CHECK,
431 ETR_EVENT_SWITCH_LOCAL,
436 * Valid bit combinations of the eacr register are (x = don't care):
437 * e0 e1 dp p0 p1 ea es sl
438 * 0 0 x 0 0 0 0 0 initial, disabled state
439 * 0 0 x 0 1 1 0 0 port 1 online
440 * 0 0 x 1 0 1 0 0 port 0 online
441 * 0 0 x 1 1 1 0 0 both ports online
442 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
443 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
444 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
445 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
446 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
447 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
448 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
449 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
450 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
451 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
452 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
453 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
454 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
455 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
456 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
457 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
459 static struct etr_eacr etr_eacr;
460 static u64 etr_tolec; /* time of last eacr update */
461 static struct etr_aib etr_port0;
462 static int etr_port0_uptodate;
463 static struct etr_aib etr_port1;
464 static int etr_port1_uptodate;
465 static unsigned long etr_events;
466 static struct timer_list etr_timer;
468 static void etr_timeout(unsigned long dummy);
469 static void etr_work_fn(struct work_struct *work);
470 static DECLARE_WORK(etr_work, etr_work_fn);
473 * Reset ETR attachment.
475 static void etr_reset(void)
477 etr_eacr = (struct etr_eacr) {
478 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
479 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
481 if (etr_setr(&etr_eacr) == 0) {
482 etr_tolec = get_clock();
483 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
484 } else if (etr_port0_online || etr_port1_online) {
485 printk(KERN_WARNING "Running on non ETR capable "
486 "machine, only local mode available.\n");
487 etr_port0_online = etr_port1_online = 0;
491 static int __init etr_init(void)
495 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
498 /* Check if this machine has the steai instruction. */
499 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
500 etr_steai_available = 1;
501 setup_timer(&etr_timer, etr_timeout, 0UL);
502 if (etr_port0_online) {
503 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
504 queue_work(time_sync_wq, &etr_work);
506 if (etr_port1_online) {
507 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
508 queue_work(time_sync_wq, &etr_work);
513 arch_initcall(etr_init);
516 * Two sorts of ETR machine checks. The architecture reads:
517 * "When a machine-check niterruption occurs and if a switch-to-local or
518 * ETR-sync-check interrupt request is pending but disabled, this pending
519 * disabled interruption request is indicated and is cleared".
520 * Which means that we can get etr_switch_to_local events from the machine
521 * check handler although the interruption condition is disabled. Lovely..
525 * Switch to local machine check. This is called when the last usable
526 * ETR port goes inactive. After switch to local the clock is not in sync.
528 void etr_switch_to_local(void)
532 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
533 disable_sync_clock(NULL);
534 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
535 queue_work(time_sync_wq, &etr_work);
539 * ETR sync check machine check. This is called when the ETR OTE and the
540 * local clock OTE are farther apart than the ETR sync check tolerance.
541 * After a ETR sync check the clock is not in sync. The machine check
542 * is broadcasted to all cpus at the same time.
544 void etr_sync_check(void)
548 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
549 disable_sync_clock(NULL);
550 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
551 queue_work(time_sync_wq, &etr_work);
555 * ETR timing alert. There are two causes:
556 * 1) port state change, check the usability of the port
557 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
558 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
559 * or ETR-data word 4 (edf4) has changed.
561 static void etr_timing_alert(struct etr_irq_parm *intparm)
564 /* ETR port 0 state change. */
565 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
567 /* ETR port 1 state change. */
568 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
571 * ETR port alert on either port 0, 1 or both.
572 * Both ports are not up-to-date now.
574 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
575 queue_work(time_sync_wq, &etr_work);
578 static void etr_timeout(unsigned long dummy)
580 set_bit(ETR_EVENT_UPDATE, &etr_events);
581 queue_work(time_sync_wq, &etr_work);
585 * Check if the etr mode is pss.
587 static inline int etr_mode_is_pps(struct etr_eacr eacr)
589 return eacr.es && !eacr.sl;
593 * Check if the etr mode is etr.
595 static inline int etr_mode_is_etr(struct etr_eacr eacr)
597 return eacr.es && eacr.sl;
601 * Check if the port can be used for TOD synchronization.
602 * For PPS mode the port has to receive OTEs. For ETR mode
603 * the port has to receive OTEs, the ETR stepping bit has to
604 * be zero and the validity bits for data frame 1, 2, and 3
607 static int etr_port_valid(struct etr_aib *aib, int port)
611 /* Check that this port is receiving OTEs. */
615 psc = port ? aib->esw.psc1 : aib->esw.psc0;
616 if (psc == etr_lpsc_pps_mode)
618 if (psc == etr_lpsc_operational_step)
619 return !aib->esw.y && aib->slsw.v1 &&
620 aib->slsw.v2 && aib->slsw.v3;
625 * Check if two ports are on the same network.
627 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
629 // FIXME: any other fields we have to compare?
630 return aib1->edf1.net_id == aib2->edf1.net_id;
634 * Wrapper for etr_stei that converts physical port states
635 * to logical port states to be consistent with the output
636 * of stetr (see etr_psc vs. etr_lpsc).
638 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
640 BUG_ON(etr_steai(aib, func) != 0);
641 /* Convert port state to logical port state. */
642 if (aib->esw.psc0 == 1)
644 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
646 if (aib->esw.psc1 == 1)
648 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
653 * Check if the aib a2 is still connected to the same attachment as
654 * aib a1, the etv values differ by one and a2 is valid.
656 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
658 int state_a1, state_a2;
660 /* Paranoia check: e0/e1 should better be the same. */
661 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
662 a1->esw.eacr.e1 != a2->esw.eacr.e1)
665 /* Still connected to the same etr ? */
666 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
667 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
668 if (state_a1 == etr_lpsc_operational_step) {
669 if (state_a2 != etr_lpsc_operational_step ||
670 a1->edf1.net_id != a2->edf1.net_id ||
671 a1->edf1.etr_id != a2->edf1.etr_id ||
672 a1->edf1.etr_pn != a2->edf1.etr_pn)
674 } else if (state_a2 != etr_lpsc_pps_mode)
677 /* The ETV value of a2 needs to be ETV of a1 + 1. */
678 if (a1->edf2.etv + 1 != a2->edf2.etv)
681 if (!etr_port_valid(a2, p))
687 struct clock_sync_data {
690 unsigned long long fixup_cc;
692 struct etr_aib *etr_aib;
695 static void clock_sync_cpu(struct clock_sync_data *sync)
697 atomic_dec(&sync->cpus);
700 * This looks like a busy wait loop but it isn't. etr_sync_cpus
701 * is called on all other cpus while the TOD clocks is stopped.
702 * __udelay will stop the cpu on an enabled wait psw until the
703 * TOD is running again.
705 while (sync->in_sync == 0) {
708 * A different cpu changes *in_sync. Therefore use
709 * barrier() to force memory access.
713 if (sync->in_sync != 1)
714 /* Didn't work. Clear per-cpu in sync bit again. */
715 disable_sync_clock(NULL);
717 * This round of TOD syncing is done. Set the clock comparator
718 * to the next tick and let the processor continue.
720 fixup_clock_comparator(sync->fixup_cc);
724 * Sync the TOD clock using the port refered to by aibp. This port
725 * has to be enabled and the other port has to be disabled. The
726 * last eacr update has to be more than 1.6 seconds in the past.
728 static int etr_sync_clock(void *data)
731 unsigned long long clock, old_clock, delay, delta;
732 struct clock_sync_data *etr_sync;
733 struct etr_aib *sync_port, *aib;
739 if (xchg(&first, 1) == 1) {
741 clock_sync_cpu(etr_sync);
745 /* Wait until all other cpus entered the sync function. */
746 while (atomic_read(&etr_sync->cpus) != 0)
749 port = etr_sync->etr_port;
750 aib = etr_sync->etr_aib;
751 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
754 /* Set clock to next OTE. */
755 __ctl_set_bit(14, 21);
756 __ctl_set_bit(0, 29);
757 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
758 old_clock = get_clock();
759 if (set_clock(clock) == 0) {
760 __udelay(1); /* Wait for the clock to start. */
761 __ctl_clear_bit(0, 29);
762 __ctl_clear_bit(14, 21);
764 /* Adjust Linux timing variables. */
765 delay = (unsigned long long)
766 (aib->edf2.etv - sync_port->edf2.etv) << 32;
767 delta = adjust_time(old_clock, clock, delay);
768 etr_sync->fixup_cc = delta;
769 fixup_clock_comparator(delta);
770 /* Verify that the clock is properly set. */
771 if (!etr_aib_follows(sync_port, aib, port)) {
773 disable_sync_clock(NULL);
774 etr_sync->in_sync = -EAGAIN;
777 etr_sync->in_sync = 1;
781 /* Could not set the clock ?!? */
782 __ctl_clear_bit(0, 29);
783 __ctl_clear_bit(14, 21);
784 disable_sync_clock(NULL);
785 etr_sync->in_sync = -EAGAIN;
792 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
794 struct clock_sync_data etr_sync;
795 struct etr_aib *sync_port;
799 /* Check if the current aib is adjacent to the sync port aib. */
800 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
801 follows = etr_aib_follows(sync_port, aib, port);
802 memcpy(sync_port, aib, sizeof(*aib));
805 memset(&etr_sync, 0, sizeof(etr_sync));
806 etr_sync.etr_aib = aib;
807 etr_sync.etr_port = port;
809 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
810 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
816 * Handle the immediate effects of the different events.
817 * The port change event is used for online/offline changes.
819 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
821 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
823 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
824 eacr.es = eacr.sl = 0;
825 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
826 etr_port0_uptodate = etr_port1_uptodate = 0;
828 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
831 * Port change of an enabled port. We have to
832 * assume that this can have caused an stepping
835 etr_tolec = get_clock();
836 eacr.p0 = etr_port0_online;
839 etr_port0_uptodate = 0;
841 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
844 * Port change of an enabled port. We have to
845 * assume that this can have caused an stepping
848 etr_tolec = get_clock();
849 eacr.p1 = etr_port1_online;
852 etr_port1_uptodate = 0;
854 clear_bit(ETR_EVENT_UPDATE, &etr_events);
859 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
860 * one of the ports needs an update.
862 static void etr_set_tolec_timeout(unsigned long long now)
864 unsigned long micros;
866 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
867 (!etr_eacr.p1 || etr_port1_uptodate))
869 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
870 micros = (micros > 1600000) ? 0 : 1600000 - micros;
871 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
875 * Set up a time that expires after 1/2 second.
877 static void etr_set_sync_timeout(void)
879 mod_timer(&etr_timer, jiffies + HZ/2);
883 * Update the aib information for one or both ports.
885 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
886 struct etr_eacr eacr)
888 /* With both ports disabled the aib information is useless. */
889 if (!eacr.e0 && !eacr.e1)
892 /* Update port0 or port1 with aib stored in etr_work_fn. */
893 if (aib->esw.q == 0) {
894 /* Information for port 0 stored. */
895 if (eacr.p0 && !etr_port0_uptodate) {
897 if (etr_port0_online)
898 etr_port0_uptodate = 1;
901 /* Information for port 1 stored. */
902 if (eacr.p1 && !etr_port1_uptodate) {
904 if (etr_port0_online)
905 etr_port1_uptodate = 1;
910 * Do not try to get the alternate port aib if the clock
911 * is not in sync yet.
913 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
917 * If steai is available we can get the information about
918 * the other port immediately. If only stetr is available the
919 * data-port bit toggle has to be used.
921 if (etr_steai_available) {
922 if (eacr.p0 && !etr_port0_uptodate) {
923 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
924 etr_port0_uptodate = 1;
926 if (eacr.p1 && !etr_port1_uptodate) {
927 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
928 etr_port1_uptodate = 1;
932 * One port was updated above, if the other
933 * port is not uptodate toggle dp bit.
935 if ((eacr.p0 && !etr_port0_uptodate) ||
936 (eacr.p1 && !etr_port1_uptodate))
945 * Write new etr control register if it differs from the current one.
946 * Return 1 if etr_tolec has been updated as well.
948 static void etr_update_eacr(struct etr_eacr eacr)
952 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
953 /* No change, return. */
956 * The disable of an active port of the change of the data port
957 * bit can/will cause a change in the data port.
959 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
960 (etr_eacr.dp ^ eacr.dp) != 0;
964 etr_tolec = get_clock();
968 * ETR work. In this function you'll find the main logic. In
969 * particular this is the only function that calls etr_update_eacr(),
970 * it "controls" the etr control register.
972 static void etr_work_fn(struct work_struct *work)
974 unsigned long long now;
975 struct etr_eacr eacr;
979 /* Create working copy of etr_eacr. */
982 /* Check for the different events and their immediate effects. */
983 eacr = etr_handle_events(eacr);
985 /* Check if ETR is supposed to be active. */
986 eacr.ea = eacr.p0 || eacr.p1;
988 /* Both ports offline. Reset everything. */
989 eacr.dp = eacr.es = eacr.sl = 0;
990 on_each_cpu(disable_sync_clock, NULL, 1);
991 del_timer_sync(&etr_timer);
992 etr_update_eacr(eacr);
993 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
997 /* Store aib to get the current ETR status word. */
998 BUG_ON(etr_stetr(&aib) != 0);
999 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1003 * Update the port information if the last stepping port change
1004 * or data port change is older than 1.6 seconds.
1006 if (now >= etr_tolec + (1600000 << 12))
1007 eacr = etr_handle_update(&aib, eacr);
1010 * Select ports to enable. The prefered synchronization mode is PPS.
1011 * If a port can be enabled depends on a number of things:
1012 * 1) The port needs to be online and uptodate. A port is not
1013 * disabled just because it is not uptodate, but it is only
1014 * enabled if it is uptodate.
1015 * 2) The port needs to have the same mode (pps / etr).
1016 * 3) The port needs to be usable -> etr_port_valid() == 1
1017 * 4) To enable the second port the clock needs to be in sync.
1018 * 5) If both ports are useable and are ETR ports, the network id
1019 * has to be the same.
1020 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1022 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1025 if (!etr_mode_is_pps(etr_eacr))
1027 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1029 // FIXME: uptodate checks ?
1030 else if (etr_port0_uptodate && etr_port1_uptodate)
1032 sync_port = (etr_port0_uptodate &&
1033 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1034 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1038 if (!etr_mode_is_pps(etr_eacr))
1040 sync_port = (etr_port1_uptodate &&
1041 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1042 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1045 if (!etr_mode_is_etr(etr_eacr))
1047 if (!eacr.es || !eacr.p1 ||
1048 aib.esw.psc1 != etr_lpsc_operational_alt)
1050 else if (etr_port0_uptodate && etr_port1_uptodate &&
1051 etr_compare_network(&etr_port0, &etr_port1))
1053 sync_port = (etr_port0_uptodate &&
1054 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1055 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1059 if (!etr_mode_is_etr(etr_eacr))
1061 sync_port = (etr_port1_uptodate &&
1062 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1064 /* Both ports not usable. */
1065 eacr.es = eacr.sl = 0;
1067 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1070 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1074 * If the clock is in sync just update the eacr and return.
1075 * If there is no valid sync port wait for a port update.
1077 if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
1078 eacr.es || sync_port < 0) {
1079 etr_update_eacr(eacr);
1080 etr_set_tolec_timeout(now);
1085 * Prepare control register for clock syncing
1086 * (reset data port bit, set sync check control.
1092 * Update eacr and try to synchronize the clock. If the update
1093 * of eacr caused a stepping port switch (or if we have to
1094 * assume that a stepping port switch has occured) or the
1095 * clock syncing failed, reset the sync check control bit
1096 * and set up a timer to try again after 0.5 seconds
1098 etr_update_eacr(eacr);
1099 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1100 if (now < etr_tolec + (1600000 << 12) ||
1101 etr_sync_clock_stop(&aib, sync_port) != 0) {
1102 /* Sync failed. Try again in 1/2 second. */
1104 etr_update_eacr(eacr);
1105 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1106 etr_set_sync_timeout();
1108 etr_set_tolec_timeout(now);
1112 * Sysfs interface functions
1114 static struct sysdev_class etr_sysclass = {
1118 static struct sys_device etr_port0_dev = {
1120 .cls = &etr_sysclass,
1123 static struct sys_device etr_port1_dev = {
1125 .cls = &etr_sysclass,
1129 * ETR class attributes
1131 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1133 return sprintf(buf, "%i\n", etr_port0.esw.p);
1136 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1138 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1142 if (etr_mode_is_pps(etr_eacr))
1144 else if (etr_mode_is_etr(etr_eacr))
1148 return sprintf(buf, "%s\n", mode_str);
1151 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1154 * ETR port attributes
1156 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1158 if (dev == &etr_port0_dev)
1159 return etr_port0_online ? &etr_port0 : NULL;
1161 return etr_port1_online ? &etr_port1 : NULL;
1164 static ssize_t etr_online_show(struct sys_device *dev,
1165 struct sysdev_attribute *attr,
1168 unsigned int online;
1170 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1171 return sprintf(buf, "%i\n", online);
1174 static ssize_t etr_online_store(struct sys_device *dev,
1175 struct sysdev_attribute *attr,
1176 const char *buf, size_t count)
1180 value = simple_strtoul(buf, NULL, 0);
1181 if (value != 0 && value != 1)
1183 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1185 if (dev == &etr_port0_dev) {
1186 if (etr_port0_online == value)
1187 return count; /* Nothing to do. */
1188 etr_port0_online = value;
1189 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1190 queue_work(time_sync_wq, &etr_work);
1192 if (etr_port1_online == value)
1193 return count; /* Nothing to do. */
1194 etr_port1_online = value;
1195 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1196 queue_work(time_sync_wq, &etr_work);
1201 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1203 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1204 struct sysdev_attribute *attr,
1207 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1208 etr_eacr.e0 : etr_eacr.e1);
1211 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1213 static ssize_t etr_mode_code_show(struct sys_device *dev,
1214 struct sysdev_attribute *attr, char *buf)
1216 if (!etr_port0_online && !etr_port1_online)
1217 /* Status word is not uptodate if both ports are offline. */
1219 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1220 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1223 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1225 static ssize_t etr_untuned_show(struct sys_device *dev,
1226 struct sysdev_attribute *attr, char *buf)
1228 struct etr_aib *aib = etr_aib_from_dev(dev);
1230 if (!aib || !aib->slsw.v1)
1232 return sprintf(buf, "%i\n", aib->edf1.u);
1235 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1237 static ssize_t etr_network_id_show(struct sys_device *dev,
1238 struct sysdev_attribute *attr, char *buf)
1240 struct etr_aib *aib = etr_aib_from_dev(dev);
1242 if (!aib || !aib->slsw.v1)
1244 return sprintf(buf, "%i\n", aib->edf1.net_id);
1247 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1249 static ssize_t etr_id_show(struct sys_device *dev,
1250 struct sysdev_attribute *attr, char *buf)
1252 struct etr_aib *aib = etr_aib_from_dev(dev);
1254 if (!aib || !aib->slsw.v1)
1256 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1259 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1261 static ssize_t etr_port_number_show(struct sys_device *dev,
1262 struct sysdev_attribute *attr, char *buf)
1264 struct etr_aib *aib = etr_aib_from_dev(dev);
1266 if (!aib || !aib->slsw.v1)
1268 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1271 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1273 static ssize_t etr_coupled_show(struct sys_device *dev,
1274 struct sysdev_attribute *attr, char *buf)
1276 struct etr_aib *aib = etr_aib_from_dev(dev);
1278 if (!aib || !aib->slsw.v3)
1280 return sprintf(buf, "%i\n", aib->edf3.c);
1283 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1285 static ssize_t etr_local_time_show(struct sys_device *dev,
1286 struct sysdev_attribute *attr, char *buf)
1288 struct etr_aib *aib = etr_aib_from_dev(dev);
1290 if (!aib || !aib->slsw.v3)
1292 return sprintf(buf, "%i\n", aib->edf3.blto);
1295 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1297 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1298 struct sysdev_attribute *attr, char *buf)
1300 struct etr_aib *aib = etr_aib_from_dev(dev);
1302 if (!aib || !aib->slsw.v3)
1304 return sprintf(buf, "%i\n", aib->edf3.buo);
1307 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1309 static struct sysdev_attribute *etr_port_attributes[] = {
1311 &attr_stepping_control,
1323 static int __init etr_register_port(struct sys_device *dev)
1325 struct sysdev_attribute **attr;
1328 rc = sysdev_register(dev);
1331 for (attr = etr_port_attributes; *attr; attr++) {
1332 rc = sysdev_create_file(dev, *attr);
1338 for (; attr >= etr_port_attributes; attr--)
1339 sysdev_remove_file(dev, *attr);
1340 sysdev_unregister(dev);
1345 static void __init etr_unregister_port(struct sys_device *dev)
1347 struct sysdev_attribute **attr;
1349 for (attr = etr_port_attributes; *attr; attr++)
1350 sysdev_remove_file(dev, *attr);
1351 sysdev_unregister(dev);
1354 static int __init etr_init_sysfs(void)
1358 rc = sysdev_class_register(&etr_sysclass);
1361 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1363 goto out_unreg_class;
1364 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1366 goto out_remove_stepping_port;
1367 rc = etr_register_port(&etr_port0_dev);
1369 goto out_remove_stepping_mode;
1370 rc = etr_register_port(&etr_port1_dev);
1372 goto out_remove_port0;
1376 etr_unregister_port(&etr_port0_dev);
1377 out_remove_stepping_mode:
1378 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1379 out_remove_stepping_port:
1380 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1382 sysdev_class_unregister(&etr_sysclass);
1387 device_initcall(etr_init_sysfs);
1390 * Server Time Protocol (STP) code.
1392 static int stp_online;
1393 static struct stp_sstpi stp_info;
1394 static void *stp_page;
1396 static void stp_work_fn(struct work_struct *work);
1397 static DECLARE_WORK(stp_work, stp_work_fn);
1399 static int __init early_parse_stp(char *p)
1401 if (strncmp(p, "off", 3) == 0)
1403 else if (strncmp(p, "on", 2) == 0)
1407 early_param("stp", early_parse_stp);
1410 * Reset STP attachment.
1412 static void __init stp_reset(void)
1416 stp_page = alloc_bootmem_pages(PAGE_SIZE);
1417 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1419 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1420 else if (stp_online) {
1421 printk(KERN_WARNING "Running on non STP capable machine.\n");
1422 free_bootmem((unsigned long) stp_page, PAGE_SIZE);
1428 static int __init stp_init(void)
1430 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1435 queue_work(time_sync_wq, &stp_work);
1439 arch_initcall(stp_init);
1442 * STP timing alert. There are three causes:
1443 * 1) timing status change
1444 * 2) link availability change
1445 * 3) time control parameter change
1446 * In all three cases we are only interested in the clock source state.
1447 * If a STP clock source is now available use it.
1449 static void stp_timing_alert(struct stp_irq_parm *intparm)
1451 if (intparm->tsc || intparm->lac || intparm->tcpc)
1452 queue_work(time_sync_wq, &stp_work);
1456 * STP sync check machine check. This is called when the timing state
1457 * changes from the synchronized state to the unsynchronized state.
1458 * After a STP sync check the clock is not in sync. The machine check
1459 * is broadcasted to all cpus at the same time.
1461 void stp_sync_check(void)
1463 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1465 disable_sync_clock(NULL);
1466 queue_work(time_sync_wq, &stp_work);
1470 * STP island condition machine check. This is called when an attached
1471 * server attempts to communicate over an STP link and the servers
1472 * have matching CTN ids and have a valid stratum-1 configuration
1473 * but the configurations do not match.
1475 void stp_island_check(void)
1477 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1479 disable_sync_clock(NULL);
1480 queue_work(time_sync_wq, &stp_work);
1484 static int stp_sync_clock(void *data)
1487 unsigned long long old_clock, delta;
1488 struct clock_sync_data *stp_sync;
1493 if (xchg(&first, 1) == 1) {
1495 clock_sync_cpu(stp_sync);
1499 /* Wait until all other cpus entered the sync function. */
1500 while (atomic_read(&stp_sync->cpus) != 0)
1503 enable_sync_clock();
1505 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1506 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1507 queue_work(time_sync_wq, &etr_work);
1510 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1511 stp_info.todoff[2] || stp_info.todoff[3] ||
1512 stp_info.tmd != 2) {
1513 old_clock = get_clock();
1514 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1516 delta = adjust_time(old_clock, get_clock(), 0);
1517 fixup_clock_comparator(delta);
1518 rc = chsc_sstpi(stp_page, &stp_info,
1519 sizeof(struct stp_sstpi));
1520 if (rc == 0 && stp_info.tmd != 2)
1525 disable_sync_clock(NULL);
1526 stp_sync->in_sync = -EAGAIN;
1527 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1528 if (etr_port0_online || etr_port1_online)
1529 queue_work(time_sync_wq, &etr_work);
1531 stp_sync->in_sync = 1;
1537 * STP work. Check for the STP state and take over the clock
1538 * synchronization if the STP clock source is usable.
1540 static void stp_work_fn(struct work_struct *work)
1542 struct clock_sync_data stp_sync;
1546 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1550 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1554 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1555 if (rc || stp_info.c == 0)
1558 memset(&stp_sync, 0, sizeof(stp_sync));
1560 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1561 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1566 * STP class sysfs interface functions
1568 static struct sysdev_class stp_sysclass = {
1572 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1576 return sprintf(buf, "%016llx\n",
1577 *(unsigned long long *) stp_info.ctnid);
1580 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1582 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1586 return sprintf(buf, "%i\n", stp_info.ctn);
1589 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1591 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1593 if (!stp_online || !(stp_info.vbits & 0x2000))
1595 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1598 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1600 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1602 if (!stp_online || !(stp_info.vbits & 0x8000))
1604 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1607 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1609 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1613 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1616 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1618 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1620 if (!stp_online || !(stp_info.vbits & 0x0800))
1622 return sprintf(buf, "%i\n", (int) stp_info.tto);
1625 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1627 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1629 if (!stp_online || !(stp_info.vbits & 0x4000))
1631 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1634 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1635 stp_time_zone_offset_show, NULL);
1637 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1641 return sprintf(buf, "%i\n", stp_info.tmd);
1644 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1646 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1650 return sprintf(buf, "%i\n", stp_info.tst);
1653 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1655 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1657 return sprintf(buf, "%i\n", stp_online);
1660 static ssize_t stp_online_store(struct sysdev_class *class,
1661 const char *buf, size_t count)
1665 value = simple_strtoul(buf, NULL, 0);
1666 if (value != 0 && value != 1)
1668 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1671 queue_work(time_sync_wq, &stp_work);
1676 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1677 * stp/online but attr_online already exists in this file ..
1679 static struct sysdev_class_attribute attr_stp_online = {
1680 .attr = { .name = "online", .mode = 0600 },
1681 .show = stp_online_show,
1682 .store = stp_online_store,
1685 static struct sysdev_class_attribute *stp_attributes[] = {
1693 &attr_time_zone_offset,
1699 static int __init stp_init_sysfs(void)
1701 struct sysdev_class_attribute **attr;
1704 rc = sysdev_class_register(&stp_sysclass);
1707 for (attr = stp_attributes; *attr; attr++) {
1708 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1714 for (; attr >= stp_attributes; attr--)
1715 sysdev_class_remove_file(&stp_sysclass, *attr);
1716 sysdev_class_unregister(&stp_sysclass);
1721 device_initcall(stp_init_sysfs);