2 * handling privileged instructions
4 * Copyright IBM Corp. 2008, 2013
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
10 * Author(s): Carsten Otte <cotte@de.ibm.com>
11 * Christian Borntraeger <borntraeger@de.ibm.com>
14 #include <linux/kvm.h>
15 #include <linux/gfp.h>
16 #include <linux/errno.h>
17 #include <linux/compat.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/facility.h>
20 #include <asm/current.h>
21 #include <asm/debug.h>
22 #include <asm/ebcdic.h>
23 #include <asm/sysinfo.h>
24 #include <asm/pgtable.h>
25 #include <asm/pgalloc.h>
27 #include <asm/ptrace.h>
28 #include <asm/compat.h>
33 /* Handle SCK (SET CLOCK) interception */
34 static int handle_set_clock(struct kvm_vcpu *vcpu)
36 struct kvm_vcpu *cpup;
42 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
43 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
45 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
46 if (op2 & 7) /* Operand must be on a doubleword boundary */
47 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48 rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
50 return kvm_s390_inject_prog_cond(vcpu, rc);
52 VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val);
54 mutex_lock(&vcpu->kvm->lock);
56 val = (val - get_tod_clock()) & ~0x3fUL;
57 kvm_for_each_vcpu(i, cpup, vcpu->kvm)
58 cpup->arch.sie_block->epoch = val;
60 mutex_unlock(&vcpu->kvm->lock);
62 kvm_s390_set_psw_cc(vcpu, 0);
66 static int handle_set_prefix(struct kvm_vcpu *vcpu)
73 vcpu->stat.instruction_spx++;
75 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
76 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
78 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
80 /* must be word boundary */
82 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
85 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
87 return kvm_s390_inject_prog_cond(vcpu, rc);
89 address &= 0x7fffe000u;
92 * Make sure the new value is valid memory. We only need to check the
93 * first page, since address is 8k aligned and memory pieces are always
94 * at least 1MB aligned and have at least a size of 1MB.
96 if (kvm_is_error_gpa(vcpu->kvm, address))
97 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
99 kvm_s390_set_prefix(vcpu, address);
100 trace_kvm_s390_handle_prefix(vcpu, 1, address);
104 static int handle_store_prefix(struct kvm_vcpu *vcpu)
111 vcpu->stat.instruction_stpx++;
113 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
114 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
116 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
118 /* must be word boundary */
120 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
122 address = kvm_s390_get_prefix(vcpu);
125 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
127 return kvm_s390_inject_prog_cond(vcpu, rc);
129 VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2);
130 trace_kvm_s390_handle_prefix(vcpu, 0, address);
134 static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
136 u16 vcpu_id = vcpu->vcpu_id;
141 vcpu->stat.instruction_stap++;
143 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
144 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
146 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
149 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
151 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
153 return kvm_s390_inject_prog_cond(vcpu, rc);
155 VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga);
156 trace_kvm_s390_handle_stap(vcpu, ga);
160 static int __skey_check_enable(struct kvm_vcpu *vcpu)
163 if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)))
166 rc = s390_enable_skey();
167 VCPU_EVENT(vcpu, 3, "%s", "enabling storage keys for guest");
168 trace_kvm_s390_skey_related_inst(vcpu);
169 vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
174 static int handle_skey(struct kvm_vcpu *vcpu)
176 int rc = __skey_check_enable(vcpu);
180 vcpu->stat.instruction_storage_key++;
182 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
183 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
185 kvm_s390_rewind_psw(vcpu, 4);
186 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
190 static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
192 vcpu->stat.instruction_ipte_interlock++;
193 if (psw_bits(vcpu->arch.sie_block->gpsw).p)
194 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
195 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
196 kvm_s390_rewind_psw(vcpu, 4);
197 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
201 static int handle_test_block(struct kvm_vcpu *vcpu)
206 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
207 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
209 kvm_s390_get_regs_rre(vcpu, NULL, ®2);
210 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
211 addr = kvm_s390_logical_to_effective(vcpu, addr);
212 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
213 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
214 addr = kvm_s390_real_to_abs(vcpu, addr);
216 if (kvm_is_error_gpa(vcpu->kvm, addr))
217 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
219 * We don't expect errors on modern systems, and do not care
220 * about storage keys (yet), so let's just clear the page.
222 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
224 kvm_s390_set_psw_cc(vcpu, 0);
225 vcpu->run->s.regs.gprs[0] = 0;
229 static int handle_tpi(struct kvm_vcpu *vcpu)
231 struct kvm_s390_interrupt_info *inti;
238 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
240 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
242 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
244 kvm_s390_set_psw_cc(vcpu, 0);
248 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
249 tpi_data[1] = inti->io.io_int_parm;
250 tpi_data[2] = inti->io.io_int_word;
253 * Store the two-word I/O interruption code into the
256 len = sizeof(tpi_data) - 4;
257 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
259 rc = kvm_s390_inject_prog_cond(vcpu, rc);
260 goto reinject_interrupt;
264 * Store the three-word I/O interruption code into
265 * the appropriate lowcore area.
267 len = sizeof(tpi_data);
268 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
269 /* failed writes to the low core are not recoverable */
271 goto reinject_interrupt;
275 /* irq was successfully handed to the guest */
277 kvm_s390_set_psw_cc(vcpu, 1);
281 * If we encounter a problem storing the interruption code, the
282 * instruction is suppressed from the guest's view: reinject the
285 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
289 /* don't set the cc, a pgm irq was injected or we drop to user space */
290 return rc ? -EFAULT : 0;
293 static int handle_tsch(struct kvm_vcpu *vcpu)
295 struct kvm_s390_interrupt_info *inti = NULL;
296 const u64 isc_mask = 0xffUL << 24; /* all iscs set */
298 /* a valid schid has at least one bit set */
299 if (vcpu->run->s.regs.gprs[1])
300 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
301 vcpu->run->s.regs.gprs[1]);
304 * Prepare exit to userspace.
305 * We indicate whether we dequeued a pending I/O interrupt
306 * so that userspace can re-inject it if the instruction gets
307 * a program check. While this may re-order the pending I/O
308 * interrupts, this is no problem since the priority is kept
311 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
312 vcpu->run->s390_tsch.dequeued = !!inti;
314 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
315 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
316 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
317 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
319 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
324 static int handle_io_inst(struct kvm_vcpu *vcpu)
326 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
328 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
329 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
331 if (vcpu->kvm->arch.css_support) {
333 * Most I/O instructions will be handled by userspace.
334 * Exceptions are tpi and the interrupt portion of tsch.
336 if (vcpu->arch.sie_block->ipa == 0xb236)
337 return handle_tpi(vcpu);
338 if (vcpu->arch.sie_block->ipa == 0xb235)
339 return handle_tsch(vcpu);
340 /* Handle in userspace. */
344 * Set condition code 3 to stop the guest from issuing channel
347 kvm_s390_set_psw_cc(vcpu, 3);
352 static int handle_stfl(struct kvm_vcpu *vcpu)
357 vcpu->stat.instruction_stfl++;
359 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
360 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
363 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
364 * into a u32 memory representation. They will remain bits 0-31.
366 fac = *vcpu->kvm->arch.model.fac->list >> 32;
367 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
371 VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac);
372 trace_kvm_s390_handle_stfl(vcpu, fac);
376 #define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
377 #define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
378 #define PSW_ADDR_24 0x0000000000ffffffUL
379 #define PSW_ADDR_31 0x000000007fffffffUL
381 int is_valid_psw(psw_t *psw)
383 if (psw->mask & PSW_MASK_UNASSIGNED)
385 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
386 if (psw->addr & ~PSW_ADDR_31)
389 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
391 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
398 int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
400 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
401 psw_compat_t new_psw;
406 if (gpsw->mask & PSW_MASK_PSTATE)
407 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
409 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
411 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
413 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
415 return kvm_s390_inject_prog_cond(vcpu, rc);
416 if (!(new_psw.mask & PSW32_MASK_BASE))
417 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
418 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
419 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
420 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
421 if (!is_valid_psw(gpsw))
422 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
426 static int handle_lpswe(struct kvm_vcpu *vcpu)
433 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
434 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
436 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
438 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
439 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
441 return kvm_s390_inject_prog_cond(vcpu, rc);
442 vcpu->arch.sie_block->gpsw = new_psw;
443 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
444 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
448 static int handle_stidp(struct kvm_vcpu *vcpu)
450 u64 stidp_data = vcpu->arch.stidp_data;
455 vcpu->stat.instruction_stidp++;
457 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
458 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
460 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
463 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
465 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
467 return kvm_s390_inject_prog_cond(vcpu, rc);
469 VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data);
473 static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
478 cpus = atomic_read(&vcpu->kvm->online_vcpus);
480 /* deal with other level 3 hypervisors */
481 if (stsi(mem, 3, 2, 2))
485 for (n = mem->count - 1; n > 0 ; n--)
486 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
488 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
489 mem->vm[0].cpus_total = cpus;
490 mem->vm[0].cpus_configured = cpus;
491 mem->vm[0].cpus_standby = 0;
492 mem->vm[0].cpus_reserved = 0;
493 mem->vm[0].caf = 1000;
494 memcpy(mem->vm[0].name, "KVMguest", 8);
495 ASCEBC(mem->vm[0].name, 8);
496 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
497 ASCEBC(mem->vm[0].cpi, 16);
500 static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, ar_t ar,
501 u8 fc, u8 sel1, u16 sel2)
503 vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
504 vcpu->run->s390_stsi.addr = addr;
505 vcpu->run->s390_stsi.ar = ar;
506 vcpu->run->s390_stsi.fc = fc;
507 vcpu->run->s390_stsi.sel1 = sel1;
508 vcpu->run->s390_stsi.sel2 = sel2;
511 static int handle_stsi(struct kvm_vcpu *vcpu)
513 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
514 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
515 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
516 unsigned long mem = 0;
521 vcpu->stat.instruction_stsi++;
522 VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2);
524 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
525 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
528 kvm_s390_set_psw_cc(vcpu, 3);
532 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
533 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
534 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
537 vcpu->run->s.regs.gprs[0] = 3 << 28;
538 kvm_s390_set_psw_cc(vcpu, 0);
542 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
544 if (operand2 & 0xfff)
545 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
548 case 1: /* same handling for 1 and 2 */
550 mem = get_zeroed_page(GFP_KERNEL);
553 if (stsi((void *) mem, fc, sel1, sel2))
557 if (sel1 != 2 || sel2 != 2)
559 mem = get_zeroed_page(GFP_KERNEL);
562 handle_stsi_3_2_2(vcpu, (void *) mem);
566 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
568 rc = kvm_s390_inject_prog_cond(vcpu, rc);
571 if (vcpu->kvm->arch.user_stsi) {
572 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
575 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
577 kvm_s390_set_psw_cc(vcpu, 0);
578 vcpu->run->s.regs.gprs[0] = 0;
581 kvm_s390_set_psw_cc(vcpu, 3);
587 static const intercept_handler_t b2_handlers[256] = {
588 [0x02] = handle_stidp,
589 [0x04] = handle_set_clock,
590 [0x10] = handle_set_prefix,
591 [0x11] = handle_store_prefix,
592 [0x12] = handle_store_cpu_address,
593 [0x21] = handle_ipte_interlock,
594 [0x29] = handle_skey,
595 [0x2a] = handle_skey,
596 [0x2b] = handle_skey,
597 [0x2c] = handle_test_block,
598 [0x30] = handle_io_inst,
599 [0x31] = handle_io_inst,
600 [0x32] = handle_io_inst,
601 [0x33] = handle_io_inst,
602 [0x34] = handle_io_inst,
603 [0x35] = handle_io_inst,
604 [0x36] = handle_io_inst,
605 [0x37] = handle_io_inst,
606 [0x38] = handle_io_inst,
607 [0x39] = handle_io_inst,
608 [0x3a] = handle_io_inst,
609 [0x3b] = handle_io_inst,
610 [0x3c] = handle_io_inst,
611 [0x50] = handle_ipte_interlock,
612 [0x5f] = handle_io_inst,
613 [0x74] = handle_io_inst,
614 [0x76] = handle_io_inst,
615 [0x7d] = handle_stsi,
616 [0xb1] = handle_stfl,
617 [0xb2] = handle_lpswe,
620 int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
622 intercept_handler_t handler;
625 * A lot of B2 instructions are priviledged. Here we check for
626 * the privileged ones, that we can handle in the kernel.
627 * Anything else goes to userspace.
629 handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
631 return handler(vcpu);
636 static int handle_epsw(struct kvm_vcpu *vcpu)
640 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
642 /* This basically extracts the mask half of the psw. */
643 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
644 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
646 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
647 vcpu->run->s.regs.gprs[reg2] |=
648 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
653 #define PFMF_RESERVED 0xfffc0101UL
654 #define PFMF_SK 0x00020000UL
655 #define PFMF_CF 0x00010000UL
656 #define PFMF_UI 0x00008000UL
657 #define PFMF_FSC 0x00007000UL
658 #define PFMF_NQ 0x00000800UL
659 #define PFMF_MR 0x00000400UL
660 #define PFMF_MC 0x00000200UL
661 #define PFMF_KEY 0x000000feUL
663 static int handle_pfmf(struct kvm_vcpu *vcpu)
666 unsigned long start, end;
668 vcpu->stat.instruction_pfmf++;
670 kvm_s390_get_regs_rre(vcpu, ®1, ®2);
672 if (!MACHINE_HAS_PFMF)
673 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
675 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
676 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
678 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
679 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
681 /* Only provide non-quiescing support if the host supports it */
682 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14))
683 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
685 /* No support for conditional-SSKE */
686 if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC))
687 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
689 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
690 start = kvm_s390_logical_to_effective(vcpu, start);
692 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
694 end = (start + (1UL << 12)) & ~((1UL << 12) - 1);
697 end = (start + (1UL << 20)) & ~((1UL << 20) - 1);
700 /* only support 2G frame size if EDAT2 is available and we are
701 not in 24-bit addressing mode */
702 if (!test_kvm_facility(vcpu->kvm, 78) ||
703 psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_24BIT)
704 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
705 end = (start + (1UL << 31)) & ~((1UL << 31) - 1);
708 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
711 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
712 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
713 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
716 while (start < end) {
717 unsigned long useraddr, abs_addr;
719 /* Translate guest address to host address */
720 if ((vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) == 0)
721 abs_addr = kvm_s390_real_to_abs(vcpu, start);
724 useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(abs_addr));
725 if (kvm_is_error_hva(useraddr))
726 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
728 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
729 if (clear_user((void __user *)useraddr, PAGE_SIZE))
730 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
733 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
734 int rc = __skey_check_enable(vcpu);
738 if (set_guest_storage_key(current->mm, useraddr,
739 vcpu->run->s.regs.gprs[reg1] & PFMF_KEY,
740 vcpu->run->s.regs.gprs[reg1] & PFMF_NQ))
741 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
746 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
747 vcpu->run->s.regs.gprs[reg2] = end;
751 static int handle_essa(struct kvm_vcpu *vcpu)
753 /* entries expected to be 1FF */
754 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
755 unsigned long *cbrlo, cbrle;
759 VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries);
760 gmap = vcpu->arch.gmap;
761 vcpu->stat.instruction_essa++;
762 if (!vcpu->kvm->arch.use_cmma)
763 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
765 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
766 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
768 if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6)
769 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
771 /* Rewind PSW to repeat the ESSA instruction */
772 kvm_s390_rewind_psw(vcpu, 4);
773 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
774 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
775 down_read(&gmap->mm->mmap_sem);
776 for (i = 0; i < entries; ++i) {
778 if (unlikely(cbrle & ~PAGE_MASK || cbrle < 2 * PAGE_SIZE))
781 /* try to free backing */
782 __gmap_zap(gmap, cbrle);
784 up_read(&gmap->mm->mmap_sem);
786 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
790 static const intercept_handler_t b9_handlers[256] = {
791 [0x8a] = handle_ipte_interlock,
792 [0x8d] = handle_epsw,
793 [0x8e] = handle_ipte_interlock,
794 [0x8f] = handle_ipte_interlock,
795 [0xab] = handle_essa,
796 [0xaf] = handle_pfmf,
799 int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
801 intercept_handler_t handler;
803 /* This is handled just as for the B2 instructions. */
804 handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
806 return handler(vcpu);
811 int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
813 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
814 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
815 int reg, rc, nr_regs;
820 vcpu->stat.instruction_lctl++;
822 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
823 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
825 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
828 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
830 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
831 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
833 nr_regs = ((reg3 - reg1) & 0xf) + 1;
834 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
836 return kvm_s390_inject_prog_cond(vcpu, rc);
840 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
841 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
844 reg = (reg + 1) % 16;
846 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
850 int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
852 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
853 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
854 int reg, rc, nr_regs;
859 vcpu->stat.instruction_stctl++;
861 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
862 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
864 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
867 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
869 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
870 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
875 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
878 reg = (reg + 1) % 16;
880 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
881 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
884 static int handle_lctlg(struct kvm_vcpu *vcpu)
886 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
887 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
888 int reg, rc, nr_regs;
893 vcpu->stat.instruction_lctlg++;
895 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
896 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
898 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
901 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
903 VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
904 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
906 nr_regs = ((reg3 - reg1) & 0xf) + 1;
907 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
909 return kvm_s390_inject_prog_cond(vcpu, rc);
913 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
916 reg = (reg + 1) % 16;
918 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
922 static int handle_stctg(struct kvm_vcpu *vcpu)
924 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
925 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
926 int reg, rc, nr_regs;
931 vcpu->stat.instruction_stctg++;
933 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
934 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
936 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
939 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
941 VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
942 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
947 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
950 reg = (reg + 1) % 16;
952 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
953 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
956 static const intercept_handler_t eb_handlers[256] = {
957 [0x2f] = handle_lctlg,
958 [0x25] = handle_stctg,
961 int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
963 intercept_handler_t handler;
965 handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
967 return handler(vcpu);
971 static int handle_tprot(struct kvm_vcpu *vcpu)
973 u64 address1, address2;
974 unsigned long hva, gpa;
979 vcpu->stat.instruction_tprot++;
981 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
982 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
984 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
986 /* we only handle the Linux memory detection case:
988 * everything else goes to userspace. */
991 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
993 ret = guest_translate_address(vcpu, address1, ar, &gpa, 1);
994 if (ret == PGM_PROTECTION) {
995 /* Write protected? Try again with read-only... */
997 ret = guest_translate_address(vcpu, address1, ar, &gpa, 0);
1000 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
1001 ret = kvm_s390_inject_program_int(vcpu, ret);
1002 } else if (ret > 0) {
1003 /* Translation not available */
1004 kvm_s390_set_psw_cc(vcpu, 3);
1010 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
1011 if (kvm_is_error_hva(hva)) {
1012 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1015 cc = 1; /* Write not permitted ==> read-only */
1016 kvm_s390_set_psw_cc(vcpu, cc);
1017 /* Note: CC2 only occurs for storage keys (not supported yet) */
1020 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1025 int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1027 /* For e5xx... instructions we only handle TPROT */
1028 if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
1029 return handle_tprot(vcpu);
1033 static int handle_sckpf(struct kvm_vcpu *vcpu)
1037 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1038 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1040 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1041 return kvm_s390_inject_program_int(vcpu,
1044 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1045 vcpu->arch.sie_block->todpr = value;
1050 static const intercept_handler_t x01_handlers[256] = {
1051 [0x07] = handle_sckpf,
1054 int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1056 intercept_handler_t handler;
1058 handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
1060 return handler(vcpu);