1 #ifndef __ASM_SH_PROCESSOR_H
2 #define __ASM_SH_PROCESSOR_H
4 #include <asm/cpu-features.h>
5 #include <asm/segment.h>
10 * CPU type and hardware bug flags. Kept separately for each CPU.
12 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
13 * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
14 * for parsing the subtype in get_cpu_subtype().
21 CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
24 CPU_SH7705, CPU_SH7706, CPU_SH7707,
25 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
26 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
27 CPU_SH7720, CPU_SH7721, CPU_SH7729,
30 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
31 CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
34 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
35 CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
38 CPU_SH7343, CPU_SH7722, CPU_SH7366,
41 CPU_SH5_101, CPU_SH5_103,
59 * TLB information structure
61 * Defined for both I and D tlb, per-processor.
64 unsigned long long next;
65 unsigned long long first;
66 unsigned long long last;
75 unsigned int type, family;
76 int cut_major, cut_minor;
77 unsigned long loops_per_jiffy;
78 unsigned long asid_cache;
80 struct cache_info icache; /* Primary I-cache */
81 struct cache_info dcache; /* Primary D-cache */
82 struct cache_info scache; /* Secondary cache */
89 } __attribute__ ((aligned(L1_CACHE_BYTES)));
91 extern struct sh_cpuinfo cpu_data[];
92 #define boot_cpu_data cpu_data[0]
93 #define current_cpu_data cpu_data[smp_processor_id()]
94 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
96 #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
97 #define cpu_relax() barrier()
100 struct seq_operations;
103 extern struct pt_regs fake_swapper_regs;
105 /* arch/sh/kernel/process.c */
106 extern unsigned int xstate_size;
107 extern void free_thread_xstate(struct task_struct *);
108 extern struct kmem_cache *task_xstate_cachep;
110 /* arch/sh/mm/alignment.c */
111 extern int get_unalign_ctl(struct task_struct *, unsigned long addr);
112 extern int set_unalign_ctl(struct task_struct *, unsigned int val);
114 #define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr))
115 #define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
117 /* arch/sh/mm/init.c */
118 extern unsigned int mem_init_done;
120 /* arch/sh/kernel/setup.c */
121 const char *get_cpu_subtype(struct sh_cpuinfo *c);
122 extern const struct seq_operations cpuinfo_op;
124 /* thread_struct flags */
125 #define SH_THREAD_UAC_NOPRINT (1 << 0)
126 #define SH_THREAD_UAC_SIGBUS (1 << 1)
127 #define SH_THREAD_UAC_MASK (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS)
129 /* processor boot mode configuration */
130 #define MODE_PIN0 (1 << 0)
131 #define MODE_PIN1 (1 << 1)
132 #define MODE_PIN2 (1 << 2)
133 #define MODE_PIN3 (1 << 3)
134 #define MODE_PIN4 (1 << 4)
135 #define MODE_PIN5 (1 << 5)
136 #define MODE_PIN6 (1 << 6)
137 #define MODE_PIN7 (1 << 7)
138 #define MODE_PIN8 (1 << 8)
139 #define MODE_PIN9 (1 << 9)
140 #define MODE_PIN10 (1 << 10)
141 #define MODE_PIN11 (1 << 11)
142 #define MODE_PIN12 (1 << 12)
143 #define MODE_PIN13 (1 << 13)
144 #define MODE_PIN14 (1 << 14)
145 #define MODE_PIN15 (1 << 15)
147 int generic_mode_pins(void);
148 int test_mode_pin(int pin);
150 #ifdef CONFIG_VSYSCALL
151 int vsyscall_init(void);
153 #define vsyscall_init() do { } while (0)
156 #endif /* __ASSEMBLY__ */
158 #ifdef CONFIG_SUPERH32
159 # include "processor_32.h"
161 # include "processor_64.h"
164 #endif /* __ASM_SH_PROCESSOR_H */