4 * Copyright (C) 2008 - 2009 Paul Mundt
6 * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/kgdb.h>
13 #include <linux/kdebug.h>
14 #include <linux/irq.h>
16 #include <asm/cacheflush.h>
17 #include <asm/traps.h>
19 /* Macros for single step instruction identification */
20 #define OPCODE_BT(op) (((op) & 0xff00) == 0x8900)
21 #define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00)
22 #define OPCODE_BTF_DISP(op) (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \
23 (((op) & 0x7f ) << 1))
24 #define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00)
25 #define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00)
26 #define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000)
27 #define OPCODE_BRA_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
28 (((op) & 0x7ff) << 1))
29 #define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023)
30 #define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8)
31 #define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000)
32 #define OPCODE_BSR_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
33 (((op) & 0x7ff) << 1))
34 #define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003)
35 #define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf)
36 #define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b)
37 #define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf)
38 #define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b)
39 #define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf)
40 #define OPCODE_RTS(op) ((op) == 0xb)
41 #define OPCODE_RTE(op) ((op) == 0x2b)
43 #define SR_T_BIT_MASK 0x1
44 #define STEP_OPCODE 0xc33d
46 /* Calculate the new address for after a step */
47 static short *get_step_address(struct pt_regs *linux_regs)
49 insn_size_t op = __raw_readw(linux_regs->pc);
54 if (linux_regs->sr & SR_T_BIT_MASK)
55 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
57 addr = linux_regs->pc + 2;
61 else if (OPCODE_BTS(op)) {
62 if (linux_regs->sr & SR_T_BIT_MASK)
63 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
65 addr = linux_regs->pc + 4; /* Not in delay slot */
69 else if (OPCODE_BF(op)) {
70 if (!(linux_regs->sr & SR_T_BIT_MASK))
71 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
73 addr = linux_regs->pc + 2;
77 else if (OPCODE_BFS(op)) {
78 if (!(linux_regs->sr & SR_T_BIT_MASK))
79 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
81 addr = linux_regs->pc + 4; /* Not in delay slot */
85 else if (OPCODE_BRA(op))
86 addr = linux_regs->pc + 4 + OPCODE_BRA_DISP(op);
89 else if (OPCODE_BRAF(op))
90 addr = linux_regs->pc + 4
91 + linux_regs->regs[OPCODE_BRAF_REG(op)];
94 else if (OPCODE_BSR(op))
95 addr = linux_regs->pc + 4 + OPCODE_BSR_DISP(op);
98 else if (OPCODE_BSRF(op))
99 addr = linux_regs->pc + 4
100 + linux_regs->regs[OPCODE_BSRF_REG(op)];
103 else if (OPCODE_JMP(op))
104 addr = linux_regs->regs[OPCODE_JMP_REG(op)];
107 else if (OPCODE_JSR(op))
108 addr = linux_regs->regs[OPCODE_JSR_REG(op)];
111 else if (OPCODE_RTS(op))
112 addr = linux_regs->pr;
115 else if (OPCODE_RTE(op))
116 addr = linux_regs->regs[15];
120 addr = linux_regs->pc + instruction_size(op);
122 flush_icache_range(addr, addr + instruction_size(op));
123 return (short *)addr;
127 * Replace the instruction immediately after the current instruction
128 * (i.e. next in the expected flow of control) with a trap instruction,
129 * so that returning will cause only a single instruction to be executed.
130 * Note that this model is slightly broken for instructions with delay
131 * slots (e.g. B[TF]S, BSR, BRA etc), where both the branch and the
132 * instruction in the delay slot will be executed.
135 static unsigned long stepped_address;
136 static insn_size_t stepped_opcode;
138 static void do_single_step(struct pt_regs *linux_regs)
140 /* Determine where the target instruction will send us to */
141 unsigned short *addr = get_step_address(linux_regs);
143 stepped_address = (int)addr;
146 stepped_opcode = __raw_readw((long)addr);
149 /* Flush and return */
150 flush_icache_range((long)addr, (long)addr +
151 instruction_size(stepped_opcode));
154 /* Undo a single step */
155 static void undo_single_step(struct pt_regs *linux_regs)
157 /* If we have stepped, put back the old instruction */
158 /* Use stepped_address in case we stopped elsewhere */
159 if (stepped_opcode != 0) {
160 __raw_writew(stepped_opcode, stepped_address);
161 flush_icache_range(stepped_address, stepped_address + 2);
167 void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
171 for (i = 0; i < 16; i++)
172 gdb_regs[GDB_R0 + i] = regs->regs[i];
174 gdb_regs[GDB_PC] = regs->pc;
175 gdb_regs[GDB_PR] = regs->pr;
176 gdb_regs[GDB_SR] = regs->sr;
177 gdb_regs[GDB_GBR] = regs->gbr;
178 gdb_regs[GDB_MACH] = regs->mach;
179 gdb_regs[GDB_MACL] = regs->macl;
181 __asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR]));
184 void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
188 for (i = 0; i < 16; i++)
189 regs->regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i];
191 regs->pc = gdb_regs[GDB_PC];
192 regs->pr = gdb_regs[GDB_PR];
193 regs->sr = gdb_regs[GDB_SR];
194 regs->gbr = gdb_regs[GDB_GBR];
195 regs->mach = gdb_regs[GDB_MACH];
196 regs->macl = gdb_regs[GDB_MACL];
199 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
201 gdb_regs[GDB_R15] = p->thread.sp;
202 gdb_regs[GDB_PC] = p->thread.pc;
205 int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
206 char *remcomInBuffer, char *remcomOutBuffer,
207 struct pt_regs *linux_regs)
212 /* Undo any stepping we may have done */
213 undo_single_step(linux_regs);
215 switch (remcomInBuffer[0]) {
218 /* try to read optional parameter, pc unchanged if no parm */
219 ptr = &remcomInBuffer[1];
220 if (kgdb_hex2long(&ptr, &addr))
221 linux_regs->pc = addr;
224 atomic_set(&kgdb_cpu_doing_single_step, -1);
226 if (remcomInBuffer[0] == 's') {
227 do_single_step(linux_regs);
228 kgdb_single_step = 1;
230 atomic_set(&kgdb_cpu_doing_single_step,
231 raw_smp_processor_id());
237 /* this means that we do not want to exit from the handler: */
241 unsigned long kgdb_arch_pc(int exception, struct pt_regs *regs)
244 return instruction_pointer(regs) - 2;
245 return instruction_pointer(regs);
248 void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long ip)
254 * The primary entry points for the kgdb debug trap table entries.
256 BUILD_TRAP_HANDLER(singlestep)
261 local_irq_save(flags);
262 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
263 kgdb_handle_exception(0, SIGTRAP, 0, regs);
264 local_irq_restore(flags);
267 static int __kgdb_notify(struct die_args *args, unsigned long cmd)
274 * This means a user thread is single stepping
275 * a system call which should be ignored
277 if (test_thread_flag(TIF_SINGLESTEP))
280 ret = kgdb_handle_exception(args->trapnr & 0xff, args->signr,
281 args->err, args->regs);
292 kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr)
297 local_irq_save(flags);
298 ret = __kgdb_notify(ptr, cmd);
299 local_irq_restore(flags);
304 static struct notifier_block kgdb_notifier = {
305 .notifier_call = kgdb_notify,
308 * Lowest-prio notifier priority, we want to be notified last:
310 .priority = -INT_MAX,
313 int kgdb_arch_init(void)
315 return register_die_notifier(&kgdb_notifier);
318 void kgdb_arch_exit(void)
320 unregister_die_notifier(&kgdb_notifier);
323 struct kgdb_arch arch_kgdb_ops = {
324 /* Breakpoint instruction: trapa #0x3c */
325 #ifdef CONFIG_CPU_LITTLE_ENDIAN
326 .gdb_bpt_instr = { 0x3c, 0xc3 },
328 .gdb_bpt_instr = { 0xc3, 0x3c },