2 * TLB flushing operations for SH with an MMU.
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 - 2006 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
13 #include <asm/mmu_context.h>
14 #include <asm/tlbflush.h>
15 #include <asm/cacheflush.h>
17 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
19 if (vma->vm_mm && vma->vm_mm->context.id != NO_CONTEXT) {
22 unsigned long saved_asid = MMU_NO_ASID;
24 asid = vma->vm_mm->context.id & MMU_CONTEXT_ASID_MASK;
27 local_irq_save(flags);
28 if (vma->vm_mm != current->mm) {
29 saved_asid = get_asid();
32 __flush_tlb_page(asid, page);
33 if (saved_asid != MMU_NO_ASID)
35 local_irq_restore(flags);
39 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
42 struct mm_struct *mm = vma->vm_mm;
44 if (mm->context.id != NO_CONTEXT) {
48 local_irq_save(flags);
49 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
50 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
51 mm->context.id = NO_CONTEXT;
52 if (mm == current->mm)
56 unsigned long saved_asid = MMU_NO_ASID;
58 asid = mm->context.id & MMU_CONTEXT_ASID_MASK;
60 end += (PAGE_SIZE - 1);
62 if (mm != current->mm) {
63 saved_asid = get_asid();
67 __flush_tlb_page(asid, start);
70 if (saved_asid != MMU_NO_ASID)
73 local_irq_restore(flags);
77 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
82 local_irq_save(flags);
83 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
84 if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
88 unsigned long saved_asid = get_asid();
90 asid = init_mm.context.id & MMU_CONTEXT_ASID_MASK;
92 end += (PAGE_SIZE - 1);
96 __flush_tlb_page(asid, start);
101 local_irq_restore(flags);
104 void flush_tlb_mm(struct mm_struct *mm)
106 /* Invalidate all TLB of this process. */
107 /* Instead of invalidating each TLB, we get new MMU context. */
108 if (mm->context.id != NO_CONTEXT) {
111 local_irq_save(flags);
112 mm->context.id = NO_CONTEXT;
113 if (mm == current->mm)
114 activate_context(mm);
115 local_irq_restore(flags);
119 void flush_tlb_all(void)
121 unsigned long flags, status;
126 * Write to the MMU control register's bit:
127 * TF-bit for SH-3, TI-bit for SH-4.
128 * It's same position, bit #2.
130 local_irq_save(flags);
131 status = ctrl_inl(MMUCR);
133 ctrl_outl(status, MMUCR);
135 local_irq_restore(flags);
138 void update_mmu_cache(struct vm_area_struct *vma,
139 unsigned long address, pte_t pte)
142 unsigned long pteval;
145 unsigned long pfn = pte_pfn(pte);
146 struct address_space *mapping;
151 page = pfn_to_page(pfn);
152 mapping = page_mapping(page);
154 unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
155 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
158 __flush_wback_region((void *)P1SEGADDR(phys),
162 local_irq_save(flags);
164 /* Set PTEH register */
165 vpn = (address & MMU_VPN_MASK) | get_asid();
166 ctrl_outl(vpn, MMU_PTEH);
168 pteval = pte_val(pte);
170 #ifdef CONFIG_CPU_HAS_PTEA
171 /* Set PTEA register */
172 /* TODO: make this look less hacky */
173 ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
176 /* Set PTEL register */
177 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
178 #if defined(CONFIG_SH_WRITETHROUGH) && defined(CONFIG_CPU_SH4)
181 /* conveniently, we want all the software flags to be 0 anyway */
182 ctrl_outl(pteval, MMU_PTEL);
185 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
186 local_irq_restore(flags);