4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 #include <linux/clockchips.h>
8 #include <linux/interrupt.h>
9 #include <linux/profile.h>
10 #include <linux/delay.h>
11 #include <linux/sched.h>
12 #include <linux/cpu.h>
14 #include <asm/cacheflush.h>
15 #include <asm/switch_to.h>
16 #include <asm/tlbflush.h>
17 #include <asm/timer.h>
18 #include <asm/oplib.h>
23 #define IRQ_IPI_SINGLE 12
24 #define IRQ_IPI_MASK 13
25 #define IRQ_IPI_RESCHED 14
26 #define IRQ_CROSS_CALL 15
28 static inline unsigned long
29 swap_ulong(volatile unsigned long *ptr, unsigned long val)
31 __asm__ __volatile__("swap [%1], %0\n\t" :
32 "=&r" (val), "=&r" (ptr) :
33 "0" (val), "1" (ptr));
37 void __cpuinit smp4m_callin(void)
39 int cpuid = hard_smp_processor_id();
41 local_ops->cache_all();
44 notify_cpu_starting(cpuid);
46 register_percpu_ce(cpuid);
49 smp_store_cpu_info(cpuid);
51 local_ops->cache_all();
55 * Unblock the master CPU _only_ when the scheduler state
56 * of all secondary CPUs will be up-to-date, so after
57 * the SMP initialization the master will be just allowed
58 * to call the scheduler code.
60 /* Allow master to continue. */
61 swap_ulong(&cpu_callin_map[cpuid], 1);
63 /* XXX: What's up with all the flushes? */
64 local_ops->cache_all();
67 /* Fix idle thread fields. */
68 __asm__ __volatile__("ld [%0], %%g6\n\t"
69 : : "r" (¤t_set[cpuid])
70 : "memory" /* paranoid */);
72 /* Attach to the address space of init_task. */
73 atomic_inc(&init_mm.mm_count);
74 current->active_mm = &init_mm;
76 while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
81 set_cpu_online(cpuid, true);
85 * Cycle through the processors asking the PROM to start each one.
87 void __init smp4m_boot_cpus(void)
89 sun4m_unmask_profile_irq();
90 local_ops->cache_all();
93 int __cpuinit smp4m_boot_one_cpu(int i, struct task_struct *idle)
95 unsigned long *entry = &sun4m_cpu_startup;
99 cpu_find_by_mid(i, &cpu_node);
100 current_set[i] = task_thread_info(idle);
102 /* See trampoline.S for details... */
103 entry += ((i - 1) * 3);
106 * Initialize the contexts table
107 * Since the call to prom_startcpu() trashes the structure,
108 * we need to re-initialize it for each cpu
110 smp_penguin_ctable.which_io = 0;
111 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
112 smp_penguin_ctable.reg_size = 0;
114 /* whirrr, whirrr, whirrrrrrrrr... */
115 printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
116 local_ops->cache_all();
117 prom_startcpu(cpu_node, &smp_penguin_ctable, 0, (char *)entry);
119 /* wheee... it's going... */
120 for (timeout = 0; timeout < 10000; timeout++) {
121 if (cpu_callin_map[i])
126 if (!(cpu_callin_map[i])) {
127 printk(KERN_ERR "Processor %d is stuck.\n", i);
131 local_ops->cache_all();
135 void __init smp4m_smp_done(void)
140 /* setup cpu list for irq rotation */
143 for_each_online_cpu(i) {
145 prev = &cpu_data(i).next;
148 local_ops->cache_all();
150 /* Ok, they are spinning and ready to go. */
153 static void sun4m_send_ipi(int cpu, int level)
155 sbus_writel(SUN4M_SOFT_INT(level), &sun4m_irq_percpu[cpu]->set);
158 static void sun4m_ipi_resched(int cpu)
160 sun4m_send_ipi(cpu, IRQ_IPI_RESCHED);
163 static void sun4m_ipi_single(int cpu)
165 sun4m_send_ipi(cpu, IRQ_IPI_SINGLE);
168 static void sun4m_ipi_mask_one(int cpu)
170 sun4m_send_ipi(cpu, IRQ_IPI_MASK);
173 static struct smp_funcall {
180 unsigned long processors_in[SUN4M_NCPUS]; /* Set when ipi entered. */
181 unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
184 static DEFINE_SPINLOCK(cross_call_lock);
186 /* Cross calls must be serialized, at least currently. */
187 static void sun4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
188 unsigned long arg2, unsigned long arg3,
191 register int ncpus = SUN4M_NCPUS;
194 spin_lock_irqsave(&cross_call_lock, flags);
196 /* Init function glue. */
197 ccall_info.func = func;
198 ccall_info.arg1 = arg1;
199 ccall_info.arg2 = arg2;
200 ccall_info.arg3 = arg3;
201 ccall_info.arg4 = arg4;
204 /* Init receive/complete mapping, plus fire the IPI's off. */
208 cpumask_clear_cpu(smp_processor_id(), &mask);
209 cpumask_and(&mask, cpu_online_mask, &mask);
210 for (i = 0; i < ncpus; i++) {
211 if (cpumask_test_cpu(i, &mask)) {
212 ccall_info.processors_in[i] = 0;
213 ccall_info.processors_out[i] = 0;
214 sun4m_send_ipi(i, IRQ_CROSS_CALL);
216 ccall_info.processors_in[i] = 1;
217 ccall_info.processors_out[i] = 1;
227 if (!cpumask_test_cpu(i, &mask))
229 while (!ccall_info.processors_in[i])
231 } while (++i < ncpus);
235 if (!cpumask_test_cpu(i, &mask))
237 while (!ccall_info.processors_out[i])
239 } while (++i < ncpus);
241 spin_unlock_irqrestore(&cross_call_lock, flags);
244 /* Running cross calls. */
245 void smp4m_cross_call_irq(void)
247 int i = smp_processor_id();
249 ccall_info.processors_in[i] = 1;
250 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
251 ccall_info.arg4, ccall_info.arg5);
252 ccall_info.processors_out[i] = 1;
255 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
257 struct pt_regs *old_regs;
258 struct clock_event_device *ce;
259 int cpu = smp_processor_id();
261 old_regs = set_irq_regs(regs);
263 ce = &per_cpu(sparc32_clockevent, cpu);
265 if (ce->mode & CLOCK_EVT_MODE_PERIODIC)
266 sun4m_clear_profile_irq(cpu);
268 sparc_config.load_profile_irq(cpu, 0); /* Is this needless? */
271 ce->event_handler(ce);
274 set_irq_regs(old_regs);
277 static const struct sparc32_ipi_ops sun4m_ipi_ops = {
278 .cross_call = sun4m_cross_call,
279 .resched = sun4m_ipi_resched,
280 .single = sun4m_ipi_single,
281 .mask_one = sun4m_ipi_mask_one,
284 void __init sun4m_init_smp(void)
286 sparc32_ipi_ops = &sun4m_ipi_ops;