2 * linux/arch/sparc/mm/leon_m.c
4 * Copyright (C) 2004 Konrad Eisele (eiselekd@web.de, konrad@gaisler.com) Gaisler Research
5 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
6 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
8 * do srmmu probe in software
12 #include <linux/kernel.h>
16 #include <asm/tlbflush.h>
20 int leon_flush_during_switch = 1;
21 int srmmu_swprobe_trace;
23 static inline unsigned long leon_get_ctable_ptr(void)
27 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
29 "r" (SRMMU_CTXTBL_PTR),
30 "i" (ASI_LEON_MMUREGS));
31 return (retval & SRMMU_CTX_PMASK) << 4;
35 unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr)
39 unsigned int pgd, pmd, ped;
41 unsigned int lvl, pte, paddrbase;
43 unsigned int paddr_calc;
47 if (srmmu_swprobe_trace)
48 printk(KERN_INFO "swprobe: trace on\n");
50 ctxtbl = leon_get_ctable_ptr();
52 if (srmmu_swprobe_trace)
53 printk(KERN_INFO "swprobe: leon_get_ctable_ptr returned 0=>0\n");
56 if (!_pfn_valid(PFN(ctxtbl))) {
57 if (srmmu_swprobe_trace)
59 "swprobe: !_pfn_valid(%x)=>0\n",
64 ctx = srmmu_get_context();
65 if (srmmu_swprobe_trace)
66 printk(KERN_INFO "swprobe: --- ctx (%x) ---\n", ctx);
68 pgd = LEON_BYPASS_LOAD_PA(ctxtbl + (ctx * 4));
70 if (((pgd & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
71 if (srmmu_swprobe_trace)
72 printk(KERN_INFO "swprobe: pgd is entry level 3\n");
75 paddrbase = pgd & _SRMMU_PTE_PMASK_LEON;
78 if (((pgd & SRMMU_ET_MASK) != SRMMU_ET_PTD)) {
79 if (srmmu_swprobe_trace)
80 printk(KERN_INFO "swprobe: pgd is invalid => 0\n");
84 if (srmmu_swprobe_trace)
85 printk(KERN_INFO "swprobe: --- pgd (%x) ---\n", pgd);
87 ptr = (pgd & SRMMU_PTD_PMASK) << 4;
88 ptr += ((((vaddr) >> LEON_PGD_SH) & LEON_PGD_M) * 4);
89 if (!_pfn_valid(PFN(ptr)))
92 pmd = LEON_BYPASS_LOAD_PA(ptr);
93 if (((pmd & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
94 if (srmmu_swprobe_trace)
95 printk(KERN_INFO "swprobe: pmd is entry level 2\n");
98 paddrbase = pmd & _SRMMU_PTE_PMASK_LEON;
101 if (((pmd & SRMMU_ET_MASK) != SRMMU_ET_PTD)) {
102 if (srmmu_swprobe_trace)
103 printk(KERN_INFO "swprobe: pmd is invalid => 0\n");
107 if (srmmu_swprobe_trace)
108 printk(KERN_INFO "swprobe: --- pmd (%x) ---\n", pmd);
110 ptr = (pmd & SRMMU_PTD_PMASK) << 4;
111 ptr += (((vaddr >> LEON_PMD_SH) & LEON_PMD_M) * 4);
112 if (!_pfn_valid(PFN(ptr))) {
113 if (srmmu_swprobe_trace)
114 printk(KERN_INFO "swprobe: !_pfn_valid(%x)=>0\n",
119 ped = LEON_BYPASS_LOAD_PA(ptr);
121 if (((ped & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
122 if (srmmu_swprobe_trace)
123 printk(KERN_INFO "swprobe: ped is entry level 1\n");
126 paddrbase = ped & _SRMMU_PTE_PMASK_LEON;
129 if (((ped & SRMMU_ET_MASK) != SRMMU_ET_PTD)) {
130 if (srmmu_swprobe_trace)
131 printk(KERN_INFO "swprobe: ped is invalid => 0\n");
135 if (srmmu_swprobe_trace)
136 printk(KERN_INFO "swprobe: --- ped (%x) ---\n", ped);
138 ptr = (ped & SRMMU_PTD_PMASK) << 4;
139 ptr += (((vaddr >> LEON_PTE_SH) & LEON_PTE_M) * 4);
140 if (!_pfn_valid(PFN(ptr)))
143 ptr = LEON_BYPASS_LOAD_PA(ptr);
144 if (((ptr & SRMMU_ET_MASK) == SRMMU_ET_PTE)) {
145 if (srmmu_swprobe_trace)
146 printk(KERN_INFO "swprobe: ptr is entry level 0\n");
149 paddrbase = ptr & _SRMMU_PTE_PMASK_LEON;
152 if (srmmu_swprobe_trace)
153 printk(KERN_INFO "swprobe: ptr is invalid => 0\n");
160 (vaddr & ~(-1 << LEON_PTE_SH)) | ((pte & ~0xff) << 4);
164 (vaddr & ~(-1 << LEON_PMD_SH)) | ((pte & ~0xff) << 4);
168 (vaddr & ~(-1 << LEON_PGD_SH)) | ((pte & ~0xff) << 4);
175 if (srmmu_swprobe_trace)
176 printk(KERN_INFO "swprobe: padde %x\n", paddr_calc);
182 void leon_flush_icache_all(void)
184 __asm__ __volatile__(" flush "); /*iflush*/
187 void leon_flush_dcache_all(void)
189 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
190 "i"(ASI_LEON_DFLUSH) : "memory");
193 void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page)
195 if (vma->vm_flags & VM_EXEC)
196 leon_flush_icache_all();
197 leon_flush_dcache_all();
200 void leon_flush_cache_all(void)
202 __asm__ __volatile__(" flush "); /*iflush*/
203 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
204 "i"(ASI_LEON_DFLUSH) : "memory");
207 void leon_flush_tlb_all(void)
209 leon_flush_cache_all();
210 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : "r"(0x400),
211 "i"(ASI_LEON_MMUFLUSH) : "memory");
214 /* get all cache regs */
215 void leon3_getCacheRegs(struct leon3_cacheregs *regs)
217 unsigned long ccr, iccr, dccr;
221 /* Get Cache regs from "Cache ASI" address 0x0, 0x8 and 0xC */
222 __asm__ __volatile__("lda [%%g0] %3, %0\n\t"
224 "lda [%%g1] %3, %1\n\t"
226 "lda [%%g1] %3, %2\n\t"
227 : "=r"(ccr), "=r"(iccr), "=r"(dccr)
229 : "i"(ASI_LEON_CACHEREGS) /* input */
230 : "g1" /* clobber list */
237 /* Due to virtual cache we need to check cache configuration if
238 * it is possible to skip flushing in some cases.
240 * Leon2 and Leon3 differ in their way of telling cache information
243 int __init leon_flush_needed(void)
245 int flush_needed = -1;
246 unsigned int ssize, sets;
248 { "direct mapped", "2-way associative", "3-way associative",
252 struct leon3_cacheregs cregs;
253 leon3_getCacheRegs(&cregs);
254 sets = (cregs.dccr & LEON3_XCCR_SETS_MASK) >> 24;
255 /* (ssize=>realsize) 0=>1k, 1=>2k, 2=>4k, 3=>8k ... */
256 ssize = 1 << ((cregs.dccr & LEON3_XCCR_SSIZE_MASK) >> 20);
258 printk(KERN_INFO "CACHE: %s cache, set size %dk\n",
259 sets > 3 ? "unknown" : setStr[sets], ssize);
260 if ((ssize <= (PAGE_SIZE / 1024)) && (sets == 0)) {
261 /* Set Size <= Page size ==>
262 flush on every context switch not needed. */
264 printk(KERN_INFO "CACHE: not flushing on every context switch\n");
269 void leon_switch_mm(void)
271 flush_tlb_mm((void *)0);
272 if (leon_flush_during_switch)
273 leon_flush_cache_all();
276 static void leon_flush_cache_mm(struct mm_struct *mm)
278 leon_flush_cache_all();
281 static void leon_flush_cache_page(struct vm_area_struct *vma, unsigned long page)
283 leon_flush_pcache_all(vma, page);
286 static void leon_flush_cache_range(struct vm_area_struct *vma,
290 leon_flush_cache_all();
293 static void leon_flush_tlb_mm(struct mm_struct *mm)
295 leon_flush_tlb_all();
298 static void leon_flush_tlb_page(struct vm_area_struct *vma,
301 leon_flush_tlb_all();
304 static void leon_flush_tlb_range(struct vm_area_struct *vma,
308 leon_flush_tlb_all();
311 static void leon_flush_page_to_ram(unsigned long page)
313 leon_flush_cache_all();
316 static void leon_flush_sig_insns(struct mm_struct *mm, unsigned long page)
318 leon_flush_cache_all();
321 static void leon_flush_page_for_dma(unsigned long page)
323 leon_flush_dcache_all();
326 void __init poke_leonsparc(void)
330 static const struct sparc32_cachetlb_ops leon_ops = {
331 .cache_all = leon_flush_cache_all,
332 .cache_mm = leon_flush_cache_mm,
333 .cache_page = leon_flush_cache_page,
334 .cache_range = leon_flush_cache_range,
335 .tlb_all = leon_flush_tlb_all,
336 .tlb_mm = leon_flush_tlb_mm,
337 .tlb_page = leon_flush_tlb_page,
338 .tlb_range = leon_flush_tlb_range,
339 .page_to_ram = leon_flush_page_to_ram,
340 .sig_insns = leon_flush_sig_insns,
341 .page_for_dma = leon_flush_page_for_dma,
344 void __init init_leon(void)
347 sparc32_cachetlb_ops = &leon_ops;
348 poke_srmmu = poke_leonsparc;
350 leon_flush_during_switch = leon_flush_needed();