1 #ifndef _ASM_X86_IO_APIC_H
2 #define _ASM_X86_IO_APIC_H
4 #include <linux/types.h>
5 #include <asm/mpspec.h>
6 #include <asm/apicdef.h>
7 #include <asm/irq_vectors.h>
8 #include <asm/x86_init.h>
10 * Intel IO-APIC support for SMP and UP systems.
12 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
15 /* I/O Unit Redirection Table */
16 #define IO_APIC_REDIR_VECTOR_MASK 0x000FF
17 #define IO_APIC_REDIR_DEST_LOGICAL 0x00800
18 #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
19 #define IO_APIC_REDIR_SEND_PENDING (1 << 12)
20 #define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
21 #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
22 #define IO_APIC_REDIR_MASKED (1 << 16)
25 * The structure of the IO-APIC:
27 union IO_APIC_reg_00 {
30 u32 __reserved_2 : 14,
35 } __attribute__ ((packed)) bits;
38 union IO_APIC_reg_01 {
46 } __attribute__ ((packed)) bits;
49 union IO_APIC_reg_02 {
52 u32 __reserved_2 : 24,
55 } __attribute__ ((packed)) bits;
58 union IO_APIC_reg_03 {
63 } __attribute__ ((packed)) bits;
66 struct IO_APIC_route_entry {
68 delivery_mode : 3, /* 000: FIXED
72 dest_mode : 1, /* 0: physical, 1: logical */
76 trigger : 1, /* 0: edge, 1: level */
77 mask : 1, /* 0: enabled, 1: disabled */
80 __u32 __reserved_3 : 24,
82 } __attribute__ ((packed));
84 struct IR_IO_APIC_route_entry {
96 } __attribute__ ((packed));
98 #define IOAPIC_AUTO -1
100 #define IOAPIC_LEVEL 1
101 #define IOAPIC_MAP_ALLOC 0x1
102 #define IOAPIC_MAP_CHECK 0x2
104 #ifdef CONFIG_X86_IO_APIC
107 * # of IO-APICs and # of IRQ routing registers
109 extern int nr_ioapics;
111 extern int mpc_ioapic_id(int ioapic);
112 extern unsigned int mpc_ioapic_addr(int ioapic);
113 extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic);
115 #define MP_MAX_IOAPIC_PIN 127
117 /* # of MP IRQ source entries */
118 extern int mp_irq_entries;
120 /* MP IRQ source entries */
121 extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
123 /* Older SiS APIC requires we rewrite the index register */
124 extern int sis_apic_bug;
126 /* 1 if "noapic" boot option passed */
127 extern int skip_ioapic_setup;
129 /* 1 if "noapic" boot option passed */
130 extern int noioapicquirk;
132 /* -1 if "noapic" boot option passed */
133 extern int noioapicreroute;
136 * If we use the IO-APIC for IRQ routing, disable automatic
137 * assignment of PCI IRQ's.
139 #define io_apic_assign_pci_irqs \
140 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
142 struct io_apic_irq_attr;
144 extern void ioapic_insert_resources(void);
146 extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
148 struct io_apic_irq_attr *);
149 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
151 extern void native_compose_msi_msg(struct pci_dev *pdev,
152 unsigned int irq, unsigned int dest,
153 struct msi_msg *msg, u8 hpet_id);
154 extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
156 extern int save_ioapic_entries(void);
157 extern void mask_ioapic_entries(void);
158 extern int restore_ioapic_entries(void);
160 extern void setup_ioapic_ids_from_mpc(void);
161 extern void setup_ioapic_ids_from_mpc_nocheck(void);
163 enum ioapic_domain_type {
164 IOAPIC_DOMAIN_INVALID,
165 IOAPIC_DOMAIN_LEGACY,
166 IOAPIC_DOMAIN_STRICT,
167 IOAPIC_DOMAIN_DYNAMIC,
172 struct irq_domain_ops;
174 struct ioapic_domain_cfg {
175 enum ioapic_domain_type type;
176 const struct irq_domain_ops *ops;
177 struct device_node *dev;
180 struct mp_ioapic_gsi{
186 extern int mp_find_ioapic(u32 gsi);
187 extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
188 extern u32 mp_pin_to_gsi(int ioapic, int pin);
189 extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);
190 extern void mp_unmap_irq(int irq);
191 extern void __init mp_register_ioapic(int id, u32 address, u32 gsi_base,
192 struct ioapic_domain_cfg *cfg);
193 extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
194 irq_hw_number_t hwirq);
195 extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
196 extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
197 extern void __init pre_init_apic_IRQ0(void);
199 extern void mp_save_irq(struct mpc_intsrc *m);
201 extern void disable_ioapic_support(void);
203 extern void __init native_io_apic_init_mappings(void);
204 extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
205 extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
206 extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
207 extern void native_disable_io_apic(void);
208 extern void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
209 extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
210 extern int native_ioapic_set_affinity(struct irq_data *,
211 const struct cpumask *,
214 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
216 return x86_io_apic_ops.read(apic, reg);
219 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
221 x86_io_apic_ops.write(apic, reg, value);
223 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
225 x86_io_apic_ops.modify(apic, reg, value);
228 extern void io_apic_eoi(unsigned int apic, unsigned int vector);
230 #else /* !CONFIG_X86_IO_APIC */
232 #define io_apic_assign_pci_irqs 0
233 #define setup_ioapic_ids_from_mpc x86_init_noop
234 static inline void ioapic_insert_resources(void) { }
235 #define gsi_top (NR_IRQS_LEGACY)
236 static inline int mp_find_ioapic(u32 gsi) { return 0; }
237 static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
238 static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }
239 static inline void mp_unmap_irq(int irq) { }
241 static inline int save_ioapic_entries(void)
246 static inline void mask_ioapic_entries(void) { }
247 static inline int restore_ioapic_entries(void)
252 static inline void mp_save_irq(struct mpc_intsrc *m) { };
253 static inline void disable_ioapic_support(void) { }
254 #define native_io_apic_init_mappings NULL
255 #define native_io_apic_read NULL
256 #define native_io_apic_write NULL
257 #define native_io_apic_modify NULL
258 #define native_disable_io_apic NULL
259 #define native_io_apic_print_entries NULL
260 #define native_ioapic_set_affinity NULL
261 #define native_setup_ioapic_entry NULL
262 #define native_compose_msi_msg NULL
263 #define native_eoi_ioapic_pin NULL
266 #endif /* _ASM_X86_IO_APIC_H */