2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
26 * - idtentry - Define exception entry points.
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
31 #include <asm/cache.h>
32 #include <asm/errno.h>
33 #include <asm/dwarf2.h>
34 #include <asm/calling.h>
35 #include <asm/asm-offsets.h>
37 #include <asm/unistd.h>
38 #include <asm/thread_info.h>
39 #include <asm/hw_irq.h>
40 #include <asm/page_types.h>
41 #include <asm/irqflags.h>
42 #include <asm/paravirt.h>
43 #include <asm/percpu.h>
45 #include <asm/context_tracking.h>
47 #include <asm/pgtable_types.h>
48 #include <linux/err.h>
50 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51 #include <linux/elf-em.h>
52 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53 #define __AUDIT_ARCH_64BIT 0x80000000
54 #define __AUDIT_ARCH_LE 0x40000000
57 .section .entry.text, "ax"
60 #ifndef CONFIG_PREEMPT
61 #define retint_kernel retint_restore_args
64 #ifdef CONFIG_PARAVIRT
65 ENTRY(native_usergs_sysret64)
68 ENDPROC(native_usergs_sysret64)
69 #endif /* CONFIG_PARAVIRT */
72 .macro TRACE_IRQS_IRETQ
73 #ifdef CONFIG_TRACE_IRQFLAGS
74 bt $9,EFLAGS(%rsp) /* interrupts off? */
82 * When dynamic function tracer is enabled it will add a breakpoint
83 * to all locations that it is about to modify, sync CPUs, update
84 * all the code, sync CPUs, then remove the breakpoints. In this time
85 * if lockdep is enabled, it might jump back into the debug handler
86 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
88 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
89 * make sure the stack pointer does not get reset back to the top
90 * of the debug stack, and instead just reuses the current stack.
92 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
94 .macro TRACE_IRQS_OFF_DEBUG
95 call debug_stack_set_zero
97 call debug_stack_reset
100 .macro TRACE_IRQS_ON_DEBUG
101 call debug_stack_set_zero
103 call debug_stack_reset
106 .macro TRACE_IRQS_IRETQ_DEBUG
107 bt $9,EFLAGS(%rsp) /* interrupts off? */
114 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
115 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
116 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
122 .macro EMPTY_FRAME start=1 offset=0
126 CFI_DEF_CFA rsp,8+\offset
128 CFI_DEF_CFA_OFFSET 8+\offset
133 * initial frame state for interrupts (and exceptions without error code)
135 .macro INTR_FRAME start=1 offset=0
136 EMPTY_FRAME \start, 5*8+\offset
137 /*CFI_REL_OFFSET ss, 4*8+\offset*/
138 CFI_REL_OFFSET rsp, 3*8+\offset
139 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
140 /*CFI_REL_OFFSET cs, 1*8+\offset*/
141 CFI_REL_OFFSET rip, 0*8+\offset
145 * initial frame state for exceptions with error code (and interrupts
146 * with vector already pushed)
148 .macro XCPT_FRAME start=1 offset=0
149 INTR_FRAME \start, 1*8+\offset
153 * frame that enables passing a complete pt_regs to a C function.
155 .macro DEFAULT_FRAME start=1 offset=0
156 XCPT_FRAME \start, ORIG_RAX+\offset
157 CFI_REL_OFFSET rdi, RDI+\offset
158 CFI_REL_OFFSET rsi, RSI+\offset
159 CFI_REL_OFFSET rdx, RDX+\offset
160 CFI_REL_OFFSET rcx, RCX+\offset
161 CFI_REL_OFFSET rax, RAX+\offset
162 CFI_REL_OFFSET r8, R8+\offset
163 CFI_REL_OFFSET r9, R9+\offset
164 CFI_REL_OFFSET r10, R10+\offset
165 CFI_REL_OFFSET r11, R11+\offset
166 CFI_REL_OFFSET rbx, RBX+\offset
167 CFI_REL_OFFSET rbp, RBP+\offset
168 CFI_REL_OFFSET r12, R12+\offset
169 CFI_REL_OFFSET r13, R13+\offset
170 CFI_REL_OFFSET r14, R14+\offset
171 CFI_REL_OFFSET r15, R15+\offset
175 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
177 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
178 * then loads new ss, cs, and rip from previously programmed MSRs.
179 * rflags gets masked by a value from another MSR (so CLD and CLAC
180 * are not needed). SYSCALL does not save anything on the stack
181 * and does not change rsp.
183 * Registers on entry:
184 * rax system call number
186 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
190 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
193 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
195 * Only called from user space.
197 * When user can change pt_regs->foo always force IRET. That is because
198 * it deals with uncanonical addresses better. SYSRET has trouble
199 * with them due to bugs in both AMD and Intel CPUs.
207 /*CFI_REGISTER rflags,r11*/
210 * Interrupts are off on entry.
211 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
212 * it is too small to ever cause noticeable irq latency.
216 * A hypervisor implementation might want to use a label
217 * after the swapgs, so that it can do the swapgs
218 * for the guest and jump here on syscall.
220 GLOBAL(system_call_after_swapgs)
222 movq %rsp,PER_CPU_VAR(rsp_scratch)
223 movq PER_CPU_VAR(kernel_stack),%rsp
225 /* Construct struct pt_regs on stack */
226 pushq_cfi $__USER_DS /* pt_regs->ss */
227 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
229 * Re-enable interrupts.
230 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
231 * must execute atomically in the face of possible interrupt-driven
232 * task preemption. We must enable interrupts only after we're done
233 * with using rsp_scratch:
235 ENABLE_INTERRUPTS(CLBR_NONE)
236 pushq_cfi %r11 /* pt_regs->flags */
237 pushq_cfi $__USER_CS /* pt_regs->cs */
238 pushq_cfi %rcx /* pt_regs->ip */
240 pushq_cfi_reg rax /* pt_regs->orig_ax */
241 pushq_cfi_reg rdi /* pt_regs->di */
242 pushq_cfi_reg rsi /* pt_regs->si */
243 pushq_cfi_reg rdx /* pt_regs->dx */
244 pushq_cfi_reg rcx /* pt_regs->cx */
245 pushq_cfi $-ENOSYS /* pt_regs->ax */
246 pushq_cfi_reg r8 /* pt_regs->r8 */
247 pushq_cfi_reg r9 /* pt_regs->r9 */
248 pushq_cfi_reg r10 /* pt_regs->r10 */
249 pushq_cfi_reg r11 /* pt_regs->r11 */
250 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
252 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
254 system_call_fastpath:
255 #if __SYSCALL_MASK == ~0
256 cmpq $__NR_syscall_max,%rax
258 andl $__SYSCALL_MASK,%eax
259 cmpl $__NR_syscall_max,%eax
261 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
263 call *sys_call_table(,%rax,8)
267 * Syscall return path ending with SYSRET (fast path).
268 * Has incompletely filled pt_regs.
271 DISABLE_INTERRUPTS(CLBR_NONE)
275 * We must check ti flags with interrupts (or at least preemption)
276 * off because we must *never* return to userspace without
277 * processing exit work that is enqueued if we're preempted here.
278 * In particular, returning to userspace with any of the one-shot
279 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
282 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
283 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
287 * sysretq will re-enable interrupts:
290 RESTORE_C_REGS_EXCEPT_RCX_R11
293 movq EFLAGS(%rsp),%r11
294 /*CFI_REGISTER rflags,r11*/
297 * 64bit SYSRET restores rip from rcx,
298 * rflags from r11 (but RF and VM bits are forced to 0),
299 * cs and ss are loaded from MSRs.
305 /* Do syscall entry tracing */
308 movq $AUDIT_ARCH_X86_64, %rsi
309 call syscall_trace_enter_phase1
311 jnz tracesys_phase2 /* if needed, run the slow path */
312 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
313 movq ORIG_RAX(%rsp), %rax
314 jmp system_call_fastpath /* and return to the fast path */
319 movq $AUDIT_ARCH_X86_64, %rsi
321 call syscall_trace_enter_phase2
324 * Reload registers from stack in case ptrace changed them.
325 * We don't reload %rax because syscall_trace_entry_phase2() returned
326 * the value it wants us to use in the table lookup.
328 RESTORE_C_REGS_EXCEPT_RAX
330 #if __SYSCALL_MASK == ~0
331 cmpq $__NR_syscall_max,%rax
333 andl $__SYSCALL_MASK,%eax
334 cmpl $__NR_syscall_max,%eax
336 ja int_ret_from_sys_call /* RAX(%rsp) is already set */
337 movq %r10,%rcx /* fixup for C */
338 call *sys_call_table(,%rax,8)
340 /* Use IRET because user could have changed pt_regs->foo */
343 * Syscall return path ending with IRET.
344 * Has correct iret frame.
346 GLOBAL(int_ret_from_sys_call)
347 DISABLE_INTERRUPTS(CLBR_NONE)
349 int_ret_from_sys_call_irqs_off:
350 movl $_TIF_ALLWORK_MASK,%edi
351 /* edi: mask to check */
352 GLOBAL(int_with_check)
354 GET_THREAD_INFO(%rcx)
355 movl TI_flags(%rcx),%edx
358 andl $~TS_COMPAT,TI_status(%rcx)
361 /* Either reschedule or signal or syscall exit tracking needed. */
362 /* First do a reschedule test. */
363 /* edx: work, edi: workmask */
365 bt $TIF_NEED_RESCHED,%edx
368 ENABLE_INTERRUPTS(CLBR_NONE)
372 DISABLE_INTERRUPTS(CLBR_NONE)
376 /* handle signals and tracing -- both require a full pt_regs */
379 ENABLE_INTERRUPTS(CLBR_NONE)
381 /* Check for syscall exit trace */
382 testl $_TIF_WORK_SYSCALL_EXIT,%edx
385 leaq 8(%rsp),%rdi # &ptregs -> arg1
386 call syscall_trace_leave
388 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
392 testl $_TIF_DO_NOTIFY_MASK,%edx
394 movq %rsp,%rdi # &ptregs -> arg1
395 xorl %esi,%esi # oldset -> arg2
396 call do_notify_resume
397 1: movl $_TIF_WORK_MASK,%edi
400 DISABLE_INTERRUPTS(CLBR_NONE)
406 .macro FORK_LIKE func
409 DEFAULT_FRAME 0, 8 /* offset 8: return address */
429 jmp int_ret_from_sys_call
441 jmp int_ret_from_sys_call
446 * sigreturn is special because it needs to restore all registers on return.
447 * This cannot be done with SYSRET, so use the IRET return path instead.
449 ENTRY(stub_rt_sigreturn)
454 call sys_rt_sigreturn
455 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
457 jmp int_ret_from_sys_call
459 END(stub_rt_sigreturn)
461 #ifdef CONFIG_X86_X32_ABI
462 ENTRY(stub_x32_rt_sigreturn)
467 call sys32_x32_rt_sigreturn
468 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
470 jmp int_ret_from_sys_call
472 END(stub_x32_rt_sigreturn)
474 ENTRY(stub_x32_execve)
479 call compat_sys_execve
482 jmp int_ret_from_sys_call
486 ENTRY(stub_x32_execveat)
491 call compat_sys_execveat
494 jmp int_ret_from_sys_call
496 END(stub_x32_execveat)
501 * A newly forked process directly context switches into this address.
503 * rdi: prev task we switched from
508 LOCK ; btr $TIF_FORK,TI_flags(%r8)
511 popfq_cfi # reset kernel eflags
513 call schedule_tail # rdi: 'prev' task parameter
515 GET_THREAD_INFO(%rcx)
519 testl $3,CS(%rsp) # from kernel_thread?
523 * By the time we get here, we have no idea whether our pt_regs,
524 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
525 * the slow path, or one of the ia32entry paths.
526 * Use int_ret_from_sys_call to return, since it can safely handle
529 jmp int_ret_from_sys_call
536 jmp int_ret_from_sys_call
541 * Build the entry stubs and pointer table with some assembler magic.
542 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
543 * single cache line on all modern x86 implementations.
545 .section .init.rodata,"a"
549 .p2align CONFIG_X86_L1_CACHE_SHIFT
550 ENTRY(irq_entries_start)
552 vector=FIRST_EXTERNAL_VECTOR
553 .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
556 .if vector < FIRST_SYSTEM_VECTOR
557 .if vector <> FIRST_EXTERNAL_VECTOR
558 CFI_ADJUST_CFA_OFFSET -8
560 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
561 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
570 2: jmp common_interrupt
573 END(irq_entries_start)
580 * Interrupt entry/exit.
582 * Interrupt entry points save only callee clobbered registers in fast path.
584 * Entry runs with interrupts off.
587 /* 0(%rsp): ~(interrupt number) */
588 .macro interrupt func
591 * Since nothing in interrupt handling code touches r12...r15 members
592 * of "struct pt_regs", and since interrupts can nest, we can save
593 * four stack slots and simultaneously provide
594 * an unwind-friendly stack layout by saving "truncated" pt_regs
595 * exactly up to rbp slot, without these members.
597 ALLOC_PT_GPREGS_ON_STACK -RBP
599 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
600 SAVE_EXTRA_REGS_RBP -RBP
602 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
604 testl $3, CS-RBP(%rsp)
609 * Save previous stack pointer, optionally switch to interrupt stack.
610 * irq_count is used to check if a CPU is already on an interrupt stack
611 * or not. While this is essentially redundant with preempt_count it is
612 * a little cheaper to use a separate counter in the PDA (short of
613 * moving irq_enter into assembly, which would be too much work)
616 incl PER_CPU_VAR(irq_count)
617 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
618 CFI_DEF_CFA_REGISTER rsi
622 * "CFA (Current Frame Address) is the value on stack + offset"
624 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
625 0x77 /* DW_OP_breg7 (rsp) */, 0, \
626 0x06 /* DW_OP_deref */, \
627 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
628 0x22 /* DW_OP_plus */
629 /* We entered an interrupt context - irqs are off: */
636 * The interrupt stubs push (~vector+0x80) onto the stack and
637 * then jump to common_interrupt.
639 .p2align CONFIG_X86_L1_CACHE_SHIFT
643 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
645 /* 0(%rsp): old RSP */
647 DISABLE_INTERRUPTS(CLBR_NONE)
649 decl PER_CPU_VAR(irq_count)
651 /* Restore saved previous stack */
653 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
654 /* return code expects complete pt_regs - adjust rsp accordingly: */
656 CFI_DEF_CFA_REGISTER rsp
657 CFI_ADJUST_CFA_OFFSET RBP
660 GET_THREAD_INFO(%rcx)
664 /* Interrupt came from user space */
666 * Has a correct top of stack.
667 * %rcx: thread info. Interrupts off.
669 retint_with_reschedule:
670 movl $_TIF_WORK_MASK,%edi
673 movl TI_flags(%rcx),%edx
678 retint_swapgs: /* return to user-space */
680 * The iretq could re-enable interrupts:
682 DISABLE_INTERRUPTS(CLBR_ANY)
686 * Try to use SYSRET instead of IRET if we're returning to
687 * a completely clean 64-bit userspace context.
690 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
691 jne opportunistic_sysret_failed
694 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
695 * in kernel space. This essentially lets the user take over
696 * the kernel, since userspace controls RSP. It's not worth
697 * testing for canonicalness exactly -- this check detects any
698 * of the 17 high bits set, which is true for non-canonical
699 * or kernel addresses. (This will pessimize vsyscall=native.
702 * If virtual addresses ever become wider, this will need
703 * to be updated to remain correct on both old and new CPUs.
705 .ifne __VIRTUAL_MASK_SHIFT - 47
706 .error "virtual address width changed -- sysret checks need update"
708 shr $__VIRTUAL_MASK_SHIFT, %rcx
709 jnz opportunistic_sysret_failed
711 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
712 jne opportunistic_sysret_failed
715 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
716 jne opportunistic_sysret_failed
718 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
719 jnz opportunistic_sysret_failed
721 /* nothing to check for RSP */
723 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
724 jne opportunistic_sysret_failed
727 * We win! This label is here just for ease of understanding
728 * perf profiles. Nothing jumps here.
730 irq_return_via_sysret:
732 /* r11 is already restored (see code above) */
733 RESTORE_C_REGS_EXCEPT_R11
738 opportunistic_sysret_failed:
742 retint_restore_args: /* return to kernel space */
743 DISABLE_INTERRUPTS(CLBR_ANY)
745 * The iretq could re-enable interrupts:
750 REMOVE_PT_GPREGS_FROM_STACK 8
757 * Are we returning to a stack segment from the LDT? Note: in
758 * 64-bit mode SS:RSP on the exception stack is always valid.
760 #ifdef CONFIG_X86_ESPFIX64
761 testb $4,(SS-RIP)(%rsp)
762 jnz native_irq_return_ldt
765 .global native_irq_return_iret
766 native_irq_return_iret:
768 * This may fault. Non-paranoid faults on return to userspace are
769 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
770 * Double-faults due to espfix64 are handled in do_double_fault.
771 * Other faults here are fatal.
775 #ifdef CONFIG_X86_ESPFIX64
776 native_irq_return_ldt:
780 movq PER_CPU_VAR(espfix_waddr),%rdi
781 movq %rax,(0*8)(%rdi) /* RAX */
782 movq (2*8)(%rsp),%rax /* RIP */
783 movq %rax,(1*8)(%rdi)
784 movq (3*8)(%rsp),%rax /* CS */
785 movq %rax,(2*8)(%rdi)
786 movq (4*8)(%rsp),%rax /* RFLAGS */
787 movq %rax,(3*8)(%rdi)
788 movq (6*8)(%rsp),%rax /* SS */
789 movq %rax,(5*8)(%rdi)
790 movq (5*8)(%rsp),%rax /* RSP */
791 movq %rax,(4*8)(%rdi)
792 andl $0xffff0000,%eax
794 orq PER_CPU_VAR(espfix_stack),%rax
798 jmp native_irq_return_iret
801 /* edi: workmask, edx: work */
804 bt $TIF_NEED_RESCHED,%edx
807 ENABLE_INTERRUPTS(CLBR_NONE)
811 GET_THREAD_INFO(%rcx)
812 DISABLE_INTERRUPTS(CLBR_NONE)
817 testl $_TIF_DO_NOTIFY_MASK,%edx
820 ENABLE_INTERRUPTS(CLBR_NONE)
822 movq $-1,ORIG_RAX(%rsp)
823 xorl %esi,%esi # oldset
824 movq %rsp,%rdi # &pt_regs
825 call do_notify_resume
827 DISABLE_INTERRUPTS(CLBR_NONE)
829 GET_THREAD_INFO(%rcx)
830 jmp retint_with_reschedule
832 #ifdef CONFIG_PREEMPT
833 /* Returning to kernel space. Check if we need preemption */
834 /* rcx: threadinfo. interrupts off. */
836 cmpl $0,PER_CPU_VAR(__preempt_count)
837 jnz retint_restore_args
838 bt $9,EFLAGS(%rsp) /* interrupts off? */
839 jnc retint_restore_args
840 call preempt_schedule_irq
844 END(common_interrupt)
849 .macro apicinterrupt3 num sym do_sym
861 #ifdef CONFIG_TRACING
862 #define trace(sym) trace_##sym
863 #define smp_trace(sym) smp_trace_##sym
865 .macro trace_apicinterrupt num sym
866 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
869 .macro trace_apicinterrupt num sym do_sym
873 .macro apicinterrupt num sym do_sym
874 apicinterrupt3 \num \sym \do_sym
875 trace_apicinterrupt \num \sym
879 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
880 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
881 apicinterrupt3 REBOOT_VECTOR \
882 reboot_interrupt smp_reboot_interrupt
886 apicinterrupt3 UV_BAU_MESSAGE \
887 uv_bau_message_intr1 uv_bau_message_interrupt
889 apicinterrupt LOCAL_TIMER_VECTOR \
890 apic_timer_interrupt smp_apic_timer_interrupt
891 apicinterrupt X86_PLATFORM_IPI_VECTOR \
892 x86_platform_ipi smp_x86_platform_ipi
894 #ifdef CONFIG_HAVE_KVM
895 apicinterrupt3 POSTED_INTR_VECTOR \
896 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
899 #ifdef CONFIG_X86_MCE_THRESHOLD
900 apicinterrupt THRESHOLD_APIC_VECTOR \
901 threshold_interrupt smp_threshold_interrupt
904 #ifdef CONFIG_X86_THERMAL_VECTOR
905 apicinterrupt THERMAL_APIC_VECTOR \
906 thermal_interrupt smp_thermal_interrupt
910 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
911 call_function_single_interrupt smp_call_function_single_interrupt
912 apicinterrupt CALL_FUNCTION_VECTOR \
913 call_function_interrupt smp_call_function_interrupt
914 apicinterrupt RESCHEDULE_VECTOR \
915 reschedule_interrupt smp_reschedule_interrupt
918 apicinterrupt ERROR_APIC_VECTOR \
919 error_interrupt smp_error_interrupt
920 apicinterrupt SPURIOUS_APIC_VECTOR \
921 spurious_interrupt smp_spurious_interrupt
923 #ifdef CONFIG_IRQ_WORK
924 apicinterrupt IRQ_WORK_VECTOR \
925 irq_work_interrupt smp_irq_work_interrupt
929 * Exception entry points.
931 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
933 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
936 .if \shift_ist != -1 && \paranoid == 0
937 .error "using shift_ist requires paranoid=1"
947 PARAVIRT_ADJUST_EXCEPTION_FRAME
949 .ifeq \has_error_code
950 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
953 ALLOC_PT_GPREGS_ON_STACK
958 testl $3, CS(%rsp) /* If coming from userspace, switch */
965 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
971 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
977 movq %rsp,%rdi /* pt_regs pointer */
980 movq ORIG_RAX(%rsp),%rsi /* get error code */
981 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
983 xorl %esi,%esi /* no error code */
987 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
993 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
996 /* these procedures expect "no swapgs" flag in ebx */
1006 * Paranoid entry from userspace. Switch stacks and treat it
1007 * as a normal entry. This means that paranoid handlers
1008 * run in real process context if user_mode(regs).
1015 movq %rsp,%rdi /* pt_regs pointer */
1017 movq %rax,%rsp /* switch stack */
1019 movq %rsp,%rdi /* pt_regs pointer */
1022 movq ORIG_RAX(%rsp),%rsi /* get error code */
1023 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1025 xorl %esi,%esi /* no error code */
1030 jmp error_exit /* %ebx: no swapgs flag */
1037 #ifdef CONFIG_TRACING
1038 .macro trace_idtentry sym do_sym has_error_code:req
1039 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1040 idtentry \sym \do_sym has_error_code=\has_error_code
1043 .macro trace_idtentry sym do_sym has_error_code:req
1044 idtentry \sym \do_sym has_error_code=\has_error_code
1048 idtentry divide_error do_divide_error has_error_code=0
1049 idtentry overflow do_overflow has_error_code=0
1050 idtentry bounds do_bounds has_error_code=0
1051 idtentry invalid_op do_invalid_op has_error_code=0
1052 idtentry device_not_available do_device_not_available has_error_code=0
1053 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1054 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1055 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1056 idtentry segment_not_present do_segment_not_present has_error_code=1
1057 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1058 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1059 idtentry alignment_check do_alignment_check has_error_code=1
1060 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1063 /* Reload gs selector with exception handling */
1064 /* edi: new selector */
1065 ENTRY(native_load_gs_index)
1068 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1072 2: mfence /* workaround */
1077 END(native_load_gs_index)
1079 _ASM_EXTABLE(gs_change,bad_gs)
1080 .section .fixup,"ax"
1081 /* running with kernelgs */
1083 SWAPGS /* switch back to user gs */
1089 /* Call softirq on interrupt stack. Interrupts are off. */
1090 ENTRY(do_softirq_own_stack)
1093 CFI_REL_OFFSET rbp,0
1095 CFI_DEF_CFA_REGISTER rbp
1096 incl PER_CPU_VAR(irq_count)
1097 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1098 push %rbp # backlink for old unwinder
1102 CFI_DEF_CFA_REGISTER rsp
1103 CFI_ADJUST_CFA_OFFSET -8
1104 decl PER_CPU_VAR(irq_count)
1107 END(do_softirq_own_stack)
1110 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1113 * A note on the "critical region" in our callback handler.
1114 * We want to avoid stacking callback handlers due to events occurring
1115 * during handling of the last event. To do this, we keep events disabled
1116 * until we've done all processing. HOWEVER, we must enable events before
1117 * popping the stack frame (can't be done atomically) and so it would still
1118 * be possible to get enough handler activations to overflow the stack.
1119 * Although unlikely, bugs of that kind are hard to track down, so we'd
1120 * like to avoid the possibility.
1121 * So, on entry to the handler we detect whether we interrupted an
1122 * existing activation in its critical region -- if so, we pop the current
1123 * activation and restart the handler using the previous one.
1125 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1128 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1129 * see the correct pointer to the pt_regs
1131 movq %rdi, %rsp # we don't return, adjust the stack frame
1134 11: incl PER_CPU_VAR(irq_count)
1136 CFI_DEF_CFA_REGISTER rbp
1137 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1138 pushq %rbp # backlink for old unwinder
1139 call xen_evtchn_do_upcall
1141 CFI_DEF_CFA_REGISTER rsp
1142 decl PER_CPU_VAR(irq_count)
1143 #ifndef CONFIG_PREEMPT
1144 call xen_maybe_preempt_hcall
1148 END(xen_do_hypervisor_callback)
1151 * Hypervisor uses this for application faults while it executes.
1152 * We get here for two reasons:
1153 * 1. Fault while reloading DS, ES, FS or GS
1154 * 2. Fault while executing IRET
1155 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1156 * registers that could be reloaded and zeroed the others.
1157 * Category 2 we fix up by killing the current process. We cannot use the
1158 * normal Linux return path in this case because if we use the IRET hypercall
1159 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1160 * We distinguish between categories by comparing each saved segment register
1161 * with its current contents: any discrepancy means we in category 1.
1163 ENTRY(xen_failsafe_callback)
1165 /*CFI_REL_OFFSET gs,GS*/
1166 /*CFI_REL_OFFSET fs,FS*/
1167 /*CFI_REL_OFFSET es,ES*/
1168 /*CFI_REL_OFFSET ds,DS*/
1169 CFI_REL_OFFSET r11,8
1170 CFI_REL_OFFSET rcx,0
1184 /* All segments match their saved values => Category 2 (Bad IRET). */
1190 CFI_ADJUST_CFA_OFFSET -0x30
1191 pushq_cfi $0 /* RIP */
1194 jmp general_protection
1196 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1202 CFI_ADJUST_CFA_OFFSET -0x30
1203 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1204 ALLOC_PT_GPREGS_ON_STACK
1209 END(xen_failsafe_callback)
1211 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1212 xen_hvm_callback_vector xen_evtchn_do_upcall
1214 #endif /* CONFIG_XEN */
1216 #if IS_ENABLED(CONFIG_HYPERV)
1217 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1218 hyperv_callback_vector hyperv_vector_handler
1219 #endif /* CONFIG_HYPERV */
1221 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1222 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1223 idtentry stack_segment do_stack_segment has_error_code=1
1225 idtentry xen_debug do_debug has_error_code=0
1226 idtentry xen_int3 do_int3 has_error_code=0
1227 idtentry xen_stack_segment do_stack_segment has_error_code=1
1229 idtentry general_protection do_general_protection has_error_code=1
1230 trace_idtentry page_fault do_page_fault has_error_code=1
1231 #ifdef CONFIG_KVM_GUEST
1232 idtentry async_page_fault do_async_page_fault has_error_code=1
1234 #ifdef CONFIG_X86_MCE
1235 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1239 * Save all registers in pt_regs, and switch gs if needed.
1240 * Use slow, but surefire "are we in kernel?" check.
1241 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1243 ENTRY(paranoid_entry)
1249 movl $MSR_GS_BASE,%ecx
1252 js 1f /* negative -> in kernel */
1260 * "Paranoid" exit path from exception stack. This is invoked
1261 * only on return from non-NMI IST interrupts that came
1262 * from kernel space.
1264 * We may be returning to very strange contexts (e.g. very early
1265 * in syscall entry), so checking for preemption here would
1266 * be complicated. Fortunately, we there's no good reason
1267 * to try to handle preemption here.
1269 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1270 ENTRY(paranoid_exit)
1272 DISABLE_INTERRUPTS(CLBR_NONE)
1273 TRACE_IRQS_OFF_DEBUG
1274 testl %ebx,%ebx /* swapgs needed? */
1275 jnz paranoid_exit_no_swapgs
1278 jmp paranoid_exit_restore
1279 paranoid_exit_no_swapgs:
1280 TRACE_IRQS_IRETQ_DEBUG
1281 paranoid_exit_restore:
1284 REMOVE_PT_GPREGS_FROM_STACK 8
1290 * Save all registers in pt_regs, and switch gs if needed.
1291 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1300 je error_kernelspace
1308 * There are two places in the kernel that can potentially fault with
1309 * usergs. Handle them here. B stepping K8s sometimes report a
1310 * truncated RIP for IRET exceptions returning to compat mode. Check
1311 * for these here too.
1314 CFI_REL_OFFSET rcx, RCX+8
1316 leaq native_irq_return_iret(%rip),%rcx
1317 cmpq %rcx,RIP+8(%rsp)
1319 movl %ecx,%eax /* zero extend */
1320 cmpq %rax,RIP+8(%rsp)
1322 cmpq $gs_change,RIP+8(%rsp)
1327 /* Fix truncated RIP */
1328 movq %rcx,RIP+8(%rsp)
1336 decl %ebx /* Return to usergs */
1342 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1347 DISABLE_INTERRUPTS(CLBR_NONE)
1349 GET_THREAD_INFO(%rcx)
1352 LOCKDEP_SYS_EXIT_IRQ
1353 movl TI_flags(%rcx),%edx
1354 movl $_TIF_WORK_MASK,%edi
1362 * Test if a given stack is an NMI stack or not.
1364 .macro test_in_nmi reg stack nmi_ret normal_ret
1367 subq $EXCEPTION_STKSZ, %\reg
1373 /* runs on exception stack */
1376 PARAVIRT_ADJUST_EXCEPTION_FRAME
1378 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1379 * the iretq it performs will take us out of NMI context.
1380 * This means that we can have nested NMIs where the next
1381 * NMI is using the top of the stack of the previous NMI. We
1382 * can't let it execute because the nested NMI will corrupt the
1383 * stack of the previous NMI. NMI handlers are not re-entrant
1386 * To handle this case we do the following:
1387 * Check the a special location on the stack that contains
1388 * a variable that is set when NMIs are executing.
1389 * The interrupted task's stack is also checked to see if it
1391 * If the variable is not set and the stack is not the NMI
1393 * o Set the special variable on the stack
1394 * o Copy the interrupt frame into a "saved" location on the stack
1395 * o Copy the interrupt frame into a "copy" location on the stack
1396 * o Continue processing the NMI
1397 * If the variable is set or the previous stack is the NMI stack:
1398 * o Modify the "copy" location to jump to the repeate_nmi
1399 * o return back to the first NMI
1401 * Now on exit of the first NMI, we first clear the stack variable
1402 * The NMI stack will tell any nested NMIs at that point that it is
1403 * nested. Then we pop the stack normally with iret, and if there was
1404 * a nested NMI that updated the copy interrupt stack frame, a
1405 * jump will be made to the repeat_nmi code that will handle the second
1409 /* Use %rdx as our temp variable throughout */
1411 CFI_REL_OFFSET rdx, 0
1414 * If %cs was not the kernel segment, then the NMI triggered in user
1415 * space, which means it is definitely not nested.
1417 cmpl $__KERNEL_CS, 16(%rsp)
1421 * Check the special variable on the stack to see if NMIs are
1428 * Now test if the previous stack was an NMI stack.
1429 * We need the double check. We check the NMI stack to satisfy the
1430 * race when the first NMI clears the variable before returning.
1431 * We check the variable because the first NMI could be in a
1432 * breakpoint routine using a breakpoint stack.
1435 test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
1440 * Do nothing if we interrupted the fixup in repeat_nmi.
1441 * It's about to repeat the NMI handler, so we are fine
1442 * with ignoring this one.
1444 movq $repeat_nmi, %rdx
1447 movq $end_repeat_nmi, %rdx
1452 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1453 leaq -1*8(%rsp), %rdx
1455 CFI_ADJUST_CFA_OFFSET 1*8
1456 leaq -10*8(%rsp), %rdx
1457 pushq_cfi $__KERNEL_DS
1460 pushq_cfi $__KERNEL_CS
1461 pushq_cfi $repeat_nmi
1463 /* Put stack back */
1465 CFI_ADJUST_CFA_OFFSET -6*8
1471 /* No need to check faults here */
1477 * Because nested NMIs will use the pushed location that we
1478 * stored in rdx, we must keep that space available.
1479 * Here's what our stack frame will look like:
1480 * +-------------------------+
1482 * | original Return RSP |
1483 * | original RFLAGS |
1486 * +-------------------------+
1487 * | temp storage for rdx |
1488 * +-------------------------+
1489 * | NMI executing variable |
1490 * +-------------------------+
1492 * | copied Return RSP |
1496 * +-------------------------+
1498 * | Saved Return RSP |
1502 * +-------------------------+
1504 * +-------------------------+
1506 * The saved stack frame is used to fix up the copied stack frame
1507 * that a nested NMI may change to make the interrupted NMI iret jump
1508 * to the repeat_nmi. The original stack frame and the temp storage
1509 * is also used by nested NMIs and can not be trusted on exit.
1511 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1515 /* Set the NMI executing variable on the stack. */
1519 * Leave room for the "copied" frame
1522 CFI_ADJUST_CFA_OFFSET 5*8
1524 /* Copy the stack frame to the Saved frame */
1526 pushq_cfi 11*8(%rsp)
1528 CFI_DEF_CFA_OFFSET 5*8
1530 /* Everything up to here is safe from nested NMIs */
1533 * If there was a nested NMI, the first NMI's iret will return
1534 * here. But NMIs are still enabled and we can take another
1535 * nested NMI. The nested NMI checks the interrupted RIP to see
1536 * if it is between repeat_nmi and end_repeat_nmi, and if so
1537 * it will just return, as we are about to repeat an NMI anyway.
1538 * This makes it safe to copy to the stack frame that a nested
1543 * Update the stack variable to say we are still in NMI (the update
1544 * is benign for the non-repeat case, where 1 was pushed just above
1545 * to this very stack slot).
1549 /* Make another copy, this one may be modified by nested NMIs */
1551 CFI_ADJUST_CFA_OFFSET -10*8
1553 pushq_cfi -6*8(%rsp)
1556 CFI_DEF_CFA_OFFSET 5*8
1560 * Everything below this point can be preempted by a nested
1561 * NMI if the first NMI took an exception and reset our iret stack
1562 * so that we repeat another NMI.
1564 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1565 ALLOC_PT_GPREGS_ON_STACK
1568 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1569 * as we should not be calling schedule in NMI context.
1570 * Even with normal interrupts enabled. An NMI should not be
1571 * setting NEED_RESCHED or anything that normal interrupts and
1572 * exceptions might do.
1578 * Save off the CR2 register. If we take a page fault in the NMI then
1579 * it could corrupt the CR2 value. If the NMI preempts a page fault
1580 * handler before it was able to read the CR2 register, and then the
1581 * NMI itself takes a page fault, the page fault that was preempted
1582 * will read the information from the NMI page fault and not the
1583 * origin fault. Save it off and restore it if it changes.
1584 * Use the r12 callee-saved register.
1588 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1593 /* Did the NMI take a page fault? Restore cr2 if it did */
1600 testl %ebx,%ebx /* swapgs needed? */
1607 /* Pop the extra iret frame at once */
1608 REMOVE_PT_GPREGS_FROM_STACK 6*8
1610 /* Clear the NMI executing stack variable */
1616 ENTRY(ignore_sysret)