2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
26 * - idtentry - Define exception entry points.
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
31 #include <asm/cache.h>
32 #include <asm/errno.h>
33 #include <asm/dwarf2.h>
34 #include <asm/calling.h>
35 #include <asm/asm-offsets.h>
37 #include <asm/unistd.h>
38 #include <asm/thread_info.h>
39 #include <asm/hw_irq.h>
40 #include <asm/page_types.h>
41 #include <asm/irqflags.h>
42 #include <asm/paravirt.h>
43 #include <asm/percpu.h>
45 #include <asm/context_tracking.h>
47 #include <asm/pgtable_types.h>
48 #include <linux/err.h>
50 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51 #include <linux/elf-em.h>
52 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53 #define __AUDIT_ARCH_64BIT 0x80000000
54 #define __AUDIT_ARCH_LE 0x40000000
57 .section .entry.text, "ax"
60 #ifdef CONFIG_PARAVIRT
61 ENTRY(native_usergs_sysret64)
64 ENDPROC(native_usergs_sysret64)
65 #endif /* CONFIG_PARAVIRT */
68 .macro TRACE_IRQS_IRETQ
69 #ifdef CONFIG_TRACE_IRQFLAGS
70 bt $9,EFLAGS(%rsp) /* interrupts off? */
78 * When dynamic function tracer is enabled it will add a breakpoint
79 * to all locations that it is about to modify, sync CPUs, update
80 * all the code, sync CPUs, then remove the breakpoints. In this time
81 * if lockdep is enabled, it might jump back into the debug handler
82 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
84 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
85 * make sure the stack pointer does not get reset back to the top
86 * of the debug stack, and instead just reuses the current stack.
88 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
90 .macro TRACE_IRQS_OFF_DEBUG
91 call debug_stack_set_zero
93 call debug_stack_reset
96 .macro TRACE_IRQS_ON_DEBUG
97 call debug_stack_set_zero
99 call debug_stack_reset
102 .macro TRACE_IRQS_IRETQ_DEBUG
103 bt $9,EFLAGS(%rsp) /* interrupts off? */
110 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
111 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
112 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
118 .macro EMPTY_FRAME start=1 offset=0
122 CFI_DEF_CFA rsp,8+\offset
124 CFI_DEF_CFA_OFFSET 8+\offset
129 * initial frame state for interrupts (and exceptions without error code)
131 .macro INTR_FRAME start=1 offset=0
132 EMPTY_FRAME \start, 5*8+\offset
133 /*CFI_REL_OFFSET ss, 4*8+\offset*/
134 CFI_REL_OFFSET rsp, 3*8+\offset
135 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
136 /*CFI_REL_OFFSET cs, 1*8+\offset*/
137 CFI_REL_OFFSET rip, 0*8+\offset
141 * initial frame state for exceptions with error code (and interrupts
142 * with vector already pushed)
144 .macro XCPT_FRAME start=1 offset=0
145 INTR_FRAME \start, 1*8+\offset
149 * frame that enables passing a complete pt_regs to a C function.
151 .macro DEFAULT_FRAME start=1 offset=0
152 XCPT_FRAME \start, ORIG_RAX+\offset
153 CFI_REL_OFFSET rdi, RDI+\offset
154 CFI_REL_OFFSET rsi, RSI+\offset
155 CFI_REL_OFFSET rdx, RDX+\offset
156 CFI_REL_OFFSET rcx, RCX+\offset
157 CFI_REL_OFFSET rax, RAX+\offset
158 CFI_REL_OFFSET r8, R8+\offset
159 CFI_REL_OFFSET r9, R9+\offset
160 CFI_REL_OFFSET r10, R10+\offset
161 CFI_REL_OFFSET r11, R11+\offset
162 CFI_REL_OFFSET rbx, RBX+\offset
163 CFI_REL_OFFSET rbp, RBP+\offset
164 CFI_REL_OFFSET r12, R12+\offset
165 CFI_REL_OFFSET r13, R13+\offset
166 CFI_REL_OFFSET r14, R14+\offset
167 CFI_REL_OFFSET r15, R15+\offset
171 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
173 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
174 * then loads new ss, cs, and rip from previously programmed MSRs.
175 * rflags gets masked by a value from another MSR (so CLD and CLAC
176 * are not needed). SYSCALL does not save anything on the stack
177 * and does not change rsp.
179 * Registers on entry:
180 * rax system call number
182 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
186 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
189 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
191 * Only called from user space.
193 * When user can change pt_regs->foo always force IRET. That is because
194 * it deals with uncanonical addresses better. SYSRET has trouble
195 * with them due to bugs in both AMD and Intel CPUs.
203 /*CFI_REGISTER rflags,r11*/
206 * Interrupts are off on entry.
207 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
208 * it is too small to ever cause noticeable irq latency.
212 * A hypervisor implementation might want to use a label
213 * after the swapgs, so that it can do the swapgs
214 * for the guest and jump here on syscall.
216 GLOBAL(system_call_after_swapgs)
218 movq %rsp,PER_CPU_VAR(rsp_scratch)
219 movq PER_CPU_VAR(kernel_stack),%rsp
221 /* Construct struct pt_regs on stack */
222 pushq_cfi $__USER_DS /* pt_regs->ss */
223 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
225 * Re-enable interrupts.
226 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
227 * must execute atomically in the face of possible interrupt-driven
228 * task preemption. We must enable interrupts only after we're done
229 * with using rsp_scratch:
231 ENABLE_INTERRUPTS(CLBR_NONE)
232 pushq_cfi %r11 /* pt_regs->flags */
233 pushq_cfi $__USER_CS /* pt_regs->cs */
234 pushq_cfi %rcx /* pt_regs->ip */
236 pushq_cfi_reg rax /* pt_regs->orig_ax */
237 pushq_cfi_reg rdi /* pt_regs->di */
238 pushq_cfi_reg rsi /* pt_regs->si */
239 pushq_cfi_reg rdx /* pt_regs->dx */
240 pushq_cfi_reg rcx /* pt_regs->cx */
241 pushq_cfi $-ENOSYS /* pt_regs->ax */
242 pushq_cfi_reg r8 /* pt_regs->r8 */
243 pushq_cfi_reg r9 /* pt_regs->r9 */
244 pushq_cfi_reg r10 /* pt_regs->r10 */
245 pushq_cfi_reg r11 /* pt_regs->r11 */
246 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
247 CFI_ADJUST_CFA_OFFSET 6*8
249 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
251 system_call_fastpath:
252 #if __SYSCALL_MASK == ~0
253 cmpq $__NR_syscall_max,%rax
255 andl $__SYSCALL_MASK,%eax
256 cmpl $__NR_syscall_max,%eax
258 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
260 call *sys_call_table(,%rax,8)
264 * Syscall return path ending with SYSRET (fast path).
265 * Has incompletely filled pt_regs.
269 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
270 * it is too small to ever cause noticeable irq latency.
272 DISABLE_INTERRUPTS(CLBR_NONE)
275 * We must check ti flags with interrupts (or at least preemption)
276 * off because we must *never* return to userspace without
277 * processing exit work that is enqueued if we're preempted here.
278 * In particular, returning to userspace with any of the one-shot
279 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
282 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
283 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
287 RESTORE_C_REGS_EXCEPT_RCX_R11
290 movq EFLAGS(%rsp),%r11
291 /*CFI_REGISTER rflags,r11*/
294 * 64bit SYSRET restores rip from rcx,
295 * rflags from r11 (but RF and VM bits are forced to 0),
296 * cs and ss are loaded from MSRs.
297 * Restoration of rflags re-enables interrupts.
303 /* Do syscall entry tracing */
306 movl $AUDIT_ARCH_X86_64, %esi
307 call syscall_trace_enter_phase1
309 jnz tracesys_phase2 /* if needed, run the slow path */
310 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
311 movq ORIG_RAX(%rsp), %rax
312 jmp system_call_fastpath /* and return to the fast path */
317 movl $AUDIT_ARCH_X86_64, %esi
319 call syscall_trace_enter_phase2
322 * Reload registers from stack in case ptrace changed them.
323 * We don't reload %rax because syscall_trace_entry_phase2() returned
324 * the value it wants us to use in the table lookup.
326 RESTORE_C_REGS_EXCEPT_RAX
328 #if __SYSCALL_MASK == ~0
329 cmpq $__NR_syscall_max,%rax
331 andl $__SYSCALL_MASK,%eax
332 cmpl $__NR_syscall_max,%eax
334 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
335 movq %r10,%rcx /* fixup for C */
336 call *sys_call_table(,%rax,8)
339 /* Use IRET because user could have changed pt_regs->foo */
342 * Syscall return path ending with IRET.
343 * Has correct iret frame.
345 GLOBAL(int_ret_from_sys_call)
346 DISABLE_INTERRUPTS(CLBR_NONE)
347 int_ret_from_sys_call_irqs_off: /* jumps come here from the irqs-off SYSRET path */
349 movl $_TIF_ALLWORK_MASK,%edi
350 /* edi: mask to check */
351 GLOBAL(int_with_check)
353 GET_THREAD_INFO(%rcx)
354 movl TI_flags(%rcx),%edx
357 andl $~TS_COMPAT,TI_status(%rcx)
360 /* Either reschedule or signal or syscall exit tracking needed. */
361 /* First do a reschedule test. */
362 /* edx: work, edi: workmask */
364 bt $TIF_NEED_RESCHED,%edx
367 ENABLE_INTERRUPTS(CLBR_NONE)
371 DISABLE_INTERRUPTS(CLBR_NONE)
375 /* handle signals and tracing -- both require a full pt_regs */
378 ENABLE_INTERRUPTS(CLBR_NONE)
380 /* Check for syscall exit trace */
381 testl $_TIF_WORK_SYSCALL_EXIT,%edx
384 leaq 8(%rsp),%rdi # &ptregs -> arg1
385 call syscall_trace_leave
387 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
391 testl $_TIF_DO_NOTIFY_MASK,%edx
393 movq %rsp,%rdi # &ptregs -> arg1
394 xorl %esi,%esi # oldset -> arg2
395 call do_notify_resume
396 1: movl $_TIF_WORK_MASK,%edi
399 DISABLE_INTERRUPTS(CLBR_NONE)
404 /* The IRETQ could re-enable interrupts: */
405 DISABLE_INTERRUPTS(CLBR_ANY)
409 * Try to use SYSRET instead of IRET if we're returning to
410 * a completely clean 64-bit userspace context.
414 cmpq %rcx,%r11 /* RCX == RIP */
415 jne opportunistic_sysret_failed
418 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
419 * in kernel space. This essentially lets the user take over
420 * the kernel, since userspace controls RSP.
422 * If width of "canonical tail" ever becomes variable, this will need
423 * to be updated to remain correct on both old and new CPUs.
425 .ifne __VIRTUAL_MASK_SHIFT - 47
426 .error "virtual address width changed -- SYSRET checks need update"
428 /* Change top 16 bits to be the sign-extension of 47th bit */
429 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
430 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
431 /* If this changed %rcx, it was not canonical */
433 jne opportunistic_sysret_failed
435 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
436 jne opportunistic_sysret_failed
439 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
440 jne opportunistic_sysret_failed
443 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
444 * restoring TF results in a trap from userspace immediately after
445 * SYSRET. This would cause an infinite loop whenever #DB happens
446 * with register state that satisfies the opportunistic SYSRET
447 * conditions. For example, single-stepping this user code:
449 * movq $stuck_here,%rcx
454 * would never get past 'stuck_here'.
456 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
457 jnz opportunistic_sysret_failed
459 /* nothing to check for RSP */
461 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
462 jne opportunistic_sysret_failed
465 * We win! This label is here just for ease of understanding
466 * perf profiles. Nothing jumps here.
468 syscall_return_via_sysret:
470 /* rcx and r11 are already restored (see code above) */
471 RESTORE_C_REGS_EXCEPT_RCX_R11
476 opportunistic_sysret_failed:
478 jmp restore_c_regs_and_iret
483 .macro FORK_LIKE func
486 DEFAULT_FRAME 0, 8 /* offset 8: return address */
504 /* exec failed, can use fast SYSRET code path in this case */
507 /* must use IRET code path (pt_regs->cs may have changed) */
509 CFI_ADJUST_CFA_OFFSET -8
512 jmp int_ret_from_sys_call
516 * Remaining execve stubs are only 7 bytes long.
517 * ENTRY() often aligns to 16 bytes, which in this case has no benefits.
520 GLOBAL(stub_execveat)
524 jmp return_from_execve
528 #if defined(CONFIG_X86_X32_ABI) || defined(CONFIG_IA32_EMULATION)
530 GLOBAL(stub_x32_execve)
531 GLOBAL(stub32_execve)
534 call compat_sys_execve
535 jmp return_from_execve
540 GLOBAL(stub_x32_execveat)
541 GLOBAL(stub32_execveat)
544 call compat_sys_execveat
545 jmp return_from_execve
548 END(stub_x32_execveat)
552 * sigreturn is special because it needs to restore all registers on return.
553 * This cannot be done with SYSRET, so use the IRET return path instead.
555 ENTRY(stub_rt_sigreturn)
559 * SAVE_EXTRA_REGS result is not normally needed:
560 * sigreturn overwrites all pt_regs->GPREGS.
561 * But sigreturn can fail (!), and there is no easy way to detect that.
562 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error,
563 * we SAVE_EXTRA_REGS here.
566 call sys_rt_sigreturn
569 CFI_ADJUST_CFA_OFFSET -8
572 jmp int_ret_from_sys_call
574 END(stub_rt_sigreturn)
576 #ifdef CONFIG_X86_X32_ABI
577 ENTRY(stub_x32_rt_sigreturn)
581 call sys32_x32_rt_sigreturn
584 END(stub_x32_rt_sigreturn)
588 * A newly forked process directly context switches into this address.
590 * rdi: prev task we switched from
595 LOCK ; btr $TIF_FORK,TI_flags(%r8)
598 popfq_cfi # reset kernel eflags
600 call schedule_tail # rdi: 'prev' task parameter
604 testl $3,CS(%rsp) # from kernel_thread?
607 * By the time we get here, we have no idea whether our pt_regs,
608 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
609 * the slow path, or one of the ia32entry paths.
610 * Use IRET code path to return, since it can safely handle
613 jnz int_ret_from_sys_call
615 /* We came from kernel_thread */
616 /* nb: we depend on RESTORE_EXTRA_REGS above */
621 jmp int_ret_from_sys_call
626 * Build the entry stubs with some assembler magic.
627 * We pack 1 stub into every 8-byte block.
630 ENTRY(irq_entries_start)
632 vector=FIRST_EXTERNAL_VECTOR
633 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
634 pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
637 CFI_ADJUST_CFA_OFFSET -8
641 END(irq_entries_start)
644 * Interrupt entry/exit.
646 * Interrupt entry points save only callee clobbered registers in fast path.
648 * Entry runs with interrupts off.
651 /* 0(%rsp): ~(interrupt number) */
652 .macro interrupt func
655 * Since nothing in interrupt handling code touches r12...r15 members
656 * of "struct pt_regs", and since interrupts can nest, we can save
657 * four stack slots and simultaneously provide
658 * an unwind-friendly stack layout by saving "truncated" pt_regs
659 * exactly up to rbp slot, without these members.
661 ALLOC_PT_GPREGS_ON_STACK -RBP
663 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
664 SAVE_EXTRA_REGS_RBP -RBP
666 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
668 testl $3, CS-RBP(%rsp)
673 * Save previous stack pointer, optionally switch to interrupt stack.
674 * irq_count is used to check if a CPU is already on an interrupt stack
675 * or not. While this is essentially redundant with preempt_count it is
676 * a little cheaper to use a separate counter in the PDA (short of
677 * moving irq_enter into assembly, which would be too much work)
680 incl PER_CPU_VAR(irq_count)
681 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
682 CFI_DEF_CFA_REGISTER rsi
686 * "CFA (Current Frame Address) is the value on stack + offset"
688 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
689 0x77 /* DW_OP_breg7 (rsp) */, 0, \
690 0x06 /* DW_OP_deref */, \
691 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
692 0x22 /* DW_OP_plus */
693 /* We entered an interrupt context - irqs are off: */
700 * The interrupt stubs push (~vector+0x80) onto the stack and
701 * then jump to common_interrupt.
703 .p2align CONFIG_X86_L1_CACHE_SHIFT
707 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
709 /* 0(%rsp): old RSP */
711 DISABLE_INTERRUPTS(CLBR_NONE)
713 decl PER_CPU_VAR(irq_count)
715 /* Restore saved previous stack */
717 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
718 /* return code expects complete pt_regs - adjust rsp accordingly: */
720 CFI_DEF_CFA_REGISTER rsp
721 CFI_ADJUST_CFA_OFFSET RBP
725 /* Interrupt came from user space */
727 GET_THREAD_INFO(%rcx)
729 * %rcx: thread info. Interrupts off.
731 retint_with_reschedule:
732 movl $_TIF_WORK_MASK,%edi
735 movl TI_flags(%rcx),%edx
740 retint_swapgs: /* return to user-space */
742 * The iretq could re-enable interrupts:
744 DISABLE_INTERRUPTS(CLBR_ANY)
748 jmp restore_c_regs_and_iret
750 /* Returning to kernel space */
752 #ifdef CONFIG_PREEMPT
753 /* Interrupts are off */
754 /* Check if we need preemption */
755 bt $9,EFLAGS(%rsp) /* interrupts were off? */
757 0: cmpl $0,PER_CPU_VAR(__preempt_count)
759 call preempt_schedule_irq
764 * The iretq could re-enable interrupts:
769 * At this label, code paths which return to kernel and to user,
770 * which come from interrupts/exception and from syscalls, merge.
772 restore_c_regs_and_iret:
774 REMOVE_PT_GPREGS_FROM_STACK 8
781 * Are we returning to a stack segment from the LDT? Note: in
782 * 64-bit mode SS:RSP on the exception stack is always valid.
784 #ifdef CONFIG_X86_ESPFIX64
785 testb $4,(SS-RIP)(%rsp)
786 jnz native_irq_return_ldt
789 .global native_irq_return_iret
790 native_irq_return_iret:
792 * This may fault. Non-paranoid faults on return to userspace are
793 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
794 * Double-faults due to espfix64 are handled in do_double_fault.
795 * Other faults here are fatal.
799 #ifdef CONFIG_X86_ESPFIX64
800 native_irq_return_ldt:
804 movq PER_CPU_VAR(espfix_waddr),%rdi
805 movq %rax,(0*8)(%rdi) /* RAX */
806 movq (2*8)(%rsp),%rax /* RIP */
807 movq %rax,(1*8)(%rdi)
808 movq (3*8)(%rsp),%rax /* CS */
809 movq %rax,(2*8)(%rdi)
810 movq (4*8)(%rsp),%rax /* RFLAGS */
811 movq %rax,(3*8)(%rdi)
812 movq (6*8)(%rsp),%rax /* SS */
813 movq %rax,(5*8)(%rdi)
814 movq (5*8)(%rsp),%rax /* RSP */
815 movq %rax,(4*8)(%rdi)
816 andl $0xffff0000,%eax
818 orq PER_CPU_VAR(espfix_stack),%rax
822 jmp native_irq_return_iret
825 /* edi: workmask, edx: work */
828 bt $TIF_NEED_RESCHED,%edx
831 ENABLE_INTERRUPTS(CLBR_NONE)
835 GET_THREAD_INFO(%rcx)
836 DISABLE_INTERRUPTS(CLBR_NONE)
841 testl $_TIF_DO_NOTIFY_MASK,%edx
844 ENABLE_INTERRUPTS(CLBR_NONE)
846 movq $-1,ORIG_RAX(%rsp)
847 xorl %esi,%esi # oldset
848 movq %rsp,%rdi # &pt_regs
849 call do_notify_resume
851 DISABLE_INTERRUPTS(CLBR_NONE)
853 GET_THREAD_INFO(%rcx)
854 jmp retint_with_reschedule
857 END(common_interrupt)
862 .macro apicinterrupt3 num sym do_sym
874 #ifdef CONFIG_TRACING
875 #define trace(sym) trace_##sym
876 #define smp_trace(sym) smp_trace_##sym
878 .macro trace_apicinterrupt num sym
879 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
882 .macro trace_apicinterrupt num sym do_sym
886 .macro apicinterrupt num sym do_sym
887 apicinterrupt3 \num \sym \do_sym
888 trace_apicinterrupt \num \sym
892 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
893 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
894 apicinterrupt3 REBOOT_VECTOR \
895 reboot_interrupt smp_reboot_interrupt
899 apicinterrupt3 UV_BAU_MESSAGE \
900 uv_bau_message_intr1 uv_bau_message_interrupt
902 apicinterrupt LOCAL_TIMER_VECTOR \
903 apic_timer_interrupt smp_apic_timer_interrupt
904 apicinterrupt X86_PLATFORM_IPI_VECTOR \
905 x86_platform_ipi smp_x86_platform_ipi
907 #ifdef CONFIG_HAVE_KVM
908 apicinterrupt3 POSTED_INTR_VECTOR \
909 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
912 #ifdef CONFIG_X86_MCE_THRESHOLD
913 apicinterrupt THRESHOLD_APIC_VECTOR \
914 threshold_interrupt smp_threshold_interrupt
917 #ifdef CONFIG_X86_THERMAL_VECTOR
918 apicinterrupt THERMAL_APIC_VECTOR \
919 thermal_interrupt smp_thermal_interrupt
923 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
924 call_function_single_interrupt smp_call_function_single_interrupt
925 apicinterrupt CALL_FUNCTION_VECTOR \
926 call_function_interrupt smp_call_function_interrupt
927 apicinterrupt RESCHEDULE_VECTOR \
928 reschedule_interrupt smp_reschedule_interrupt
931 apicinterrupt ERROR_APIC_VECTOR \
932 error_interrupt smp_error_interrupt
933 apicinterrupt SPURIOUS_APIC_VECTOR \
934 spurious_interrupt smp_spurious_interrupt
936 #ifdef CONFIG_IRQ_WORK
937 apicinterrupt IRQ_WORK_VECTOR \
938 irq_work_interrupt smp_irq_work_interrupt
942 * Exception entry points.
944 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
946 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
949 .if \shift_ist != -1 && \paranoid == 0
950 .error "using shift_ist requires paranoid=1"
960 PARAVIRT_ADJUST_EXCEPTION_FRAME
962 .ifeq \has_error_code
963 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
966 ALLOC_PT_GPREGS_ON_STACK
971 testl $3, CS(%rsp) /* If coming from userspace, switch */
978 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
984 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
990 movq %rsp,%rdi /* pt_regs pointer */
993 movq ORIG_RAX(%rsp),%rsi /* get error code */
994 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
996 xorl %esi,%esi /* no error code */
1000 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1005 .if \shift_ist != -1
1006 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1009 /* these procedures expect "no swapgs" flag in ebx */
1019 * Paranoid entry from userspace. Switch stacks and treat it
1020 * as a normal entry. This means that paranoid handlers
1021 * run in real process context if user_mode(regs).
1028 movq %rsp,%rdi /* pt_regs pointer */
1030 movq %rax,%rsp /* switch stack */
1032 movq %rsp,%rdi /* pt_regs pointer */
1035 movq ORIG_RAX(%rsp),%rsi /* get error code */
1036 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1038 xorl %esi,%esi /* no error code */
1043 jmp error_exit /* %ebx: no swapgs flag */
1050 #ifdef CONFIG_TRACING
1051 .macro trace_idtentry sym do_sym has_error_code:req
1052 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1053 idtentry \sym \do_sym has_error_code=\has_error_code
1056 .macro trace_idtentry sym do_sym has_error_code:req
1057 idtentry \sym \do_sym has_error_code=\has_error_code
1061 idtentry divide_error do_divide_error has_error_code=0
1062 idtentry overflow do_overflow has_error_code=0
1063 idtentry bounds do_bounds has_error_code=0
1064 idtentry invalid_op do_invalid_op has_error_code=0
1065 idtentry device_not_available do_device_not_available has_error_code=0
1066 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1067 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1068 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1069 idtentry segment_not_present do_segment_not_present has_error_code=1
1070 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1071 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1072 idtentry alignment_check do_alignment_check has_error_code=1
1073 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1076 /* Reload gs selector with exception handling */
1077 /* edi: new selector */
1078 ENTRY(native_load_gs_index)
1081 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1085 2: mfence /* workaround */
1090 END(native_load_gs_index)
1092 _ASM_EXTABLE(gs_change,bad_gs)
1093 .section .fixup,"ax"
1094 /* running with kernelgs */
1096 SWAPGS /* switch back to user gs */
1102 /* Call softirq on interrupt stack. Interrupts are off. */
1103 ENTRY(do_softirq_own_stack)
1106 CFI_REL_OFFSET rbp,0
1108 CFI_DEF_CFA_REGISTER rbp
1109 incl PER_CPU_VAR(irq_count)
1110 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1111 push %rbp # backlink for old unwinder
1115 CFI_DEF_CFA_REGISTER rsp
1116 CFI_ADJUST_CFA_OFFSET -8
1117 decl PER_CPU_VAR(irq_count)
1120 END(do_softirq_own_stack)
1123 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1126 * A note on the "critical region" in our callback handler.
1127 * We want to avoid stacking callback handlers due to events occurring
1128 * during handling of the last event. To do this, we keep events disabled
1129 * until we've done all processing. HOWEVER, we must enable events before
1130 * popping the stack frame (can't be done atomically) and so it would still
1131 * be possible to get enough handler activations to overflow the stack.
1132 * Although unlikely, bugs of that kind are hard to track down, so we'd
1133 * like to avoid the possibility.
1134 * So, on entry to the handler we detect whether we interrupted an
1135 * existing activation in its critical region -- if so, we pop the current
1136 * activation and restart the handler using the previous one.
1138 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1141 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1142 * see the correct pointer to the pt_regs
1144 movq %rdi, %rsp # we don't return, adjust the stack frame
1147 11: incl PER_CPU_VAR(irq_count)
1149 CFI_DEF_CFA_REGISTER rbp
1150 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1151 pushq %rbp # backlink for old unwinder
1152 call xen_evtchn_do_upcall
1154 CFI_DEF_CFA_REGISTER rsp
1155 decl PER_CPU_VAR(irq_count)
1156 #ifndef CONFIG_PREEMPT
1157 call xen_maybe_preempt_hcall
1161 END(xen_do_hypervisor_callback)
1164 * Hypervisor uses this for application faults while it executes.
1165 * We get here for two reasons:
1166 * 1. Fault while reloading DS, ES, FS or GS
1167 * 2. Fault while executing IRET
1168 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1169 * registers that could be reloaded and zeroed the others.
1170 * Category 2 we fix up by killing the current process. We cannot use the
1171 * normal Linux return path in this case because if we use the IRET hypercall
1172 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1173 * We distinguish between categories by comparing each saved segment register
1174 * with its current contents: any discrepancy means we in category 1.
1176 ENTRY(xen_failsafe_callback)
1178 /*CFI_REL_OFFSET gs,GS*/
1179 /*CFI_REL_OFFSET fs,FS*/
1180 /*CFI_REL_OFFSET es,ES*/
1181 /*CFI_REL_OFFSET ds,DS*/
1182 CFI_REL_OFFSET r11,8
1183 CFI_REL_OFFSET rcx,0
1197 /* All segments match their saved values => Category 2 (Bad IRET). */
1203 CFI_ADJUST_CFA_OFFSET -0x30
1204 pushq_cfi $0 /* RIP */
1207 jmp general_protection
1209 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1215 CFI_ADJUST_CFA_OFFSET -0x30
1216 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1217 ALLOC_PT_GPREGS_ON_STACK
1222 END(xen_failsafe_callback)
1224 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1225 xen_hvm_callback_vector xen_evtchn_do_upcall
1227 #endif /* CONFIG_XEN */
1229 #if IS_ENABLED(CONFIG_HYPERV)
1230 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1231 hyperv_callback_vector hyperv_vector_handler
1232 #endif /* CONFIG_HYPERV */
1234 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1235 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1236 idtentry stack_segment do_stack_segment has_error_code=1
1238 idtentry xen_debug do_debug has_error_code=0
1239 idtentry xen_int3 do_int3 has_error_code=0
1240 idtentry xen_stack_segment do_stack_segment has_error_code=1
1242 idtentry general_protection do_general_protection has_error_code=1
1243 trace_idtentry page_fault do_page_fault has_error_code=1
1244 #ifdef CONFIG_KVM_GUEST
1245 idtentry async_page_fault do_async_page_fault has_error_code=1
1247 #ifdef CONFIG_X86_MCE
1248 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1252 * Save all registers in pt_regs, and switch gs if needed.
1253 * Use slow, but surefire "are we in kernel?" check.
1254 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1256 ENTRY(paranoid_entry)
1262 movl $MSR_GS_BASE,%ecx
1265 js 1f /* negative -> in kernel */
1273 * "Paranoid" exit path from exception stack. This is invoked
1274 * only on return from non-NMI IST interrupts that came
1275 * from kernel space.
1277 * We may be returning to very strange contexts (e.g. very early
1278 * in syscall entry), so checking for preemption here would
1279 * be complicated. Fortunately, we there's no good reason
1280 * to try to handle preemption here.
1282 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1283 ENTRY(paranoid_exit)
1285 DISABLE_INTERRUPTS(CLBR_NONE)
1286 TRACE_IRQS_OFF_DEBUG
1287 testl %ebx,%ebx /* swapgs needed? */
1288 jnz paranoid_exit_no_swapgs
1291 jmp paranoid_exit_restore
1292 paranoid_exit_no_swapgs:
1293 TRACE_IRQS_IRETQ_DEBUG
1294 paranoid_exit_restore:
1297 REMOVE_PT_GPREGS_FROM_STACK 8
1303 * Save all registers in pt_regs, and switch gs if needed.
1304 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1313 je error_kernelspace
1321 * There are two places in the kernel that can potentially fault with
1322 * usergs. Handle them here. B stepping K8s sometimes report a
1323 * truncated RIP for IRET exceptions returning to compat mode. Check
1324 * for these here too.
1327 CFI_REL_OFFSET rcx, RCX+8
1329 leaq native_irq_return_iret(%rip),%rcx
1330 cmpq %rcx,RIP+8(%rsp)
1332 movl %ecx,%eax /* zero extend */
1333 cmpq %rax,RIP+8(%rsp)
1335 cmpq $gs_change,RIP+8(%rsp)
1340 /* Fix truncated RIP */
1341 movq %rcx,RIP+8(%rsp)
1349 decl %ebx /* Return to usergs */
1355 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1360 DISABLE_INTERRUPTS(CLBR_NONE)
1362 GET_THREAD_INFO(%rcx)
1365 LOCKDEP_SYS_EXIT_IRQ
1366 movl TI_flags(%rcx),%edx
1367 movl $_TIF_WORK_MASK,%edi
1374 /* Runs on exception stack */
1377 PARAVIRT_ADJUST_EXCEPTION_FRAME
1379 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1380 * the iretq it performs will take us out of NMI context.
1381 * This means that we can have nested NMIs where the next
1382 * NMI is using the top of the stack of the previous NMI. We
1383 * can't let it execute because the nested NMI will corrupt the
1384 * stack of the previous NMI. NMI handlers are not re-entrant
1387 * To handle this case we do the following:
1388 * Check the a special location on the stack that contains
1389 * a variable that is set when NMIs are executing.
1390 * The interrupted task's stack is also checked to see if it
1392 * If the variable is not set and the stack is not the NMI
1394 * o Set the special variable on the stack
1395 * o Copy the interrupt frame into a "saved" location on the stack
1396 * o Copy the interrupt frame into a "copy" location on the stack
1397 * o Continue processing the NMI
1398 * If the variable is set or the previous stack is the NMI stack:
1399 * o Modify the "copy" location to jump to the repeate_nmi
1400 * o return back to the first NMI
1402 * Now on exit of the first NMI, we first clear the stack variable
1403 * The NMI stack will tell any nested NMIs at that point that it is
1404 * nested. Then we pop the stack normally with iret, and if there was
1405 * a nested NMI that updated the copy interrupt stack frame, a
1406 * jump will be made to the repeat_nmi code that will handle the second
1410 /* Use %rdx as our temp variable throughout */
1412 CFI_REL_OFFSET rdx, 0
1415 * If %cs was not the kernel segment, then the NMI triggered in user
1416 * space, which means it is definitely not nested.
1418 cmpl $__KERNEL_CS, 16(%rsp)
1422 * Check the special variable on the stack to see if NMIs are
1429 * Now test if the previous stack was an NMI stack.
1430 * We need the double check. We check the NMI stack to satisfy the
1431 * race when the first NMI clears the variable before returning.
1432 * We check the variable because the first NMI could be in a
1433 * breakpoint routine using a breakpoint stack.
1436 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1437 cmpq %rdx, 4*8(%rsp)
1438 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1440 subq $EXCEPTION_STKSZ, %rdx
1441 cmpq %rdx, 4*8(%rsp)
1442 /* If it is below the NMI stack, it is a normal NMI */
1444 /* Ah, it is within the NMI stack, treat it as nested */
1450 * Do nothing if we interrupted the fixup in repeat_nmi.
1451 * It's about to repeat the NMI handler, so we are fine
1452 * with ignoring this one.
1454 movq $repeat_nmi, %rdx
1457 movq $end_repeat_nmi, %rdx
1462 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1463 leaq -1*8(%rsp), %rdx
1465 CFI_ADJUST_CFA_OFFSET 1*8
1466 leaq -10*8(%rsp), %rdx
1467 pushq_cfi $__KERNEL_DS
1470 pushq_cfi $__KERNEL_CS
1471 pushq_cfi $repeat_nmi
1473 /* Put stack back */
1475 CFI_ADJUST_CFA_OFFSET -6*8
1481 /* No need to check faults here */
1487 * Because nested NMIs will use the pushed location that we
1488 * stored in rdx, we must keep that space available.
1489 * Here's what our stack frame will look like:
1490 * +-------------------------+
1492 * | original Return RSP |
1493 * | original RFLAGS |
1496 * +-------------------------+
1497 * | temp storage for rdx |
1498 * +-------------------------+
1499 * | NMI executing variable |
1500 * +-------------------------+
1502 * | copied Return RSP |
1506 * +-------------------------+
1508 * | Saved Return RSP |
1512 * +-------------------------+
1514 * +-------------------------+
1516 * The saved stack frame is used to fix up the copied stack frame
1517 * that a nested NMI may change to make the interrupted NMI iret jump
1518 * to the repeat_nmi. The original stack frame and the temp storage
1519 * is also used by nested NMIs and can not be trusted on exit.
1521 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1525 /* Set the NMI executing variable on the stack. */
1529 * Leave room for the "copied" frame
1532 CFI_ADJUST_CFA_OFFSET 5*8
1534 /* Copy the stack frame to the Saved frame */
1536 pushq_cfi 11*8(%rsp)
1538 CFI_DEF_CFA_OFFSET 5*8
1540 /* Everything up to here is safe from nested NMIs */
1543 * If there was a nested NMI, the first NMI's iret will return
1544 * here. But NMIs are still enabled and we can take another
1545 * nested NMI. The nested NMI checks the interrupted RIP to see
1546 * if it is between repeat_nmi and end_repeat_nmi, and if so
1547 * it will just return, as we are about to repeat an NMI anyway.
1548 * This makes it safe to copy to the stack frame that a nested
1553 * Update the stack variable to say we are still in NMI (the update
1554 * is benign for the non-repeat case, where 1 was pushed just above
1555 * to this very stack slot).
1559 /* Make another copy, this one may be modified by nested NMIs */
1561 CFI_ADJUST_CFA_OFFSET -10*8
1563 pushq_cfi -6*8(%rsp)
1566 CFI_DEF_CFA_OFFSET 5*8
1570 * Everything below this point can be preempted by a nested
1571 * NMI if the first NMI took an exception and reset our iret stack
1572 * so that we repeat another NMI.
1574 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1575 ALLOC_PT_GPREGS_ON_STACK
1578 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1579 * as we should not be calling schedule in NMI context.
1580 * Even with normal interrupts enabled. An NMI should not be
1581 * setting NEED_RESCHED or anything that normal interrupts and
1582 * exceptions might do.
1588 * Save off the CR2 register. If we take a page fault in the NMI then
1589 * it could corrupt the CR2 value. If the NMI preempts a page fault
1590 * handler before it was able to read the CR2 register, and then the
1591 * NMI itself takes a page fault, the page fault that was preempted
1592 * will read the information from the NMI page fault and not the
1593 * origin fault. Save it off and restore it if it changes.
1594 * Use the r12 callee-saved register.
1598 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1603 /* Did the NMI take a page fault? Restore cr2 if it did */
1610 testl %ebx,%ebx /* swapgs needed? */
1617 /* Pop the extra iret frame at once */
1618 REMOVE_PT_GPREGS_FROM_STACK 6*8
1620 /* Clear the NMI executing stack variable */
1626 ENTRY(ignore_sysret)