2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
26 * - idtentry - Define exception entry points.
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
31 #include <asm/cache.h>
32 #include <asm/errno.h>
33 #include <asm/dwarf2.h>
34 #include <asm/calling.h>
35 #include <asm/asm-offsets.h>
37 #include <asm/unistd.h>
38 #include <asm/thread_info.h>
39 #include <asm/hw_irq.h>
40 #include <asm/page_types.h>
41 #include <asm/irqflags.h>
42 #include <asm/paravirt.h>
43 #include <asm/percpu.h>
45 #include <asm/context_tracking.h>
47 #include <asm/pgtable_types.h>
48 #include <linux/err.h>
50 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51 #include <linux/elf-em.h>
52 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53 #define __AUDIT_ARCH_64BIT 0x80000000
54 #define __AUDIT_ARCH_LE 0x40000000
57 .section .entry.text, "ax"
60 #ifdef CONFIG_PARAVIRT
61 ENTRY(native_usergs_sysret64)
64 ENDPROC(native_usergs_sysret64)
65 #endif /* CONFIG_PARAVIRT */
68 .macro TRACE_IRQS_IRETQ
69 #ifdef CONFIG_TRACE_IRQFLAGS
70 bt $9,EFLAGS(%rsp) /* interrupts off? */
78 * When dynamic function tracer is enabled it will add a breakpoint
79 * to all locations that it is about to modify, sync CPUs, update
80 * all the code, sync CPUs, then remove the breakpoints. In this time
81 * if lockdep is enabled, it might jump back into the debug handler
82 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
84 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
85 * make sure the stack pointer does not get reset back to the top
86 * of the debug stack, and instead just reuses the current stack.
88 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
90 .macro TRACE_IRQS_OFF_DEBUG
91 call debug_stack_set_zero
93 call debug_stack_reset
96 .macro TRACE_IRQS_ON_DEBUG
97 call debug_stack_set_zero
99 call debug_stack_reset
102 .macro TRACE_IRQS_IRETQ_DEBUG
103 bt $9,EFLAGS(%rsp) /* interrupts off? */
110 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
111 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
112 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
118 .macro EMPTY_FRAME start=1 offset=0
122 CFI_DEF_CFA rsp,8+\offset
124 CFI_DEF_CFA_OFFSET 8+\offset
129 * initial frame state for interrupts (and exceptions without error code)
131 .macro INTR_FRAME start=1 offset=0
132 EMPTY_FRAME \start, 5*8+\offset
133 /*CFI_REL_OFFSET ss, 4*8+\offset*/
134 CFI_REL_OFFSET rsp, 3*8+\offset
135 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
136 /*CFI_REL_OFFSET cs, 1*8+\offset*/
137 CFI_REL_OFFSET rip, 0*8+\offset
141 * initial frame state for exceptions with error code (and interrupts
142 * with vector already pushed)
144 .macro XCPT_FRAME start=1 offset=0
145 INTR_FRAME \start, 1*8+\offset
149 * frame that enables passing a complete pt_regs to a C function.
151 .macro DEFAULT_FRAME start=1 offset=0
152 XCPT_FRAME \start, ORIG_RAX+\offset
153 CFI_REL_OFFSET rdi, RDI+\offset
154 CFI_REL_OFFSET rsi, RSI+\offset
155 CFI_REL_OFFSET rdx, RDX+\offset
156 CFI_REL_OFFSET rcx, RCX+\offset
157 CFI_REL_OFFSET rax, RAX+\offset
158 CFI_REL_OFFSET r8, R8+\offset
159 CFI_REL_OFFSET r9, R9+\offset
160 CFI_REL_OFFSET r10, R10+\offset
161 CFI_REL_OFFSET r11, R11+\offset
162 CFI_REL_OFFSET rbx, RBX+\offset
163 CFI_REL_OFFSET rbp, RBP+\offset
164 CFI_REL_OFFSET r12, R12+\offset
165 CFI_REL_OFFSET r13, R13+\offset
166 CFI_REL_OFFSET r14, R14+\offset
167 CFI_REL_OFFSET r15, R15+\offset
171 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
173 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
174 * then loads new ss, cs, and rip from previously programmed MSRs.
175 * rflags gets masked by a value from another MSR (so CLD and CLAC
176 * are not needed). SYSCALL does not save anything on the stack
177 * and does not change rsp.
179 * Registers on entry:
180 * rax system call number
182 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
186 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
189 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
191 * Only called from user space.
193 * When user can change pt_regs->foo always force IRET. That is because
194 * it deals with uncanonical addresses better. SYSRET has trouble
195 * with them due to bugs in both AMD and Intel CPUs.
203 /*CFI_REGISTER rflags,r11*/
206 * Interrupts are off on entry.
207 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
208 * it is too small to ever cause noticeable irq latency.
212 * A hypervisor implementation might want to use a label
213 * after the swapgs, so that it can do the swapgs
214 * for the guest and jump here on syscall.
216 GLOBAL(system_call_after_swapgs)
218 movq %rsp,PER_CPU_VAR(rsp_scratch)
219 movq PER_CPU_VAR(kernel_stack),%rsp
221 /* Construct struct pt_regs on stack */
222 pushq_cfi $__USER_DS /* pt_regs->ss */
223 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
225 * Re-enable interrupts.
226 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
227 * must execute atomically in the face of possible interrupt-driven
228 * task preemption. We must enable interrupts only after we're done
229 * with using rsp_scratch:
231 ENABLE_INTERRUPTS(CLBR_NONE)
232 pushq_cfi %r11 /* pt_regs->flags */
233 pushq_cfi $__USER_CS /* pt_regs->cs */
234 pushq_cfi %rcx /* pt_regs->ip */
236 pushq_cfi_reg rax /* pt_regs->orig_ax */
237 pushq_cfi_reg rdi /* pt_regs->di */
238 pushq_cfi_reg rsi /* pt_regs->si */
239 pushq_cfi_reg rdx /* pt_regs->dx */
240 pushq_cfi_reg rcx /* pt_regs->cx */
241 pushq_cfi $-ENOSYS /* pt_regs->ax */
242 pushq_cfi_reg r8 /* pt_regs->r8 */
243 pushq_cfi_reg r9 /* pt_regs->r9 */
244 pushq_cfi_reg r10 /* pt_regs->r10 */
245 pushq_cfi_reg r11 /* pt_regs->r11 */
246 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
247 CFI_ADJUST_CFA_OFFSET 6*8
249 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
251 system_call_fastpath:
252 #if __SYSCALL_MASK == ~0
253 cmpq $__NR_syscall_max,%rax
255 andl $__SYSCALL_MASK,%eax
256 cmpl $__NR_syscall_max,%eax
258 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
260 call *sys_call_table(,%rax,8)
264 * Syscall return path ending with SYSRET (fast path).
265 * Has incompletely filled pt_regs.
269 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
270 * it is too small to ever cause noticeable irq latency.
272 DISABLE_INTERRUPTS(CLBR_NONE)
275 * We must check ti flags with interrupts (or at least preemption)
276 * off because we must *never* return to userspace without
277 * processing exit work that is enqueued if we're preempted here.
278 * In particular, returning to userspace with any of the one-shot
279 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
282 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
283 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
287 RESTORE_C_REGS_EXCEPT_RCX_R11
290 movq EFLAGS(%rsp),%r11
291 /*CFI_REGISTER rflags,r11*/
294 * 64bit SYSRET restores rip from rcx,
295 * rflags from r11 (but RF and VM bits are forced to 0),
296 * cs and ss are loaded from MSRs.
297 * Restoration of rflags re-enables interrupts.
303 /* Do syscall entry tracing */
306 movl $AUDIT_ARCH_X86_64, %esi
307 call syscall_trace_enter_phase1
309 jnz tracesys_phase2 /* if needed, run the slow path */
310 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
311 movq ORIG_RAX(%rsp), %rax
312 jmp system_call_fastpath /* and return to the fast path */
317 movl $AUDIT_ARCH_X86_64, %esi
319 call syscall_trace_enter_phase2
322 * Reload registers from stack in case ptrace changed them.
323 * We don't reload %rax because syscall_trace_entry_phase2() returned
324 * the value it wants us to use in the table lookup.
326 RESTORE_C_REGS_EXCEPT_RAX
328 #if __SYSCALL_MASK == ~0
329 cmpq $__NR_syscall_max,%rax
331 andl $__SYSCALL_MASK,%eax
332 cmpl $__NR_syscall_max,%eax
334 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
335 movq %r10,%rcx /* fixup for C */
336 call *sys_call_table(,%rax,8)
339 /* Use IRET because user could have changed pt_regs->foo */
342 * Syscall return path ending with IRET.
343 * Has correct iret frame.
345 GLOBAL(int_ret_from_sys_call)
346 DISABLE_INTERRUPTS(CLBR_NONE)
347 int_ret_from_sys_call_irqs_off: /* jumps come here from the irqs-off SYSRET path */
349 movl $_TIF_ALLWORK_MASK,%edi
350 /* edi: mask to check */
351 GLOBAL(int_with_check)
353 GET_THREAD_INFO(%rcx)
354 movl TI_flags(%rcx),%edx
357 andl $~TS_COMPAT,TI_status(%rcx)
360 /* Either reschedule or signal or syscall exit tracking needed. */
361 /* First do a reschedule test. */
362 /* edx: work, edi: workmask */
364 bt $TIF_NEED_RESCHED,%edx
367 ENABLE_INTERRUPTS(CLBR_NONE)
371 DISABLE_INTERRUPTS(CLBR_NONE)
375 /* handle signals and tracing -- both require a full pt_regs */
378 ENABLE_INTERRUPTS(CLBR_NONE)
380 /* Check for syscall exit trace */
381 testl $_TIF_WORK_SYSCALL_EXIT,%edx
384 leaq 8(%rsp),%rdi # &ptregs -> arg1
385 call syscall_trace_leave
387 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
391 testl $_TIF_DO_NOTIFY_MASK,%edx
393 movq %rsp,%rdi # &ptregs -> arg1
394 xorl %esi,%esi # oldset -> arg2
395 call do_notify_resume
396 1: movl $_TIF_WORK_MASK,%edi
399 DISABLE_INTERRUPTS(CLBR_NONE)
405 .macro FORK_LIKE func
408 DEFAULT_FRAME 0, 8 /* offset 8: return address */
427 /* exec failed, can use fast SYSRET code path in this case */
430 /* must use IRET code path (pt_regs->cs may have changed) */
434 jmp int_ret_from_sys_call
442 jmp return_from_execve
447 * sigreturn is special because it needs to restore all registers on return.
448 * This cannot be done with SYSRET, so use the IRET return path instead.
450 ENTRY(stub_rt_sigreturn)
455 call sys_rt_sigreturn
456 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
458 jmp int_ret_from_sys_call
460 END(stub_rt_sigreturn)
462 #ifdef CONFIG_X86_X32_ABI
463 ENTRY(stub_x32_rt_sigreturn)
468 call sys32_x32_rt_sigreturn
469 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
471 jmp int_ret_from_sys_call
473 END(stub_x32_rt_sigreturn)
475 ENTRY(stub_x32_execve)
478 call compat_sys_execve
479 jmp return_from_execve
483 ENTRY(stub_x32_execveat)
486 call compat_sys_execveat
487 jmp return_from_execve
489 END(stub_x32_execveat)
494 * A newly forked process directly context switches into this address.
496 * rdi: prev task we switched from
501 LOCK ; btr $TIF_FORK,TI_flags(%r8)
504 popfq_cfi # reset kernel eflags
506 call schedule_tail # rdi: 'prev' task parameter
508 GET_THREAD_INFO(%rcx)
512 testl $3,CS(%rsp) # from kernel_thread?
516 * By the time we get here, we have no idea whether our pt_regs,
517 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
518 * the slow path, or one of the ia32entry paths.
519 * Use int_ret_from_sys_call to return, since it can safely handle
522 jmp int_ret_from_sys_call
529 jmp int_ret_from_sys_call
534 * Build the entry stubs and pointer table with some assembler magic.
535 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
536 * single cache line on all modern x86 implementations.
538 .section .init.rodata,"a"
542 .p2align CONFIG_X86_L1_CACHE_SHIFT
543 ENTRY(irq_entries_start)
545 vector=FIRST_EXTERNAL_VECTOR
546 .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
549 .if vector < FIRST_SYSTEM_VECTOR
550 .if vector <> FIRST_EXTERNAL_VECTOR
551 CFI_ADJUST_CFA_OFFSET -8
553 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
554 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
563 2: jmp common_interrupt
566 END(irq_entries_start)
573 * Interrupt entry/exit.
575 * Interrupt entry points save only callee clobbered registers in fast path.
577 * Entry runs with interrupts off.
580 /* 0(%rsp): ~(interrupt number) */
581 .macro interrupt func
584 * Since nothing in interrupt handling code touches r12...r15 members
585 * of "struct pt_regs", and since interrupts can nest, we can save
586 * four stack slots and simultaneously provide
587 * an unwind-friendly stack layout by saving "truncated" pt_regs
588 * exactly up to rbp slot, without these members.
590 ALLOC_PT_GPREGS_ON_STACK -RBP
592 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
593 SAVE_EXTRA_REGS_RBP -RBP
595 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
597 testl $3, CS-RBP(%rsp)
602 * Save previous stack pointer, optionally switch to interrupt stack.
603 * irq_count is used to check if a CPU is already on an interrupt stack
604 * or not. While this is essentially redundant with preempt_count it is
605 * a little cheaper to use a separate counter in the PDA (short of
606 * moving irq_enter into assembly, which would be too much work)
609 incl PER_CPU_VAR(irq_count)
610 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
611 CFI_DEF_CFA_REGISTER rsi
615 * "CFA (Current Frame Address) is the value on stack + offset"
617 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
618 0x77 /* DW_OP_breg7 (rsp) */, 0, \
619 0x06 /* DW_OP_deref */, \
620 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
621 0x22 /* DW_OP_plus */
622 /* We entered an interrupt context - irqs are off: */
629 * The interrupt stubs push (~vector+0x80) onto the stack and
630 * then jump to common_interrupt.
632 .p2align CONFIG_X86_L1_CACHE_SHIFT
636 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
638 /* 0(%rsp): old RSP */
640 DISABLE_INTERRUPTS(CLBR_NONE)
642 decl PER_CPU_VAR(irq_count)
644 /* Restore saved previous stack */
646 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
647 /* return code expects complete pt_regs - adjust rsp accordingly: */
649 CFI_DEF_CFA_REGISTER rsp
650 CFI_ADJUST_CFA_OFFSET RBP
654 /* Interrupt came from user space */
656 GET_THREAD_INFO(%rcx)
658 * %rcx: thread info. Interrupts off.
660 retint_with_reschedule:
661 movl $_TIF_WORK_MASK,%edi
664 movl TI_flags(%rcx),%edx
669 retint_swapgs: /* return to user-space */
671 * The iretq could re-enable interrupts:
673 DISABLE_INTERRUPTS(CLBR_ANY)
677 * Try to use SYSRET instead of IRET if we're returning to
678 * a completely clean 64-bit userspace context.
681 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
682 jne opportunistic_sysret_failed
685 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
686 * in kernel space. This essentially lets the user take over
687 * the kernel, since userspace controls RSP. It's not worth
688 * testing for canonicalness exactly -- this check detects any
689 * of the 17 high bits set, which is true for non-canonical
690 * or kernel addresses. (This will pessimize vsyscall=native.
693 * If virtual addresses ever become wider, this will need
694 * to be updated to remain correct on both old and new CPUs.
696 .ifne __VIRTUAL_MASK_SHIFT - 47
697 .error "virtual address width changed -- sysret checks need update"
699 shr $__VIRTUAL_MASK_SHIFT, %rcx
700 jnz opportunistic_sysret_failed
702 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
703 jne opportunistic_sysret_failed
706 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
707 jne opportunistic_sysret_failed
709 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
710 jnz opportunistic_sysret_failed
712 /* nothing to check for RSP */
714 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
715 jne opportunistic_sysret_failed
718 * We win! This label is here just for ease of understanding
719 * perf profiles. Nothing jumps here.
721 irq_return_via_sysret:
723 /* r11 is already restored (see code above) */
724 RESTORE_C_REGS_EXCEPT_R11
729 opportunistic_sysret_failed:
733 /* Returning to kernel space */
735 #ifdef CONFIG_PREEMPT
736 /* Interrupts are off */
737 /* Check if we need preemption */
738 bt $9,EFLAGS(%rsp) /* interrupts were off? */
740 0: cmpl $0,PER_CPU_VAR(__preempt_count)
742 call preempt_schedule_irq
747 * The iretq could re-enable interrupts:
752 REMOVE_PT_GPREGS_FROM_STACK 8
759 * Are we returning to a stack segment from the LDT? Note: in
760 * 64-bit mode SS:RSP on the exception stack is always valid.
762 #ifdef CONFIG_X86_ESPFIX64
763 testb $4,(SS-RIP)(%rsp)
764 jnz native_irq_return_ldt
767 .global native_irq_return_iret
768 native_irq_return_iret:
770 * This may fault. Non-paranoid faults on return to userspace are
771 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
772 * Double-faults due to espfix64 are handled in do_double_fault.
773 * Other faults here are fatal.
777 #ifdef CONFIG_X86_ESPFIX64
778 native_irq_return_ldt:
782 movq PER_CPU_VAR(espfix_waddr),%rdi
783 movq %rax,(0*8)(%rdi) /* RAX */
784 movq (2*8)(%rsp),%rax /* RIP */
785 movq %rax,(1*8)(%rdi)
786 movq (3*8)(%rsp),%rax /* CS */
787 movq %rax,(2*8)(%rdi)
788 movq (4*8)(%rsp),%rax /* RFLAGS */
789 movq %rax,(3*8)(%rdi)
790 movq (6*8)(%rsp),%rax /* SS */
791 movq %rax,(5*8)(%rdi)
792 movq (5*8)(%rsp),%rax /* RSP */
793 movq %rax,(4*8)(%rdi)
794 andl $0xffff0000,%eax
796 orq PER_CPU_VAR(espfix_stack),%rax
800 jmp native_irq_return_iret
803 /* edi: workmask, edx: work */
806 bt $TIF_NEED_RESCHED,%edx
809 ENABLE_INTERRUPTS(CLBR_NONE)
813 GET_THREAD_INFO(%rcx)
814 DISABLE_INTERRUPTS(CLBR_NONE)
819 testl $_TIF_DO_NOTIFY_MASK,%edx
822 ENABLE_INTERRUPTS(CLBR_NONE)
824 movq $-1,ORIG_RAX(%rsp)
825 xorl %esi,%esi # oldset
826 movq %rsp,%rdi # &pt_regs
827 call do_notify_resume
829 DISABLE_INTERRUPTS(CLBR_NONE)
831 GET_THREAD_INFO(%rcx)
832 jmp retint_with_reschedule
835 END(common_interrupt)
840 .macro apicinterrupt3 num sym do_sym
852 #ifdef CONFIG_TRACING
853 #define trace(sym) trace_##sym
854 #define smp_trace(sym) smp_trace_##sym
856 .macro trace_apicinterrupt num sym
857 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
860 .macro trace_apicinterrupt num sym do_sym
864 .macro apicinterrupt num sym do_sym
865 apicinterrupt3 \num \sym \do_sym
866 trace_apicinterrupt \num \sym
870 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
871 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
872 apicinterrupt3 REBOOT_VECTOR \
873 reboot_interrupt smp_reboot_interrupt
877 apicinterrupt3 UV_BAU_MESSAGE \
878 uv_bau_message_intr1 uv_bau_message_interrupt
880 apicinterrupt LOCAL_TIMER_VECTOR \
881 apic_timer_interrupt smp_apic_timer_interrupt
882 apicinterrupt X86_PLATFORM_IPI_VECTOR \
883 x86_platform_ipi smp_x86_platform_ipi
885 #ifdef CONFIG_HAVE_KVM
886 apicinterrupt3 POSTED_INTR_VECTOR \
887 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
890 #ifdef CONFIG_X86_MCE_THRESHOLD
891 apicinterrupt THRESHOLD_APIC_VECTOR \
892 threshold_interrupt smp_threshold_interrupt
895 #ifdef CONFIG_X86_THERMAL_VECTOR
896 apicinterrupt THERMAL_APIC_VECTOR \
897 thermal_interrupt smp_thermal_interrupt
901 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
902 call_function_single_interrupt smp_call_function_single_interrupt
903 apicinterrupt CALL_FUNCTION_VECTOR \
904 call_function_interrupt smp_call_function_interrupt
905 apicinterrupt RESCHEDULE_VECTOR \
906 reschedule_interrupt smp_reschedule_interrupt
909 apicinterrupt ERROR_APIC_VECTOR \
910 error_interrupt smp_error_interrupt
911 apicinterrupt SPURIOUS_APIC_VECTOR \
912 spurious_interrupt smp_spurious_interrupt
914 #ifdef CONFIG_IRQ_WORK
915 apicinterrupt IRQ_WORK_VECTOR \
916 irq_work_interrupt smp_irq_work_interrupt
920 * Exception entry points.
922 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
924 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
927 .if \shift_ist != -1 && \paranoid == 0
928 .error "using shift_ist requires paranoid=1"
938 PARAVIRT_ADJUST_EXCEPTION_FRAME
940 .ifeq \has_error_code
941 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
944 ALLOC_PT_GPREGS_ON_STACK
949 testl $3, CS(%rsp) /* If coming from userspace, switch */
956 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
962 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
968 movq %rsp,%rdi /* pt_regs pointer */
971 movq ORIG_RAX(%rsp),%rsi /* get error code */
972 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
974 xorl %esi,%esi /* no error code */
978 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
984 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
987 /* these procedures expect "no swapgs" flag in ebx */
997 * Paranoid entry from userspace. Switch stacks and treat it
998 * as a normal entry. This means that paranoid handlers
999 * run in real process context if user_mode(regs).
1006 movq %rsp,%rdi /* pt_regs pointer */
1008 movq %rax,%rsp /* switch stack */
1010 movq %rsp,%rdi /* pt_regs pointer */
1013 movq ORIG_RAX(%rsp),%rsi /* get error code */
1014 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1016 xorl %esi,%esi /* no error code */
1021 jmp error_exit /* %ebx: no swapgs flag */
1028 #ifdef CONFIG_TRACING
1029 .macro trace_idtentry sym do_sym has_error_code:req
1030 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1031 idtentry \sym \do_sym has_error_code=\has_error_code
1034 .macro trace_idtentry sym do_sym has_error_code:req
1035 idtentry \sym \do_sym has_error_code=\has_error_code
1039 idtentry divide_error do_divide_error has_error_code=0
1040 idtentry overflow do_overflow has_error_code=0
1041 idtentry bounds do_bounds has_error_code=0
1042 idtentry invalid_op do_invalid_op has_error_code=0
1043 idtentry device_not_available do_device_not_available has_error_code=0
1044 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1045 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1046 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1047 idtentry segment_not_present do_segment_not_present has_error_code=1
1048 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1049 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1050 idtentry alignment_check do_alignment_check has_error_code=1
1051 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1054 /* Reload gs selector with exception handling */
1055 /* edi: new selector */
1056 ENTRY(native_load_gs_index)
1059 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1063 2: mfence /* workaround */
1068 END(native_load_gs_index)
1070 _ASM_EXTABLE(gs_change,bad_gs)
1071 .section .fixup,"ax"
1072 /* running with kernelgs */
1074 SWAPGS /* switch back to user gs */
1080 /* Call softirq on interrupt stack. Interrupts are off. */
1081 ENTRY(do_softirq_own_stack)
1084 CFI_REL_OFFSET rbp,0
1086 CFI_DEF_CFA_REGISTER rbp
1087 incl PER_CPU_VAR(irq_count)
1088 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1089 push %rbp # backlink for old unwinder
1093 CFI_DEF_CFA_REGISTER rsp
1094 CFI_ADJUST_CFA_OFFSET -8
1095 decl PER_CPU_VAR(irq_count)
1098 END(do_softirq_own_stack)
1101 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1104 * A note on the "critical region" in our callback handler.
1105 * We want to avoid stacking callback handlers due to events occurring
1106 * during handling of the last event. To do this, we keep events disabled
1107 * until we've done all processing. HOWEVER, we must enable events before
1108 * popping the stack frame (can't be done atomically) and so it would still
1109 * be possible to get enough handler activations to overflow the stack.
1110 * Although unlikely, bugs of that kind are hard to track down, so we'd
1111 * like to avoid the possibility.
1112 * So, on entry to the handler we detect whether we interrupted an
1113 * existing activation in its critical region -- if so, we pop the current
1114 * activation and restart the handler using the previous one.
1116 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1119 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1120 * see the correct pointer to the pt_regs
1122 movq %rdi, %rsp # we don't return, adjust the stack frame
1125 11: incl PER_CPU_VAR(irq_count)
1127 CFI_DEF_CFA_REGISTER rbp
1128 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1129 pushq %rbp # backlink for old unwinder
1130 call xen_evtchn_do_upcall
1132 CFI_DEF_CFA_REGISTER rsp
1133 decl PER_CPU_VAR(irq_count)
1134 #ifndef CONFIG_PREEMPT
1135 call xen_maybe_preempt_hcall
1139 END(xen_do_hypervisor_callback)
1142 * Hypervisor uses this for application faults while it executes.
1143 * We get here for two reasons:
1144 * 1. Fault while reloading DS, ES, FS or GS
1145 * 2. Fault while executing IRET
1146 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1147 * registers that could be reloaded and zeroed the others.
1148 * Category 2 we fix up by killing the current process. We cannot use the
1149 * normal Linux return path in this case because if we use the IRET hypercall
1150 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1151 * We distinguish between categories by comparing each saved segment register
1152 * with its current contents: any discrepancy means we in category 1.
1154 ENTRY(xen_failsafe_callback)
1156 /*CFI_REL_OFFSET gs,GS*/
1157 /*CFI_REL_OFFSET fs,FS*/
1158 /*CFI_REL_OFFSET es,ES*/
1159 /*CFI_REL_OFFSET ds,DS*/
1160 CFI_REL_OFFSET r11,8
1161 CFI_REL_OFFSET rcx,0
1175 /* All segments match their saved values => Category 2 (Bad IRET). */
1181 CFI_ADJUST_CFA_OFFSET -0x30
1182 pushq_cfi $0 /* RIP */
1185 jmp general_protection
1187 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1193 CFI_ADJUST_CFA_OFFSET -0x30
1194 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1195 ALLOC_PT_GPREGS_ON_STACK
1200 END(xen_failsafe_callback)
1202 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1203 xen_hvm_callback_vector xen_evtchn_do_upcall
1205 #endif /* CONFIG_XEN */
1207 #if IS_ENABLED(CONFIG_HYPERV)
1208 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1209 hyperv_callback_vector hyperv_vector_handler
1210 #endif /* CONFIG_HYPERV */
1212 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1213 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1214 idtentry stack_segment do_stack_segment has_error_code=1
1216 idtentry xen_debug do_debug has_error_code=0
1217 idtentry xen_int3 do_int3 has_error_code=0
1218 idtentry xen_stack_segment do_stack_segment has_error_code=1
1220 idtentry general_protection do_general_protection has_error_code=1
1221 trace_idtentry page_fault do_page_fault has_error_code=1
1222 #ifdef CONFIG_KVM_GUEST
1223 idtentry async_page_fault do_async_page_fault has_error_code=1
1225 #ifdef CONFIG_X86_MCE
1226 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1230 * Save all registers in pt_regs, and switch gs if needed.
1231 * Use slow, but surefire "are we in kernel?" check.
1232 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1234 ENTRY(paranoid_entry)
1240 movl $MSR_GS_BASE,%ecx
1243 js 1f /* negative -> in kernel */
1251 * "Paranoid" exit path from exception stack. This is invoked
1252 * only on return from non-NMI IST interrupts that came
1253 * from kernel space.
1255 * We may be returning to very strange contexts (e.g. very early
1256 * in syscall entry), so checking for preemption here would
1257 * be complicated. Fortunately, we there's no good reason
1258 * to try to handle preemption here.
1260 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1261 ENTRY(paranoid_exit)
1263 DISABLE_INTERRUPTS(CLBR_NONE)
1264 TRACE_IRQS_OFF_DEBUG
1265 testl %ebx,%ebx /* swapgs needed? */
1266 jnz paranoid_exit_no_swapgs
1269 jmp paranoid_exit_restore
1270 paranoid_exit_no_swapgs:
1271 TRACE_IRQS_IRETQ_DEBUG
1272 paranoid_exit_restore:
1275 REMOVE_PT_GPREGS_FROM_STACK 8
1281 * Save all registers in pt_regs, and switch gs if needed.
1282 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1291 je error_kernelspace
1299 * There are two places in the kernel that can potentially fault with
1300 * usergs. Handle them here. B stepping K8s sometimes report a
1301 * truncated RIP for IRET exceptions returning to compat mode. Check
1302 * for these here too.
1305 CFI_REL_OFFSET rcx, RCX+8
1307 leaq native_irq_return_iret(%rip),%rcx
1308 cmpq %rcx,RIP+8(%rsp)
1310 movl %ecx,%eax /* zero extend */
1311 cmpq %rax,RIP+8(%rsp)
1313 cmpq $gs_change,RIP+8(%rsp)
1318 /* Fix truncated RIP */
1319 movq %rcx,RIP+8(%rsp)
1327 decl %ebx /* Return to usergs */
1333 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1338 DISABLE_INTERRUPTS(CLBR_NONE)
1340 GET_THREAD_INFO(%rcx)
1343 LOCKDEP_SYS_EXIT_IRQ
1344 movl TI_flags(%rcx),%edx
1345 movl $_TIF_WORK_MASK,%edi
1352 /* Runs on exception stack */
1355 PARAVIRT_ADJUST_EXCEPTION_FRAME
1357 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1358 * the iretq it performs will take us out of NMI context.
1359 * This means that we can have nested NMIs where the next
1360 * NMI is using the top of the stack of the previous NMI. We
1361 * can't let it execute because the nested NMI will corrupt the
1362 * stack of the previous NMI. NMI handlers are not re-entrant
1365 * To handle this case we do the following:
1366 * Check the a special location on the stack that contains
1367 * a variable that is set when NMIs are executing.
1368 * The interrupted task's stack is also checked to see if it
1370 * If the variable is not set and the stack is not the NMI
1372 * o Set the special variable on the stack
1373 * o Copy the interrupt frame into a "saved" location on the stack
1374 * o Copy the interrupt frame into a "copy" location on the stack
1375 * o Continue processing the NMI
1376 * If the variable is set or the previous stack is the NMI stack:
1377 * o Modify the "copy" location to jump to the repeate_nmi
1378 * o return back to the first NMI
1380 * Now on exit of the first NMI, we first clear the stack variable
1381 * The NMI stack will tell any nested NMIs at that point that it is
1382 * nested. Then we pop the stack normally with iret, and if there was
1383 * a nested NMI that updated the copy interrupt stack frame, a
1384 * jump will be made to the repeat_nmi code that will handle the second
1388 /* Use %rdx as our temp variable throughout */
1390 CFI_REL_OFFSET rdx, 0
1393 * If %cs was not the kernel segment, then the NMI triggered in user
1394 * space, which means it is definitely not nested.
1396 cmpl $__KERNEL_CS, 16(%rsp)
1400 * Check the special variable on the stack to see if NMIs are
1407 * Now test if the previous stack was an NMI stack.
1408 * We need the double check. We check the NMI stack to satisfy the
1409 * race when the first NMI clears the variable before returning.
1410 * We check the variable because the first NMI could be in a
1411 * breakpoint routine using a breakpoint stack.
1414 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1415 cmpq %rdx, 4*8(%rsp)
1416 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1418 subq $EXCEPTION_STKSZ, %rdx
1419 cmpq %rdx, 4*8(%rsp)
1420 /* If it is below the NMI stack, it is a normal NMI */
1422 /* Ah, it is within the NMI stack, treat it as nested */
1429 * Do nothing if we interrupted the fixup in repeat_nmi.
1430 * It's about to repeat the NMI handler, so we are fine
1431 * with ignoring this one.
1433 movq $repeat_nmi, %rdx
1436 movq $end_repeat_nmi, %rdx
1441 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1442 leaq -1*8(%rsp), %rdx
1444 CFI_ADJUST_CFA_OFFSET 1*8
1445 leaq -10*8(%rsp), %rdx
1446 pushq_cfi $__KERNEL_DS
1449 pushq_cfi $__KERNEL_CS
1450 pushq_cfi $repeat_nmi
1452 /* Put stack back */
1454 CFI_ADJUST_CFA_OFFSET -6*8
1460 /* No need to check faults here */
1466 * Because nested NMIs will use the pushed location that we
1467 * stored in rdx, we must keep that space available.
1468 * Here's what our stack frame will look like:
1469 * +-------------------------+
1471 * | original Return RSP |
1472 * | original RFLAGS |
1475 * +-------------------------+
1476 * | temp storage for rdx |
1477 * +-------------------------+
1478 * | NMI executing variable |
1479 * +-------------------------+
1481 * | copied Return RSP |
1485 * +-------------------------+
1487 * | Saved Return RSP |
1491 * +-------------------------+
1493 * +-------------------------+
1495 * The saved stack frame is used to fix up the copied stack frame
1496 * that a nested NMI may change to make the interrupted NMI iret jump
1497 * to the repeat_nmi. The original stack frame and the temp storage
1498 * is also used by nested NMIs and can not be trusted on exit.
1500 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1504 /* Set the NMI executing variable on the stack. */
1508 * Leave room for the "copied" frame
1511 CFI_ADJUST_CFA_OFFSET 5*8
1513 /* Copy the stack frame to the Saved frame */
1515 pushq_cfi 11*8(%rsp)
1517 CFI_DEF_CFA_OFFSET 5*8
1519 /* Everything up to here is safe from nested NMIs */
1522 * If there was a nested NMI, the first NMI's iret will return
1523 * here. But NMIs are still enabled and we can take another
1524 * nested NMI. The nested NMI checks the interrupted RIP to see
1525 * if it is between repeat_nmi and end_repeat_nmi, and if so
1526 * it will just return, as we are about to repeat an NMI anyway.
1527 * This makes it safe to copy to the stack frame that a nested
1532 * Update the stack variable to say we are still in NMI (the update
1533 * is benign for the non-repeat case, where 1 was pushed just above
1534 * to this very stack slot).
1538 /* Make another copy, this one may be modified by nested NMIs */
1540 CFI_ADJUST_CFA_OFFSET -10*8
1542 pushq_cfi -6*8(%rsp)
1545 CFI_DEF_CFA_OFFSET 5*8
1549 * Everything below this point can be preempted by a nested
1550 * NMI if the first NMI took an exception and reset our iret stack
1551 * so that we repeat another NMI.
1553 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1554 ALLOC_PT_GPREGS_ON_STACK
1557 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1558 * as we should not be calling schedule in NMI context.
1559 * Even with normal interrupts enabled. An NMI should not be
1560 * setting NEED_RESCHED or anything that normal interrupts and
1561 * exceptions might do.
1567 * Save off the CR2 register. If we take a page fault in the NMI then
1568 * it could corrupt the CR2 value. If the NMI preempts a page fault
1569 * handler before it was able to read the CR2 register, and then the
1570 * NMI itself takes a page fault, the page fault that was preempted
1571 * will read the information from the NMI page fault and not the
1572 * origin fault. Save it off and restore it if it changes.
1573 * Use the r12 callee-saved register.
1577 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1582 /* Did the NMI take a page fault? Restore cr2 if it did */
1589 testl %ebx,%ebx /* swapgs needed? */
1596 /* Pop the extra iret frame at once */
1597 REMOVE_PT_GPREGS_FROM_STACK 6*8
1599 /* Clear the NMI executing stack variable */
1605 ENTRY(ignore_sysret)