2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - top of stack: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
20 * - partial stack frame: partially saved registers up to R11.
21 * - full stack frame: Like partial stack frame, but all register saved.
24 * - CFI macros are used to generate dwarf2 unwind information for better
25 * backtraces. They don't change any code.
26 * - ENTRY/END Define functions in the symbol table.
27 * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack
28 * frame that is otherwise undefined after a SYSCALL
29 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
30 * - idtentry - Define exception entry points.
33 #include <linux/linkage.h>
34 #include <asm/segment.h>
35 #include <asm/cache.h>
36 #include <asm/errno.h>
37 #include <asm/dwarf2.h>
38 #include <asm/calling.h>
39 #include <asm/asm-offsets.h>
41 #include <asm/unistd.h>
42 #include <asm/thread_info.h>
43 #include <asm/hw_irq.h>
44 #include <asm/page_types.h>
45 #include <asm/irqflags.h>
46 #include <asm/paravirt.h>
47 #include <asm/percpu.h>
49 #include <asm/context_tracking.h>
51 #include <asm/pgtable_types.h>
52 #include <linux/err.h>
54 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
55 #include <linux/elf-em.h>
56 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
57 #define __AUDIT_ARCH_64BIT 0x80000000
58 #define __AUDIT_ARCH_LE 0x40000000
61 .section .entry.text, "ax"
64 #ifndef CONFIG_PREEMPT
65 #define retint_kernel retint_restore_args
68 #ifdef CONFIG_PARAVIRT
69 ENTRY(native_usergs_sysret64)
72 ENDPROC(native_usergs_sysret64)
73 #endif /* CONFIG_PARAVIRT */
76 .macro TRACE_IRQS_IRETQ
77 #ifdef CONFIG_TRACE_IRQFLAGS
78 bt $9,EFLAGS(%rsp) /* interrupts off? */
86 * When dynamic function tracer is enabled it will add a breakpoint
87 * to all locations that it is about to modify, sync CPUs, update
88 * all the code, sync CPUs, then remove the breakpoints. In this time
89 * if lockdep is enabled, it might jump back into the debug handler
90 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
92 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
93 * make sure the stack pointer does not get reset back to the top
94 * of the debug stack, and instead just reuses the current stack.
96 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
98 .macro TRACE_IRQS_OFF_DEBUG
99 call debug_stack_set_zero
101 call debug_stack_reset
104 .macro TRACE_IRQS_ON_DEBUG
105 call debug_stack_set_zero
107 call debug_stack_reset
110 .macro TRACE_IRQS_IRETQ_DEBUG
111 bt $9,EFLAGS(%rsp) /* interrupts off? */
118 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
119 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
120 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
124 * C code is not supposed to know about undefined top of stack. Every time
125 * a C function with an pt_regs argument is called from the SYSCALL based
126 * fast path FIXUP_TOP_OF_STACK is needed.
127 * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
131 /* %rsp:at FRAMEEND */
132 .macro FIXUP_TOP_OF_STACK tmp offset=0
133 movq PER_CPU_VAR(old_rsp),\tmp
134 movq \tmp,RSP+\offset(%rsp)
135 movq $__USER_DS,SS+\offset(%rsp)
136 movq $__USER_CS,CS+\offset(%rsp)
137 movq RIP+\offset(%rsp),\tmp /* get rip */
138 movq \tmp,RCX+\offset(%rsp) /* copy it to rcx as sysret would do */
139 movq R11+\offset(%rsp),\tmp /* get eflags */
140 movq \tmp,EFLAGS+\offset(%rsp)
143 .macro RESTORE_TOP_OF_STACK tmp offset=0
144 movq RSP+\offset(%rsp),\tmp
145 movq \tmp,PER_CPU_VAR(old_rsp)
146 movq EFLAGS+\offset(%rsp),\tmp
147 movq \tmp,R11+\offset(%rsp)
153 .macro EMPTY_FRAME start=1 offset=0
157 CFI_DEF_CFA rsp,8+\offset
159 CFI_DEF_CFA_OFFSET 8+\offset
164 * initial frame state for interrupts (and exceptions without error code)
166 .macro INTR_FRAME start=1 offset=0
167 EMPTY_FRAME \start, SS+8+\offset-RIP
168 /*CFI_REL_OFFSET ss, SS+\offset-RIP*/
169 CFI_REL_OFFSET rsp, RSP+\offset-RIP
170 /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/
171 /*CFI_REL_OFFSET cs, CS+\offset-RIP*/
172 CFI_REL_OFFSET rip, RIP+\offset-RIP
176 * initial frame state for exceptions with error code (and interrupts
177 * with vector already pushed)
179 .macro XCPT_FRAME start=1 offset=0
180 INTR_FRAME \start, RIP+\offset-ORIG_RAX
184 * frame that enables passing a complete pt_regs to a C function.
186 .macro DEFAULT_FRAME start=1 offset=0
187 XCPT_FRAME \start, ORIG_RAX+\offset
188 CFI_REL_OFFSET rdi, RDI+\offset
189 CFI_REL_OFFSET rsi, RSI+\offset
190 CFI_REL_OFFSET rdx, RDX+\offset
191 CFI_REL_OFFSET rcx, RCX+\offset
192 CFI_REL_OFFSET rax, RAX+\offset
193 CFI_REL_OFFSET r8, R8+\offset
194 CFI_REL_OFFSET r9, R9+\offset
195 CFI_REL_OFFSET r10, R10+\offset
196 CFI_REL_OFFSET r11, R11+\offset
197 CFI_REL_OFFSET rbx, RBX+\offset
198 CFI_REL_OFFSET rbp, RBP+\offset
199 CFI_REL_OFFSET r12, R12+\offset
200 CFI_REL_OFFSET r13, R13+\offset
201 CFI_REL_OFFSET r14, R14+\offset
202 CFI_REL_OFFSET r15, R15+\offset
211 movl $MSR_GS_BASE,%ecx
214 js 1f /* negative -> in kernel */
222 * A newly forked process directly context switches into this address.
224 * rdi: prev task we switched from
229 LOCK ; btr $TIF_FORK,TI_flags(%r8)
232 popfq_cfi # reset kernel eflags
234 call schedule_tail # rdi: 'prev' task parameter
236 GET_THREAD_INFO(%rcx)
240 testl $3,CS(%rsp) # from kernel_thread?
243 testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET
244 jnz int_ret_from_sys_call
246 RESTORE_TOP_OF_STACK %rdi
247 jmp ret_from_sys_call # go to the SYSRET fastpath
254 jmp int_ret_from_sys_call
259 * System call entry. Up to 6 arguments in registers are supported.
261 * SYSCALL does not save anything on the stack and does not change the
262 * stack pointer. However, it does mask the flags register for us, so
263 * CLD and CLAC are not needed.
268 * rax system call number
270 * rcx return address for syscall/sysret, C arg3
273 * r10 arg3 (--> moved to rcx for C)
276 * r11 eflags for syscall/sysret, temporary for C
277 * r12-r15,rbp,rbx saved by C code, not touched.
279 * Interrupts are off on entry.
280 * Only called from user space.
282 * XXX if we had a free scratch register we could save the RSP into the stack frame
283 * and report it properly in ps. Unfortunately we haven't.
285 * When user can change the frames always force IRET. That is because
286 * it deals with uncanonical addresses better. SYSRET has trouble
287 * with them due to bugs in both AMD and Intel CPUs.
293 CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
295 /*CFI_REGISTER rflags,r11*/
298 * A hypervisor implementation might want to use a label
299 * after the swapgs, so that it can do the swapgs
300 * for the guest and jump here on syscall.
302 GLOBAL(system_call_after_swapgs)
304 movq %rsp,PER_CPU_VAR(old_rsp)
305 movq PER_CPU_VAR(kernel_stack),%rsp
307 * No need to follow this irqs off/on section - it's straight
310 ENABLE_INTERRUPTS(CLBR_NONE)
311 ALLOC_PT_GPREGS_ON_STACK 8
312 SAVE_C_REGS_EXCEPT_RAX_RCX
313 movq $-ENOSYS,RAX(%rsp)
314 movq_cfi rax,ORIG_RAX
316 CFI_REL_OFFSET rip,RIP
317 testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP)
319 system_call_fastpath:
320 #if __SYSCALL_MASK == ~0
321 cmpq $__NR_syscall_max,%rax
323 andl $__SYSCALL_MASK,%eax
324 cmpl $__NR_syscall_max,%eax
326 ja ret_from_sys_call /* and return regs->ax */
328 call *sys_call_table(,%rax,8) # XXX: rip relative
331 * Syscall return path ending with SYSRET (fast path)
332 * Has incomplete stack frame and undefined top of stack.
335 testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP)
336 jnz int_ret_from_sys_call_fixup /* Go the the slow path */
339 DISABLE_INTERRUPTS(CLBR_NONE)
343 * sysretq will re-enable interrupts:
346 RESTORE_C_REGS_EXCEPT_RCX
349 /*CFI_REGISTER rflags,r11*/
350 movq PER_CPU_VAR(old_rsp), %rsp
355 int_ret_from_sys_call_fixup:
356 FIXUP_TOP_OF_STACK %r11
357 jmp int_ret_from_sys_call
359 /* Do syscall tracing */
362 movq $AUDIT_ARCH_X86_64, %rsi
363 call syscall_trace_enter_phase1
365 jnz tracesys_phase2 /* if needed, run the slow path */
366 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
367 movq ORIG_RAX(%rsp), %rax
368 jmp system_call_fastpath /* and return to the fast path */
372 FIXUP_TOP_OF_STACK %rdi
374 movq $AUDIT_ARCH_X86_64, %rsi
376 call syscall_trace_enter_phase2
379 * Reload registers from stack in case ptrace changed them.
380 * We don't reload %rax because syscall_trace_entry_phase2() returned
381 * the value it wants us to use in the table lookup.
383 RESTORE_C_REGS_EXCEPT_RAX
385 #if __SYSCALL_MASK == ~0
386 cmpq $__NR_syscall_max,%rax
388 andl $__SYSCALL_MASK,%eax
389 cmpl $__NR_syscall_max,%eax
391 ja int_ret_from_sys_call /* RAX(%rsp) is already set */
392 movq %r10,%rcx /* fixup for C */
393 call *sys_call_table(,%rax,8)
395 /* Use IRET because user could have changed frame */
398 * Syscall return path ending with IRET.
399 * Has correct top of stack, but partial stack frame.
401 GLOBAL(int_ret_from_sys_call)
402 DISABLE_INTERRUPTS(CLBR_NONE)
404 movl $_TIF_ALLWORK_MASK,%edi
405 /* edi: mask to check */
406 GLOBAL(int_with_check)
408 GET_THREAD_INFO(%rcx)
409 movl TI_flags(%rcx),%edx
412 andl $~TS_COMPAT,TI_status(%rcx)
415 /* Either reschedule or signal or syscall exit tracking needed. */
416 /* First do a reschedule test. */
417 /* edx: work, edi: workmask */
419 bt $TIF_NEED_RESCHED,%edx
422 ENABLE_INTERRUPTS(CLBR_NONE)
426 DISABLE_INTERRUPTS(CLBR_NONE)
430 /* handle signals and tracing -- both require a full stack frame */
433 ENABLE_INTERRUPTS(CLBR_NONE)
435 /* Check for syscall exit trace */
436 testl $_TIF_WORK_SYSCALL_EXIT,%edx
439 leaq 8(%rsp),%rdi # &ptregs -> arg1
440 call syscall_trace_leave
442 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
446 testl $_TIF_DO_NOTIFY_MASK,%edx
448 movq %rsp,%rdi # &ptregs -> arg1
449 xorl %esi,%esi # oldset -> arg2
450 call do_notify_resume
451 1: movl $_TIF_WORK_MASK,%edi
454 DISABLE_INTERRUPTS(CLBR_NONE)
460 .macro FORK_LIKE func
463 DEFAULT_FRAME 0, 8 /* offset 8: return address */
465 FIXUP_TOP_OF_STACK %r11, 8
467 RESTORE_TOP_OF_STACK %r11, 8
473 .macro FIXED_FRAME label,func
476 DEFAULT_FRAME 0, 8 /* offset 8: return address */
477 FIXUP_TOP_OF_STACK %r11, 8
479 RESTORE_TOP_OF_STACK %r11, 8
488 FIXED_FRAME stub_iopl, sys_iopl
495 FIXUP_TOP_OF_STACK %r11
499 jmp int_ret_from_sys_call
508 FIXUP_TOP_OF_STACK %r11
510 RESTORE_TOP_OF_STACK %r11
513 jmp int_ret_from_sys_call
518 * sigreturn is special because it needs to restore all registers on return.
519 * This cannot be done with SYSRET, so use the IRET return path instead.
521 ENTRY(stub_rt_sigreturn)
526 FIXUP_TOP_OF_STACK %r11
527 call sys_rt_sigreturn
528 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
530 jmp int_ret_from_sys_call
532 END(stub_rt_sigreturn)
534 #ifdef CONFIG_X86_X32_ABI
535 ENTRY(stub_x32_rt_sigreturn)
540 FIXUP_TOP_OF_STACK %r11
541 call sys32_x32_rt_sigreturn
542 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
544 jmp int_ret_from_sys_call
546 END(stub_x32_rt_sigreturn)
548 ENTRY(stub_x32_execve)
553 FIXUP_TOP_OF_STACK %r11
554 call compat_sys_execve
555 RESTORE_TOP_OF_STACK %r11
558 jmp int_ret_from_sys_call
562 ENTRY(stub_x32_execveat)
567 FIXUP_TOP_OF_STACK %r11
568 call compat_sys_execveat
569 RESTORE_TOP_OF_STACK %r11
572 jmp int_ret_from_sys_call
574 END(stub_x32_execveat)
579 * Build the entry stubs and pointer table with some assembler magic.
580 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
581 * single cache line on all modern x86 implementations.
583 .section .init.rodata,"a"
587 .p2align CONFIG_X86_L1_CACHE_SHIFT
588 ENTRY(irq_entries_start)
590 vector=FIRST_EXTERNAL_VECTOR
591 .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
594 .if vector < FIRST_SYSTEM_VECTOR
595 .if vector <> FIRST_EXTERNAL_VECTOR
596 CFI_ADJUST_CFA_OFFSET -8
598 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
599 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
608 2: jmp common_interrupt
611 END(irq_entries_start)
618 * Interrupt entry/exit.
620 * Interrupt entry points save only callee clobbered registers in fast path.
622 * Entry runs with interrupts off.
625 /* 0(%rsp): ~(interrupt number) */
626 .macro interrupt func
629 * Since nothing in interrupt handling code touches r12...r15 members
630 * of "struct pt_regs", and since interrupts can nest, we can save
631 * four stack slots and simultaneously provide
632 * an unwind-friendly stack layout by saving "truncated" pt_regs
633 * exactly up to rbp slot, without these members.
635 ALLOC_PT_GPREGS_ON_STACK -RBP
637 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
638 SAVE_EXTRA_REGS_RBP -RBP
640 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
642 testl $3, CS-RBP(%rsp)
647 * Save previous stack pointer, optionally switch to interrupt stack.
648 * irq_count is used to check if a CPU is already on an interrupt stack
649 * or not. While this is essentially redundant with preempt_count it is
650 * a little cheaper to use a separate counter in the PDA (short of
651 * moving irq_enter into assembly, which would be too much work)
654 incl PER_CPU_VAR(irq_count)
655 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
656 CFI_DEF_CFA_REGISTER rsi
658 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
659 0x77 /* DW_OP_breg7 */, 0, \
660 0x06 /* DW_OP_deref */, \
661 0x08 /* DW_OP_const1u */, SS+8-RBP, \
662 0x22 /* DW_OP_plus */
663 /* We entered an interrupt context - irqs are off: */
670 * The interrupt stubs push (~vector+0x80) onto the stack and
671 * then jump to common_interrupt.
673 .p2align CONFIG_X86_L1_CACHE_SHIFT
677 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
679 /* 0(%rsp): old_rsp */
681 DISABLE_INTERRUPTS(CLBR_NONE)
683 decl PER_CPU_VAR(irq_count)
685 /* Restore saved previous stack */
687 CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */
688 /* return code expects complete pt_regs - adjust rsp accordingly: */
690 CFI_DEF_CFA_REGISTER rsp
691 CFI_ADJUST_CFA_OFFSET RBP
694 GET_THREAD_INFO(%rcx)
698 /* Interrupt came from user space */
700 * Has a correct top of stack.
701 * %rcx: thread info. Interrupts off.
703 retint_with_reschedule:
704 movl $_TIF_WORK_MASK,%edi
707 movl TI_flags(%rcx),%edx
712 retint_swapgs: /* return to user-space */
714 * The iretq could re-enable interrupts:
716 DISABLE_INTERRUPTS(CLBR_ANY)
720 * Try to use SYSRET instead of IRET if we're returning to
721 * a completely clean 64-bit userspace context.
724 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
725 jne opportunistic_sysret_failed
728 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
729 * in kernel space. This essentially lets the user take over
730 * the kernel, since userspace controls RSP. It's not worth
731 * testing for canonicalness exactly -- this check detects any
732 * of the 17 high bits set, which is true for non-canonical
733 * or kernel addresses. (This will pessimize vsyscall=native.
736 * If virtual addresses ever become wider, this will need
737 * to be updated to remain correct on both old and new CPUs.
739 .ifne __VIRTUAL_MASK_SHIFT - 47
740 .error "virtual address width changed -- sysret checks need update"
742 shr $__VIRTUAL_MASK_SHIFT, %rcx
743 jnz opportunistic_sysret_failed
745 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
746 jne opportunistic_sysret_failed
749 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
750 jne opportunistic_sysret_failed
752 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
753 jnz opportunistic_sysret_failed
755 /* nothing to check for RSP */
757 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
758 jne opportunistic_sysret_failed
761 * We win! This label is here just for ease of understanding
762 * perf profiles. Nothing jumps here.
764 irq_return_via_sysret:
767 REMOVE_PT_GPREGS_FROM_STACK 8
768 movq (RSP-RIP)(%rsp),%rsp
772 opportunistic_sysret_failed:
776 retint_restore_args: /* return to kernel space */
777 DISABLE_INTERRUPTS(CLBR_ANY)
779 * The iretq could re-enable interrupts:
784 REMOVE_PT_GPREGS_FROM_STACK 8
791 * Are we returning to a stack segment from the LDT? Note: in
792 * 64-bit mode SS:RSP on the exception stack is always valid.
794 #ifdef CONFIG_X86_ESPFIX64
795 testb $4,(SS-RIP)(%rsp)
796 jnz native_irq_return_ldt
799 .global native_irq_return_iret
800 native_irq_return_iret:
802 * This may fault. Non-paranoid faults on return to userspace are
803 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
804 * Double-faults due to espfix64 are handled in do_double_fault.
805 * Other faults here are fatal.
809 #ifdef CONFIG_X86_ESPFIX64
810 native_irq_return_ldt:
814 movq PER_CPU_VAR(espfix_waddr),%rdi
815 movq %rax,(0*8)(%rdi) /* RAX */
816 movq (2*8)(%rsp),%rax /* RIP */
817 movq %rax,(1*8)(%rdi)
818 movq (3*8)(%rsp),%rax /* CS */
819 movq %rax,(2*8)(%rdi)
820 movq (4*8)(%rsp),%rax /* RFLAGS */
821 movq %rax,(3*8)(%rdi)
822 movq (6*8)(%rsp),%rax /* SS */
823 movq %rax,(5*8)(%rdi)
824 movq (5*8)(%rsp),%rax /* RSP */
825 movq %rax,(4*8)(%rdi)
826 andl $0xffff0000,%eax
828 orq PER_CPU_VAR(espfix_stack),%rax
832 jmp native_irq_return_iret
835 /* edi: workmask, edx: work */
838 bt $TIF_NEED_RESCHED,%edx
841 ENABLE_INTERRUPTS(CLBR_NONE)
845 GET_THREAD_INFO(%rcx)
846 DISABLE_INTERRUPTS(CLBR_NONE)
851 testl $_TIF_DO_NOTIFY_MASK,%edx
854 ENABLE_INTERRUPTS(CLBR_NONE)
856 movq $-1,ORIG_RAX(%rsp)
857 xorl %esi,%esi # oldset
858 movq %rsp,%rdi # &pt_regs
859 call do_notify_resume
861 DISABLE_INTERRUPTS(CLBR_NONE)
863 GET_THREAD_INFO(%rcx)
864 jmp retint_with_reschedule
866 #ifdef CONFIG_PREEMPT
867 /* Returning to kernel space. Check if we need preemption */
868 /* rcx: threadinfo. interrupts off. */
870 cmpl $0,PER_CPU_VAR(__preempt_count)
871 jnz retint_restore_args
872 bt $9,EFLAGS(%rsp) /* interrupts off? */
873 jnc retint_restore_args
874 call preempt_schedule_irq
878 END(common_interrupt)
883 .macro apicinterrupt3 num sym do_sym
895 #ifdef CONFIG_TRACING
896 #define trace(sym) trace_##sym
897 #define smp_trace(sym) smp_trace_##sym
899 .macro trace_apicinterrupt num sym
900 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
903 .macro trace_apicinterrupt num sym do_sym
907 .macro apicinterrupt num sym do_sym
908 apicinterrupt3 \num \sym \do_sym
909 trace_apicinterrupt \num \sym
913 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
914 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
915 apicinterrupt3 REBOOT_VECTOR \
916 reboot_interrupt smp_reboot_interrupt
920 apicinterrupt3 UV_BAU_MESSAGE \
921 uv_bau_message_intr1 uv_bau_message_interrupt
923 apicinterrupt LOCAL_TIMER_VECTOR \
924 apic_timer_interrupt smp_apic_timer_interrupt
925 apicinterrupt X86_PLATFORM_IPI_VECTOR \
926 x86_platform_ipi smp_x86_platform_ipi
928 #ifdef CONFIG_HAVE_KVM
929 apicinterrupt3 POSTED_INTR_VECTOR \
930 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
933 #ifdef CONFIG_X86_MCE_THRESHOLD
934 apicinterrupt THRESHOLD_APIC_VECTOR \
935 threshold_interrupt smp_threshold_interrupt
938 #ifdef CONFIG_X86_THERMAL_VECTOR
939 apicinterrupt THERMAL_APIC_VECTOR \
940 thermal_interrupt smp_thermal_interrupt
944 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
945 call_function_single_interrupt smp_call_function_single_interrupt
946 apicinterrupt CALL_FUNCTION_VECTOR \
947 call_function_interrupt smp_call_function_interrupt
948 apicinterrupt RESCHEDULE_VECTOR \
949 reschedule_interrupt smp_reschedule_interrupt
952 apicinterrupt ERROR_APIC_VECTOR \
953 error_interrupt smp_error_interrupt
954 apicinterrupt SPURIOUS_APIC_VECTOR \
955 spurious_interrupt smp_spurious_interrupt
957 #ifdef CONFIG_IRQ_WORK
958 apicinterrupt IRQ_WORK_VECTOR \
959 irq_work_interrupt smp_irq_work_interrupt
963 * Exception entry points.
965 #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8)
967 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
970 .if \shift_ist != -1 && \paranoid == 0
971 .error "using shift_ist requires paranoid=1"
981 PARAVIRT_ADJUST_EXCEPTION_FRAME
983 .ifeq \has_error_code
984 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
987 ALLOC_PT_GPREGS_ON_STACK
992 testl $3, CS(%rsp) /* If coming from userspace, switch */
1003 .if \shift_ist != -1
1004 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
1010 movq %rsp,%rdi /* pt_regs pointer */
1013 movq ORIG_RAX(%rsp),%rsi /* get error code */
1014 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1016 xorl %esi,%esi /* no error code */
1019 .if \shift_ist != -1
1020 subq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist)
1025 .if \shift_ist != -1
1026 addq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist)
1030 jmp paranoid_exit /* %ebx: no swapgs flag */
1032 jmp error_exit /* %ebx: no swapgs flag */
1038 * Paranoid entry from userspace. Switch stacks and treat it
1039 * as a normal entry. This means that paranoid handlers
1040 * run in real process context if user_mode(regs).
1047 movq %rsp,%rdi /* pt_regs pointer */
1049 movq %rax,%rsp /* switch stack */
1051 movq %rsp,%rdi /* pt_regs pointer */
1054 movq ORIG_RAX(%rsp),%rsi /* get error code */
1055 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1057 xorl %esi,%esi /* no error code */
1062 jmp error_exit /* %ebx: no swapgs flag */
1069 #ifdef CONFIG_TRACING
1070 .macro trace_idtentry sym do_sym has_error_code:req
1071 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1072 idtentry \sym \do_sym has_error_code=\has_error_code
1075 .macro trace_idtentry sym do_sym has_error_code:req
1076 idtentry \sym \do_sym has_error_code=\has_error_code
1080 idtentry divide_error do_divide_error has_error_code=0
1081 idtentry overflow do_overflow has_error_code=0
1082 idtentry bounds do_bounds has_error_code=0
1083 idtentry invalid_op do_invalid_op has_error_code=0
1084 idtentry device_not_available do_device_not_available has_error_code=0
1085 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1086 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1087 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1088 idtentry segment_not_present do_segment_not_present has_error_code=1
1089 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1090 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1091 idtentry alignment_check do_alignment_check has_error_code=1
1092 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1095 /* Reload gs selector with exception handling */
1096 /* edi: new selector */
1097 ENTRY(native_load_gs_index)
1100 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1104 2: mfence /* workaround */
1109 END(native_load_gs_index)
1111 _ASM_EXTABLE(gs_change,bad_gs)
1112 .section .fixup,"ax"
1113 /* running with kernelgs */
1115 SWAPGS /* switch back to user gs */
1121 /* Call softirq on interrupt stack. Interrupts are off. */
1122 ENTRY(do_softirq_own_stack)
1125 CFI_REL_OFFSET rbp,0
1127 CFI_DEF_CFA_REGISTER rbp
1128 incl PER_CPU_VAR(irq_count)
1129 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1130 push %rbp # backlink for old unwinder
1134 CFI_DEF_CFA_REGISTER rsp
1135 CFI_ADJUST_CFA_OFFSET -8
1136 decl PER_CPU_VAR(irq_count)
1139 END(do_softirq_own_stack)
1142 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1145 * A note on the "critical region" in our callback handler.
1146 * We want to avoid stacking callback handlers due to events occurring
1147 * during handling of the last event. To do this, we keep events disabled
1148 * until we've done all processing. HOWEVER, we must enable events before
1149 * popping the stack frame (can't be done atomically) and so it would still
1150 * be possible to get enough handler activations to overflow the stack.
1151 * Although unlikely, bugs of that kind are hard to track down, so we'd
1152 * like to avoid the possibility.
1153 * So, on entry to the handler we detect whether we interrupted an
1154 * existing activation in its critical region -- if so, we pop the current
1155 * activation and restart the handler using the previous one.
1157 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1160 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1161 * see the correct pointer to the pt_regs
1163 movq %rdi, %rsp # we don't return, adjust the stack frame
1166 11: incl PER_CPU_VAR(irq_count)
1168 CFI_DEF_CFA_REGISTER rbp
1169 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1170 pushq %rbp # backlink for old unwinder
1171 call xen_evtchn_do_upcall
1173 CFI_DEF_CFA_REGISTER rsp
1174 decl PER_CPU_VAR(irq_count)
1175 #ifndef CONFIG_PREEMPT
1176 call xen_maybe_preempt_hcall
1180 END(xen_do_hypervisor_callback)
1183 * Hypervisor uses this for application faults while it executes.
1184 * We get here for two reasons:
1185 * 1. Fault while reloading DS, ES, FS or GS
1186 * 2. Fault while executing IRET
1187 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1188 * registers that could be reloaded and zeroed the others.
1189 * Category 2 we fix up by killing the current process. We cannot use the
1190 * normal Linux return path in this case because if we use the IRET hypercall
1191 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1192 * We distinguish between categories by comparing each saved segment register
1193 * with its current contents: any discrepancy means we in category 1.
1195 ENTRY(xen_failsafe_callback)
1197 /*CFI_REL_OFFSET gs,GS*/
1198 /*CFI_REL_OFFSET fs,FS*/
1199 /*CFI_REL_OFFSET es,ES*/
1200 /*CFI_REL_OFFSET ds,DS*/
1201 CFI_REL_OFFSET r11,8
1202 CFI_REL_OFFSET rcx,0
1216 /* All segments match their saved values => Category 2 (Bad IRET). */
1222 CFI_ADJUST_CFA_OFFSET -0x30
1223 pushq_cfi $0 /* RIP */
1226 jmp general_protection
1228 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1234 CFI_ADJUST_CFA_OFFSET -0x30
1235 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1236 ALLOC_PT_GPREGS_ON_STACK
1241 END(xen_failsafe_callback)
1243 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1244 xen_hvm_callback_vector xen_evtchn_do_upcall
1246 #endif /* CONFIG_XEN */
1248 #if IS_ENABLED(CONFIG_HYPERV)
1249 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1250 hyperv_callback_vector hyperv_vector_handler
1251 #endif /* CONFIG_HYPERV */
1253 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1254 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1255 idtentry stack_segment do_stack_segment has_error_code=1
1257 idtentry xen_debug do_debug has_error_code=0
1258 idtentry xen_int3 do_int3 has_error_code=0
1259 idtentry xen_stack_segment do_stack_segment has_error_code=1
1261 idtentry general_protection do_general_protection has_error_code=1
1262 trace_idtentry page_fault do_page_fault has_error_code=1
1263 #ifdef CONFIG_KVM_GUEST
1264 idtentry async_page_fault do_async_page_fault has_error_code=1
1266 #ifdef CONFIG_X86_MCE
1267 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1271 * "Paranoid" exit path from exception stack. This is invoked
1272 * only on return from non-NMI IST interrupts that came
1273 * from kernel space.
1275 * We may be returning to very strange contexts (e.g. very early
1276 * in syscall entry), so checking for preemption here would
1277 * be complicated. Fortunately, we there's no good reason
1278 * to try to handle preemption here.
1281 /* ebx: no swapgs flag */
1282 ENTRY(paranoid_exit)
1284 DISABLE_INTERRUPTS(CLBR_NONE)
1285 TRACE_IRQS_OFF_DEBUG
1286 testl %ebx,%ebx /* swapgs needed? */
1287 jnz paranoid_exit_no_swapgs
1290 jmp paranoid_exit_restore
1291 paranoid_exit_no_swapgs:
1292 TRACE_IRQS_IRETQ_DEBUG
1293 paranoid_exit_restore:
1296 REMOVE_PT_GPREGS_FROM_STACK 8
1302 * Exception entry point. This expects an error code/orig_rax on the stack.
1303 * returns in "no swapgs flag" in %ebx.
1307 CFI_ADJUST_CFA_OFFSET 15*8
1308 /* oldrax contains error code */
1314 je error_kernelspace
1322 * There are two places in the kernel that can potentially fault with
1323 * usergs. Handle them here. B stepping K8s sometimes report a
1324 * truncated RIP for IRET exceptions returning to compat mode. Check
1325 * for these here too.
1328 CFI_REL_OFFSET rcx, RCX+8
1330 leaq native_irq_return_iret(%rip),%rcx
1331 cmpq %rcx,RIP+8(%rsp)
1333 movl %ecx,%eax /* zero extend */
1334 cmpq %rax,RIP+8(%rsp)
1336 cmpq $gs_change,RIP+8(%rsp)
1341 /* Fix truncated RIP */
1342 movq %rcx,RIP+8(%rsp)
1350 decl %ebx /* Return to usergs */
1356 /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
1361 DISABLE_INTERRUPTS(CLBR_NONE)
1363 GET_THREAD_INFO(%rcx)
1366 LOCKDEP_SYS_EXIT_IRQ
1367 movl TI_flags(%rcx),%edx
1368 movl $_TIF_WORK_MASK,%edi
1376 * Test if a given stack is an NMI stack or not.
1378 .macro test_in_nmi reg stack nmi_ret normal_ret
1381 subq $EXCEPTION_STKSZ, %\reg
1387 /* runs on exception stack */
1390 PARAVIRT_ADJUST_EXCEPTION_FRAME
1392 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1393 * the iretq it performs will take us out of NMI context.
1394 * This means that we can have nested NMIs where the next
1395 * NMI is using the top of the stack of the previous NMI. We
1396 * can't let it execute because the nested NMI will corrupt the
1397 * stack of the previous NMI. NMI handlers are not re-entrant
1400 * To handle this case we do the following:
1401 * Check the a special location on the stack that contains
1402 * a variable that is set when NMIs are executing.
1403 * The interrupted task's stack is also checked to see if it
1405 * If the variable is not set and the stack is not the NMI
1407 * o Set the special variable on the stack
1408 * o Copy the interrupt frame into a "saved" location on the stack
1409 * o Copy the interrupt frame into a "copy" location on the stack
1410 * o Continue processing the NMI
1411 * If the variable is set or the previous stack is the NMI stack:
1412 * o Modify the "copy" location to jump to the repeate_nmi
1413 * o return back to the first NMI
1415 * Now on exit of the first NMI, we first clear the stack variable
1416 * The NMI stack will tell any nested NMIs at that point that it is
1417 * nested. Then we pop the stack normally with iret, and if there was
1418 * a nested NMI that updated the copy interrupt stack frame, a
1419 * jump will be made to the repeat_nmi code that will handle the second
1423 /* Use %rdx as out temp variable throughout */
1425 CFI_REL_OFFSET rdx, 0
1428 * If %cs was not the kernel segment, then the NMI triggered in user
1429 * space, which means it is definitely not nested.
1431 cmpl $__KERNEL_CS, 16(%rsp)
1435 * Check the special variable on the stack to see if NMIs are
1442 * Now test if the previous stack was an NMI stack.
1443 * We need the double check. We check the NMI stack to satisfy the
1444 * race when the first NMI clears the variable before returning.
1445 * We check the variable because the first NMI could be in a
1446 * breakpoint routine using a breakpoint stack.
1449 test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
1454 * Do nothing if we interrupted the fixup in repeat_nmi.
1455 * It's about to repeat the NMI handler, so we are fine
1456 * with ignoring this one.
1458 movq $repeat_nmi, %rdx
1461 movq $end_repeat_nmi, %rdx
1466 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1467 leaq -1*8(%rsp), %rdx
1469 CFI_ADJUST_CFA_OFFSET 1*8
1470 leaq -10*8(%rsp), %rdx
1471 pushq_cfi $__KERNEL_DS
1474 pushq_cfi $__KERNEL_CS
1475 pushq_cfi $repeat_nmi
1477 /* Put stack back */
1479 CFI_ADJUST_CFA_OFFSET -6*8
1485 /* No need to check faults here */
1491 * Because nested NMIs will use the pushed location that we
1492 * stored in rdx, we must keep that space available.
1493 * Here's what our stack frame will look like:
1494 * +-------------------------+
1496 * | original Return RSP |
1497 * | original RFLAGS |
1500 * +-------------------------+
1501 * | temp storage for rdx |
1502 * +-------------------------+
1503 * | NMI executing variable |
1504 * +-------------------------+
1506 * | copied Return RSP |
1510 * +-------------------------+
1512 * | Saved Return RSP |
1516 * +-------------------------+
1518 * +-------------------------+
1520 * The saved stack frame is used to fix up the copied stack frame
1521 * that a nested NMI may change to make the interrupted NMI iret jump
1522 * to the repeat_nmi. The original stack frame and the temp storage
1523 * is also used by nested NMIs and can not be trusted on exit.
1525 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1529 /* Set the NMI executing variable on the stack. */
1533 * Leave room for the "copied" frame
1536 CFI_ADJUST_CFA_OFFSET 5*8
1538 /* Copy the stack frame to the Saved frame */
1540 pushq_cfi 11*8(%rsp)
1542 CFI_DEF_CFA_OFFSET SS+8-RIP
1544 /* Everything up to here is safe from nested NMIs */
1547 * If there was a nested NMI, the first NMI's iret will return
1548 * here. But NMIs are still enabled and we can take another
1549 * nested NMI. The nested NMI checks the interrupted RIP to see
1550 * if it is between repeat_nmi and end_repeat_nmi, and if so
1551 * it will just return, as we are about to repeat an NMI anyway.
1552 * This makes it safe to copy to the stack frame that a nested
1557 * Update the stack variable to say we are still in NMI (the update
1558 * is benign for the non-repeat case, where 1 was pushed just above
1559 * to this very stack slot).
1563 /* Make another copy, this one may be modified by nested NMIs */
1565 CFI_ADJUST_CFA_OFFSET -10*8
1567 pushq_cfi -6*8(%rsp)
1570 CFI_DEF_CFA_OFFSET SS+8-RIP
1574 * Everything below this point can be preempted by a nested
1575 * NMI if the first NMI took an exception and reset our iret stack
1576 * so that we repeat another NMI.
1578 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1579 ALLOC_PT_GPREGS_ON_STACK
1582 * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit
1583 * as we should not be calling schedule in NMI context.
1584 * Even with normal interrupts enabled. An NMI should not be
1585 * setting NEED_RESCHED or anything that normal interrupts and
1586 * exceptions might do.
1592 * Save off the CR2 register. If we take a page fault in the NMI then
1593 * it could corrupt the CR2 value. If the NMI preempts a page fault
1594 * handler before it was able to read the CR2 register, and then the
1595 * NMI itself takes a page fault, the page fault that was preempted
1596 * will read the information from the NMI page fault and not the
1597 * origin fault. Save it off and restore it if it changes.
1598 * Use the r12 callee-saved register.
1602 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1607 /* Did the NMI take a page fault? Restore cr2 if it did */
1614 testl %ebx,%ebx /* swapgs needed? */
1621 /* Pop the extra iret frame at once */
1622 REMOVE_PT_GPREGS_FROM_STACK 6*8
1624 /* Clear the NMI executing stack variable */
1630 ENTRY(ignore_sysret)