2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
26 * - idtentry - Define exception entry points.
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
31 #include <asm/cache.h>
32 #include <asm/errno.h>
33 #include <asm/dwarf2.h>
34 #include <asm/calling.h>
35 #include <asm/asm-offsets.h>
37 #include <asm/unistd.h>
38 #include <asm/thread_info.h>
39 #include <asm/hw_irq.h>
40 #include <asm/page_types.h>
41 #include <asm/irqflags.h>
42 #include <asm/paravirt.h>
43 #include <asm/percpu.h>
45 #include <asm/context_tracking.h>
47 #include <asm/pgtable_types.h>
48 #include <linux/err.h>
50 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51 #include <linux/elf-em.h>
52 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53 #define __AUDIT_ARCH_64BIT 0x80000000
54 #define __AUDIT_ARCH_LE 0x40000000
57 .section .entry.text, "ax"
60 #ifndef CONFIG_PREEMPT
61 #define retint_kernel retint_restore_args
64 #ifdef CONFIG_PARAVIRT
65 ENTRY(native_usergs_sysret64)
68 ENDPROC(native_usergs_sysret64)
69 #endif /* CONFIG_PARAVIRT */
72 .macro TRACE_IRQS_IRETQ
73 #ifdef CONFIG_TRACE_IRQFLAGS
74 bt $9,EFLAGS(%rsp) /* interrupts off? */
82 * When dynamic function tracer is enabled it will add a breakpoint
83 * to all locations that it is about to modify, sync CPUs, update
84 * all the code, sync CPUs, then remove the breakpoints. In this time
85 * if lockdep is enabled, it might jump back into the debug handler
86 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
88 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
89 * make sure the stack pointer does not get reset back to the top
90 * of the debug stack, and instead just reuses the current stack.
92 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
94 .macro TRACE_IRQS_OFF_DEBUG
95 call debug_stack_set_zero
97 call debug_stack_reset
100 .macro TRACE_IRQS_ON_DEBUG
101 call debug_stack_set_zero
103 call debug_stack_reset
106 .macro TRACE_IRQS_IRETQ_DEBUG
107 bt $9,EFLAGS(%rsp) /* interrupts off? */
114 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
115 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
116 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
122 .macro EMPTY_FRAME start=1 offset=0
126 CFI_DEF_CFA rsp,8+\offset
128 CFI_DEF_CFA_OFFSET 8+\offset
133 * initial frame state for interrupts (and exceptions without error code)
135 .macro INTR_FRAME start=1 offset=0
136 EMPTY_FRAME \start, 5*8+\offset
137 /*CFI_REL_OFFSET ss, 4*8+\offset*/
138 CFI_REL_OFFSET rsp, 3*8+\offset
139 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
140 /*CFI_REL_OFFSET cs, 1*8+\offset*/
141 CFI_REL_OFFSET rip, 0*8+\offset
145 * initial frame state for exceptions with error code (and interrupts
146 * with vector already pushed)
148 .macro XCPT_FRAME start=1 offset=0
149 INTR_FRAME \start, 1*8+\offset
153 * frame that enables passing a complete pt_regs to a C function.
155 .macro DEFAULT_FRAME start=1 offset=0
156 XCPT_FRAME \start, ORIG_RAX+\offset
157 CFI_REL_OFFSET rdi, RDI+\offset
158 CFI_REL_OFFSET rsi, RSI+\offset
159 CFI_REL_OFFSET rdx, RDX+\offset
160 CFI_REL_OFFSET rcx, RCX+\offset
161 CFI_REL_OFFSET rax, RAX+\offset
162 CFI_REL_OFFSET r8, R8+\offset
163 CFI_REL_OFFSET r9, R9+\offset
164 CFI_REL_OFFSET r10, R10+\offset
165 CFI_REL_OFFSET r11, R11+\offset
166 CFI_REL_OFFSET rbx, RBX+\offset
167 CFI_REL_OFFSET rbp, RBP+\offset
168 CFI_REL_OFFSET r12, R12+\offset
169 CFI_REL_OFFSET r13, R13+\offset
170 CFI_REL_OFFSET r14, R14+\offset
171 CFI_REL_OFFSET r15, R15+\offset
175 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
177 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
178 * then loads new ss, cs, and rip from previously programmed MSRs.
179 * rflags gets masked by a value from another MSR (so CLD and CLAC
180 * are not needed). SYSCALL does not save anything on the stack
181 * and does not change rsp.
183 * Registers on entry:
184 * rax system call number
186 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
190 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
193 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
195 * Only called from user space.
197 * When user can change pt_regs->foo always force IRET. That is because
198 * it deals with uncanonical addresses better. SYSRET has trouble
199 * with them due to bugs in both AMD and Intel CPUs.
207 /*CFI_REGISTER rflags,r11*/
210 * Interrupts are off on entry.
211 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
212 * it is too small to ever cause noticeable irq latency.
216 * A hypervisor implementation might want to use a label
217 * after the swapgs, so that it can do the swapgs
218 * for the guest and jump here on syscall.
220 GLOBAL(system_call_after_swapgs)
222 movq %rsp,PER_CPU_VAR(rsp_scratch)
223 movq PER_CPU_VAR(kernel_stack),%rsp
225 /* Construct struct pt_regs on stack */
226 pushq_cfi $__USER_DS /* pt_regs->ss */
227 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
229 * Re-enable interrupts.
230 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
231 * must execute atomically in the face of possible interrupt-driven
232 * task preemption. We must enable interrupts only after we're done
233 * with using rsp_scratch:
235 ENABLE_INTERRUPTS(CLBR_NONE)
236 pushq_cfi %r11 /* pt_regs->flags */
237 pushq_cfi $__USER_CS /* pt_regs->cs */
238 pushq_cfi %rcx /* pt_regs->ip */
240 pushq_cfi_reg rax /* pt_regs->orig_ax */
241 pushq_cfi_reg rdi /* pt_regs->di */
242 pushq_cfi_reg rsi /* pt_regs->si */
243 pushq_cfi_reg rdx /* pt_regs->dx */
244 pushq_cfi_reg rcx /* pt_regs->cx */
245 pushq_cfi $-ENOSYS /* pt_regs->ax */
246 pushq_cfi_reg r8 /* pt_regs->r8 */
247 pushq_cfi_reg r9 /* pt_regs->r9 */
248 pushq_cfi_reg r10 /* pt_regs->r10 */
249 pushq_cfi_reg r11 /* pt_regs->r11 */
250 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
252 testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,SIZEOF_PTREGS)
254 system_call_fastpath:
255 #if __SYSCALL_MASK == ~0
256 cmpq $__NR_syscall_max,%rax
258 andl $__SYSCALL_MASK,%eax
259 cmpl $__NR_syscall_max,%eax
261 ja ret_from_sys_call /* and return regs->ax */
263 call *sys_call_table(,%rax,8) # XXX: rip relative
266 * Syscall return path ending with SYSRET (fast path)
267 * Has incompletely filled pt_regs, iret frame is also incomplete.
270 testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,SIZEOF_PTREGS)
271 jnz int_ret_from_sys_call_fixup /* Go the the slow path */
274 DISABLE_INTERRUPTS(CLBR_NONE)
278 * sysretq will re-enable interrupts:
281 RESTORE_C_REGS_EXCEPT_RCX_R11
284 movq EFLAGS(%rsp),%r11
285 /*CFI_REGISTER rflags,r11*/
288 * 64bit SYSRET restores rip from rcx,
289 * rflags from r11 (but RF and VM bits are forced to 0),
290 * cs and ss are loaded from MSRs.
296 int_ret_from_sys_call_fixup:
297 jmp int_ret_from_sys_call
299 /* Do syscall entry tracing */
302 movq $AUDIT_ARCH_X86_64, %rsi
303 call syscall_trace_enter_phase1
305 jnz tracesys_phase2 /* if needed, run the slow path */
306 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
307 movq ORIG_RAX(%rsp), %rax
308 jmp system_call_fastpath /* and return to the fast path */
313 movq $AUDIT_ARCH_X86_64, %rsi
315 call syscall_trace_enter_phase2
318 * Reload registers from stack in case ptrace changed them.
319 * We don't reload %rax because syscall_trace_entry_phase2() returned
320 * the value it wants us to use in the table lookup.
322 RESTORE_C_REGS_EXCEPT_RAX
324 #if __SYSCALL_MASK == ~0
325 cmpq $__NR_syscall_max,%rax
327 andl $__SYSCALL_MASK,%eax
328 cmpl $__NR_syscall_max,%eax
330 ja int_ret_from_sys_call /* RAX(%rsp) is already set */
331 movq %r10,%rcx /* fixup for C */
332 call *sys_call_table(,%rax,8)
334 /* Use IRET because user could have changed pt_regs->foo */
337 * Syscall return path ending with IRET.
338 * Has correct iret frame.
340 GLOBAL(int_ret_from_sys_call)
341 DISABLE_INTERRUPTS(CLBR_NONE)
343 movl $_TIF_ALLWORK_MASK,%edi
344 /* edi: mask to check */
345 GLOBAL(int_with_check)
347 GET_THREAD_INFO(%rcx)
348 movl TI_flags(%rcx),%edx
351 andl $~TS_COMPAT,TI_status(%rcx)
354 /* Either reschedule or signal or syscall exit tracking needed. */
355 /* First do a reschedule test. */
356 /* edx: work, edi: workmask */
358 bt $TIF_NEED_RESCHED,%edx
361 ENABLE_INTERRUPTS(CLBR_NONE)
365 DISABLE_INTERRUPTS(CLBR_NONE)
369 /* handle signals and tracing -- both require a full pt_regs */
372 ENABLE_INTERRUPTS(CLBR_NONE)
374 /* Check for syscall exit trace */
375 testl $_TIF_WORK_SYSCALL_EXIT,%edx
378 leaq 8(%rsp),%rdi # &ptregs -> arg1
379 call syscall_trace_leave
381 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
385 testl $_TIF_DO_NOTIFY_MASK,%edx
387 movq %rsp,%rdi # &ptregs -> arg1
388 xorl %esi,%esi # oldset -> arg2
389 call do_notify_resume
390 1: movl $_TIF_WORK_MASK,%edi
393 DISABLE_INTERRUPTS(CLBR_NONE)
399 .macro FORK_LIKE func
402 DEFAULT_FRAME 0, 8 /* offset 8: return address */
422 jmp int_ret_from_sys_call
434 jmp int_ret_from_sys_call
439 * sigreturn is special because it needs to restore all registers on return.
440 * This cannot be done with SYSRET, so use the IRET return path instead.
442 ENTRY(stub_rt_sigreturn)
447 call sys_rt_sigreturn
448 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
450 jmp int_ret_from_sys_call
452 END(stub_rt_sigreturn)
454 #ifdef CONFIG_X86_X32_ABI
455 ENTRY(stub_x32_rt_sigreturn)
460 call sys32_x32_rt_sigreturn
461 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
463 jmp int_ret_from_sys_call
465 END(stub_x32_rt_sigreturn)
467 ENTRY(stub_x32_execve)
472 call compat_sys_execve
475 jmp int_ret_from_sys_call
479 ENTRY(stub_x32_execveat)
484 call compat_sys_execveat
487 jmp int_ret_from_sys_call
489 END(stub_x32_execveat)
494 * A newly forked process directly context switches into this address.
496 * rdi: prev task we switched from
501 LOCK ; btr $TIF_FORK,TI_flags(%r8)
504 popfq_cfi # reset kernel eflags
506 call schedule_tail # rdi: 'prev' task parameter
508 GET_THREAD_INFO(%rcx)
512 testl $3,CS(%rsp) # from kernel_thread?
516 * By the time we get here, we have no idea whether our pt_regs,
517 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
518 * the slow path, or one of the ia32entry paths.
519 * Use int_ret_from_sys_call to return, since it can safely handle
522 jmp int_ret_from_sys_call
529 jmp int_ret_from_sys_call
534 * Build the entry stubs and pointer table with some assembler magic.
535 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
536 * single cache line on all modern x86 implementations.
538 .section .init.rodata,"a"
542 .p2align CONFIG_X86_L1_CACHE_SHIFT
543 ENTRY(irq_entries_start)
545 vector=FIRST_EXTERNAL_VECTOR
546 .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
549 .if vector < FIRST_SYSTEM_VECTOR
550 .if vector <> FIRST_EXTERNAL_VECTOR
551 CFI_ADJUST_CFA_OFFSET -8
553 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
554 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
563 2: jmp common_interrupt
566 END(irq_entries_start)
573 * Interrupt entry/exit.
575 * Interrupt entry points save only callee clobbered registers in fast path.
577 * Entry runs with interrupts off.
580 /* 0(%rsp): ~(interrupt number) */
581 .macro interrupt func
584 * Since nothing in interrupt handling code touches r12...r15 members
585 * of "struct pt_regs", and since interrupts can nest, we can save
586 * four stack slots and simultaneously provide
587 * an unwind-friendly stack layout by saving "truncated" pt_regs
588 * exactly up to rbp slot, without these members.
590 ALLOC_PT_GPREGS_ON_STACK -RBP
592 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
593 SAVE_EXTRA_REGS_RBP -RBP
595 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
597 testl $3, CS-RBP(%rsp)
602 * Save previous stack pointer, optionally switch to interrupt stack.
603 * irq_count is used to check if a CPU is already on an interrupt stack
604 * or not. While this is essentially redundant with preempt_count it is
605 * a little cheaper to use a separate counter in the PDA (short of
606 * moving irq_enter into assembly, which would be too much work)
609 incl PER_CPU_VAR(irq_count)
610 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
611 CFI_DEF_CFA_REGISTER rsi
615 * "CFA (Current Frame Address) is the value on stack + offset"
617 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
618 0x77 /* DW_OP_breg7 (rsp) */, 0, \
619 0x06 /* DW_OP_deref */, \
620 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
621 0x22 /* DW_OP_plus */
622 /* We entered an interrupt context - irqs are off: */
629 * The interrupt stubs push (~vector+0x80) onto the stack and
630 * then jump to common_interrupt.
632 .p2align CONFIG_X86_L1_CACHE_SHIFT
636 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
638 /* 0(%rsp): old RSP */
640 DISABLE_INTERRUPTS(CLBR_NONE)
642 decl PER_CPU_VAR(irq_count)
644 /* Restore saved previous stack */
646 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
647 /* return code expects complete pt_regs - adjust rsp accordingly: */
649 CFI_DEF_CFA_REGISTER rsp
650 CFI_ADJUST_CFA_OFFSET RBP
653 GET_THREAD_INFO(%rcx)
657 /* Interrupt came from user space */
659 * Has a correct top of stack.
660 * %rcx: thread info. Interrupts off.
662 retint_with_reschedule:
663 movl $_TIF_WORK_MASK,%edi
666 movl TI_flags(%rcx),%edx
671 retint_swapgs: /* return to user-space */
673 * The iretq could re-enable interrupts:
675 DISABLE_INTERRUPTS(CLBR_ANY)
679 * Try to use SYSRET instead of IRET if we're returning to
680 * a completely clean 64-bit userspace context.
683 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
684 jne opportunistic_sysret_failed
687 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
688 * in kernel space. This essentially lets the user take over
689 * the kernel, since userspace controls RSP. It's not worth
690 * testing for canonicalness exactly -- this check detects any
691 * of the 17 high bits set, which is true for non-canonical
692 * or kernel addresses. (This will pessimize vsyscall=native.
695 * If virtual addresses ever become wider, this will need
696 * to be updated to remain correct on both old and new CPUs.
698 .ifne __VIRTUAL_MASK_SHIFT - 47
699 .error "virtual address width changed -- sysret checks need update"
701 shr $__VIRTUAL_MASK_SHIFT, %rcx
702 jnz opportunistic_sysret_failed
704 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
705 jne opportunistic_sysret_failed
708 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
709 jne opportunistic_sysret_failed
711 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
712 jnz opportunistic_sysret_failed
714 /* nothing to check for RSP */
716 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
717 jne opportunistic_sysret_failed
720 * We win! This label is here just for ease of understanding
721 * perf profiles. Nothing jumps here.
723 irq_return_via_sysret:
725 /* r11 is already restored (see code above) */
726 RESTORE_C_REGS_EXCEPT_R11
731 opportunistic_sysret_failed:
735 retint_restore_args: /* return to kernel space */
736 DISABLE_INTERRUPTS(CLBR_ANY)
738 * The iretq could re-enable interrupts:
743 REMOVE_PT_GPREGS_FROM_STACK 8
750 * Are we returning to a stack segment from the LDT? Note: in
751 * 64-bit mode SS:RSP on the exception stack is always valid.
753 #ifdef CONFIG_X86_ESPFIX64
754 testb $4,(SS-RIP)(%rsp)
755 jnz native_irq_return_ldt
758 .global native_irq_return_iret
759 native_irq_return_iret:
761 * This may fault. Non-paranoid faults on return to userspace are
762 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
763 * Double-faults due to espfix64 are handled in do_double_fault.
764 * Other faults here are fatal.
768 #ifdef CONFIG_X86_ESPFIX64
769 native_irq_return_ldt:
773 movq PER_CPU_VAR(espfix_waddr),%rdi
774 movq %rax,(0*8)(%rdi) /* RAX */
775 movq (2*8)(%rsp),%rax /* RIP */
776 movq %rax,(1*8)(%rdi)
777 movq (3*8)(%rsp),%rax /* CS */
778 movq %rax,(2*8)(%rdi)
779 movq (4*8)(%rsp),%rax /* RFLAGS */
780 movq %rax,(3*8)(%rdi)
781 movq (6*8)(%rsp),%rax /* SS */
782 movq %rax,(5*8)(%rdi)
783 movq (5*8)(%rsp),%rax /* RSP */
784 movq %rax,(4*8)(%rdi)
785 andl $0xffff0000,%eax
787 orq PER_CPU_VAR(espfix_stack),%rax
791 jmp native_irq_return_iret
794 /* edi: workmask, edx: work */
797 bt $TIF_NEED_RESCHED,%edx
800 ENABLE_INTERRUPTS(CLBR_NONE)
804 GET_THREAD_INFO(%rcx)
805 DISABLE_INTERRUPTS(CLBR_NONE)
810 testl $_TIF_DO_NOTIFY_MASK,%edx
813 ENABLE_INTERRUPTS(CLBR_NONE)
815 movq $-1,ORIG_RAX(%rsp)
816 xorl %esi,%esi # oldset
817 movq %rsp,%rdi # &pt_regs
818 call do_notify_resume
820 DISABLE_INTERRUPTS(CLBR_NONE)
822 GET_THREAD_INFO(%rcx)
823 jmp retint_with_reschedule
825 #ifdef CONFIG_PREEMPT
826 /* Returning to kernel space. Check if we need preemption */
827 /* rcx: threadinfo. interrupts off. */
829 cmpl $0,PER_CPU_VAR(__preempt_count)
830 jnz retint_restore_args
831 bt $9,EFLAGS(%rsp) /* interrupts off? */
832 jnc retint_restore_args
833 call preempt_schedule_irq
837 END(common_interrupt)
842 .macro apicinterrupt3 num sym do_sym
854 #ifdef CONFIG_TRACING
855 #define trace(sym) trace_##sym
856 #define smp_trace(sym) smp_trace_##sym
858 .macro trace_apicinterrupt num sym
859 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
862 .macro trace_apicinterrupt num sym do_sym
866 .macro apicinterrupt num sym do_sym
867 apicinterrupt3 \num \sym \do_sym
868 trace_apicinterrupt \num \sym
872 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
873 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
874 apicinterrupt3 REBOOT_VECTOR \
875 reboot_interrupt smp_reboot_interrupt
879 apicinterrupt3 UV_BAU_MESSAGE \
880 uv_bau_message_intr1 uv_bau_message_interrupt
882 apicinterrupt LOCAL_TIMER_VECTOR \
883 apic_timer_interrupt smp_apic_timer_interrupt
884 apicinterrupt X86_PLATFORM_IPI_VECTOR \
885 x86_platform_ipi smp_x86_platform_ipi
887 #ifdef CONFIG_HAVE_KVM
888 apicinterrupt3 POSTED_INTR_VECTOR \
889 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
892 #ifdef CONFIG_X86_MCE_THRESHOLD
893 apicinterrupt THRESHOLD_APIC_VECTOR \
894 threshold_interrupt smp_threshold_interrupt
897 #ifdef CONFIG_X86_THERMAL_VECTOR
898 apicinterrupt THERMAL_APIC_VECTOR \
899 thermal_interrupt smp_thermal_interrupt
903 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
904 call_function_single_interrupt smp_call_function_single_interrupt
905 apicinterrupt CALL_FUNCTION_VECTOR \
906 call_function_interrupt smp_call_function_interrupt
907 apicinterrupt RESCHEDULE_VECTOR \
908 reschedule_interrupt smp_reschedule_interrupt
911 apicinterrupt ERROR_APIC_VECTOR \
912 error_interrupt smp_error_interrupt
913 apicinterrupt SPURIOUS_APIC_VECTOR \
914 spurious_interrupt smp_spurious_interrupt
916 #ifdef CONFIG_IRQ_WORK
917 apicinterrupt IRQ_WORK_VECTOR \
918 irq_work_interrupt smp_irq_work_interrupt
922 * Exception entry points.
924 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
926 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
929 .if \shift_ist != -1 && \paranoid == 0
930 .error "using shift_ist requires paranoid=1"
940 PARAVIRT_ADJUST_EXCEPTION_FRAME
942 .ifeq \has_error_code
943 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
946 ALLOC_PT_GPREGS_ON_STACK
951 testl $3, CS(%rsp) /* If coming from userspace, switch */
958 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
964 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
970 movq %rsp,%rdi /* pt_regs pointer */
973 movq ORIG_RAX(%rsp),%rsi /* get error code */
974 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
976 xorl %esi,%esi /* no error code */
980 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
986 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
989 /* these procedures expect "no swapgs" flag in ebx */
999 * Paranoid entry from userspace. Switch stacks and treat it
1000 * as a normal entry. This means that paranoid handlers
1001 * run in real process context if user_mode(regs).
1008 movq %rsp,%rdi /* pt_regs pointer */
1010 movq %rax,%rsp /* switch stack */
1012 movq %rsp,%rdi /* pt_regs pointer */
1015 movq ORIG_RAX(%rsp),%rsi /* get error code */
1016 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1018 xorl %esi,%esi /* no error code */
1023 jmp error_exit /* %ebx: no swapgs flag */
1030 #ifdef CONFIG_TRACING
1031 .macro trace_idtentry sym do_sym has_error_code:req
1032 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1033 idtentry \sym \do_sym has_error_code=\has_error_code
1036 .macro trace_idtentry sym do_sym has_error_code:req
1037 idtentry \sym \do_sym has_error_code=\has_error_code
1041 idtentry divide_error do_divide_error has_error_code=0
1042 idtentry overflow do_overflow has_error_code=0
1043 idtentry bounds do_bounds has_error_code=0
1044 idtentry invalid_op do_invalid_op has_error_code=0
1045 idtentry device_not_available do_device_not_available has_error_code=0
1046 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1047 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1048 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1049 idtentry segment_not_present do_segment_not_present has_error_code=1
1050 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1051 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1052 idtentry alignment_check do_alignment_check has_error_code=1
1053 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1056 /* Reload gs selector with exception handling */
1057 /* edi: new selector */
1058 ENTRY(native_load_gs_index)
1061 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1065 2: mfence /* workaround */
1070 END(native_load_gs_index)
1072 _ASM_EXTABLE(gs_change,bad_gs)
1073 .section .fixup,"ax"
1074 /* running with kernelgs */
1076 SWAPGS /* switch back to user gs */
1082 /* Call softirq on interrupt stack. Interrupts are off. */
1083 ENTRY(do_softirq_own_stack)
1086 CFI_REL_OFFSET rbp,0
1088 CFI_DEF_CFA_REGISTER rbp
1089 incl PER_CPU_VAR(irq_count)
1090 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1091 push %rbp # backlink for old unwinder
1095 CFI_DEF_CFA_REGISTER rsp
1096 CFI_ADJUST_CFA_OFFSET -8
1097 decl PER_CPU_VAR(irq_count)
1100 END(do_softirq_own_stack)
1103 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1106 * A note on the "critical region" in our callback handler.
1107 * We want to avoid stacking callback handlers due to events occurring
1108 * during handling of the last event. To do this, we keep events disabled
1109 * until we've done all processing. HOWEVER, we must enable events before
1110 * popping the stack frame (can't be done atomically) and so it would still
1111 * be possible to get enough handler activations to overflow the stack.
1112 * Although unlikely, bugs of that kind are hard to track down, so we'd
1113 * like to avoid the possibility.
1114 * So, on entry to the handler we detect whether we interrupted an
1115 * existing activation in its critical region -- if so, we pop the current
1116 * activation and restart the handler using the previous one.
1118 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1121 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1122 * see the correct pointer to the pt_regs
1124 movq %rdi, %rsp # we don't return, adjust the stack frame
1127 11: incl PER_CPU_VAR(irq_count)
1129 CFI_DEF_CFA_REGISTER rbp
1130 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1131 pushq %rbp # backlink for old unwinder
1132 call xen_evtchn_do_upcall
1134 CFI_DEF_CFA_REGISTER rsp
1135 decl PER_CPU_VAR(irq_count)
1136 #ifndef CONFIG_PREEMPT
1137 call xen_maybe_preempt_hcall
1141 END(xen_do_hypervisor_callback)
1144 * Hypervisor uses this for application faults while it executes.
1145 * We get here for two reasons:
1146 * 1. Fault while reloading DS, ES, FS or GS
1147 * 2. Fault while executing IRET
1148 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1149 * registers that could be reloaded and zeroed the others.
1150 * Category 2 we fix up by killing the current process. We cannot use the
1151 * normal Linux return path in this case because if we use the IRET hypercall
1152 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1153 * We distinguish between categories by comparing each saved segment register
1154 * with its current contents: any discrepancy means we in category 1.
1156 ENTRY(xen_failsafe_callback)
1158 /*CFI_REL_OFFSET gs,GS*/
1159 /*CFI_REL_OFFSET fs,FS*/
1160 /*CFI_REL_OFFSET es,ES*/
1161 /*CFI_REL_OFFSET ds,DS*/
1162 CFI_REL_OFFSET r11,8
1163 CFI_REL_OFFSET rcx,0
1177 /* All segments match their saved values => Category 2 (Bad IRET). */
1183 CFI_ADJUST_CFA_OFFSET -0x30
1184 pushq_cfi $0 /* RIP */
1187 jmp general_protection
1189 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1195 CFI_ADJUST_CFA_OFFSET -0x30
1196 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1197 ALLOC_PT_GPREGS_ON_STACK
1202 END(xen_failsafe_callback)
1204 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1205 xen_hvm_callback_vector xen_evtchn_do_upcall
1207 #endif /* CONFIG_XEN */
1209 #if IS_ENABLED(CONFIG_HYPERV)
1210 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1211 hyperv_callback_vector hyperv_vector_handler
1212 #endif /* CONFIG_HYPERV */
1214 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1215 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1216 idtentry stack_segment do_stack_segment has_error_code=1
1218 idtentry xen_debug do_debug has_error_code=0
1219 idtentry xen_int3 do_int3 has_error_code=0
1220 idtentry xen_stack_segment do_stack_segment has_error_code=1
1222 idtentry general_protection do_general_protection has_error_code=1
1223 trace_idtentry page_fault do_page_fault has_error_code=1
1224 #ifdef CONFIG_KVM_GUEST
1225 idtentry async_page_fault do_async_page_fault has_error_code=1
1227 #ifdef CONFIG_X86_MCE
1228 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1232 * Save all registers in pt_regs, and switch gs if needed.
1233 * Use slow, but surefire "are we in kernel?" check.
1234 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1236 ENTRY(paranoid_entry)
1242 movl $MSR_GS_BASE,%ecx
1245 js 1f /* negative -> in kernel */
1253 * "Paranoid" exit path from exception stack. This is invoked
1254 * only on return from non-NMI IST interrupts that came
1255 * from kernel space.
1257 * We may be returning to very strange contexts (e.g. very early
1258 * in syscall entry), so checking for preemption here would
1259 * be complicated. Fortunately, we there's no good reason
1260 * to try to handle preemption here.
1262 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1263 ENTRY(paranoid_exit)
1265 DISABLE_INTERRUPTS(CLBR_NONE)
1266 TRACE_IRQS_OFF_DEBUG
1267 testl %ebx,%ebx /* swapgs needed? */
1268 jnz paranoid_exit_no_swapgs
1271 jmp paranoid_exit_restore
1272 paranoid_exit_no_swapgs:
1273 TRACE_IRQS_IRETQ_DEBUG
1274 paranoid_exit_restore:
1277 REMOVE_PT_GPREGS_FROM_STACK 8
1283 * Save all registers in pt_regs, and switch gs if needed.
1284 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1293 je error_kernelspace
1301 * There are two places in the kernel that can potentially fault with
1302 * usergs. Handle them here. B stepping K8s sometimes report a
1303 * truncated RIP for IRET exceptions returning to compat mode. Check
1304 * for these here too.
1307 CFI_REL_OFFSET rcx, RCX+8
1309 leaq native_irq_return_iret(%rip),%rcx
1310 cmpq %rcx,RIP+8(%rsp)
1312 movl %ecx,%eax /* zero extend */
1313 cmpq %rax,RIP+8(%rsp)
1315 cmpq $gs_change,RIP+8(%rsp)
1320 /* Fix truncated RIP */
1321 movq %rcx,RIP+8(%rsp)
1329 decl %ebx /* Return to usergs */
1335 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1340 DISABLE_INTERRUPTS(CLBR_NONE)
1342 GET_THREAD_INFO(%rcx)
1345 LOCKDEP_SYS_EXIT_IRQ
1346 movl TI_flags(%rcx),%edx
1347 movl $_TIF_WORK_MASK,%edi
1355 * Test if a given stack is an NMI stack or not.
1357 .macro test_in_nmi reg stack nmi_ret normal_ret
1360 subq $EXCEPTION_STKSZ, %\reg
1366 /* runs on exception stack */
1369 PARAVIRT_ADJUST_EXCEPTION_FRAME
1371 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1372 * the iretq it performs will take us out of NMI context.
1373 * This means that we can have nested NMIs where the next
1374 * NMI is using the top of the stack of the previous NMI. We
1375 * can't let it execute because the nested NMI will corrupt the
1376 * stack of the previous NMI. NMI handlers are not re-entrant
1379 * To handle this case we do the following:
1380 * Check the a special location on the stack that contains
1381 * a variable that is set when NMIs are executing.
1382 * The interrupted task's stack is also checked to see if it
1384 * If the variable is not set and the stack is not the NMI
1386 * o Set the special variable on the stack
1387 * o Copy the interrupt frame into a "saved" location on the stack
1388 * o Copy the interrupt frame into a "copy" location on the stack
1389 * o Continue processing the NMI
1390 * If the variable is set or the previous stack is the NMI stack:
1391 * o Modify the "copy" location to jump to the repeate_nmi
1392 * o return back to the first NMI
1394 * Now on exit of the first NMI, we first clear the stack variable
1395 * The NMI stack will tell any nested NMIs at that point that it is
1396 * nested. Then we pop the stack normally with iret, and if there was
1397 * a nested NMI that updated the copy interrupt stack frame, a
1398 * jump will be made to the repeat_nmi code that will handle the second
1402 /* Use %rdx as out temp variable throughout */
1404 CFI_REL_OFFSET rdx, 0
1407 * If %cs was not the kernel segment, then the NMI triggered in user
1408 * space, which means it is definitely not nested.
1410 cmpl $__KERNEL_CS, 16(%rsp)
1414 * Check the special variable on the stack to see if NMIs are
1421 * Now test if the previous stack was an NMI stack.
1422 * We need the double check. We check the NMI stack to satisfy the
1423 * race when the first NMI clears the variable before returning.
1424 * We check the variable because the first NMI could be in a
1425 * breakpoint routine using a breakpoint stack.
1428 test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
1433 * Do nothing if we interrupted the fixup in repeat_nmi.
1434 * It's about to repeat the NMI handler, so we are fine
1435 * with ignoring this one.
1437 movq $repeat_nmi, %rdx
1440 movq $end_repeat_nmi, %rdx
1445 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1446 leaq -1*8(%rsp), %rdx
1448 CFI_ADJUST_CFA_OFFSET 1*8
1449 leaq -10*8(%rsp), %rdx
1450 pushq_cfi $__KERNEL_DS
1453 pushq_cfi $__KERNEL_CS
1454 pushq_cfi $repeat_nmi
1456 /* Put stack back */
1458 CFI_ADJUST_CFA_OFFSET -6*8
1464 /* No need to check faults here */
1470 * Because nested NMIs will use the pushed location that we
1471 * stored in rdx, we must keep that space available.
1472 * Here's what our stack frame will look like:
1473 * +-------------------------+
1475 * | original Return RSP |
1476 * | original RFLAGS |
1479 * +-------------------------+
1480 * | temp storage for rdx |
1481 * +-------------------------+
1482 * | NMI executing variable |
1483 * +-------------------------+
1485 * | copied Return RSP |
1489 * +-------------------------+
1491 * | Saved Return RSP |
1495 * +-------------------------+
1497 * +-------------------------+
1499 * The saved stack frame is used to fix up the copied stack frame
1500 * that a nested NMI may change to make the interrupted NMI iret jump
1501 * to the repeat_nmi. The original stack frame and the temp storage
1502 * is also used by nested NMIs and can not be trusted on exit.
1504 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1508 /* Set the NMI executing variable on the stack. */
1512 * Leave room for the "copied" frame
1515 CFI_ADJUST_CFA_OFFSET 5*8
1517 /* Copy the stack frame to the Saved frame */
1519 pushq_cfi 11*8(%rsp)
1521 CFI_DEF_CFA_OFFSET 5*8
1523 /* Everything up to here is safe from nested NMIs */
1526 * If there was a nested NMI, the first NMI's iret will return
1527 * here. But NMIs are still enabled and we can take another
1528 * nested NMI. The nested NMI checks the interrupted RIP to see
1529 * if it is between repeat_nmi and end_repeat_nmi, and if so
1530 * it will just return, as we are about to repeat an NMI anyway.
1531 * This makes it safe to copy to the stack frame that a nested
1536 * Update the stack variable to say we are still in NMI (the update
1537 * is benign for the non-repeat case, where 1 was pushed just above
1538 * to this very stack slot).
1542 /* Make another copy, this one may be modified by nested NMIs */
1544 CFI_ADJUST_CFA_OFFSET -10*8
1546 pushq_cfi -6*8(%rsp)
1549 CFI_DEF_CFA_OFFSET 5*8
1553 * Everything below this point can be preempted by a nested
1554 * NMI if the first NMI took an exception and reset our iret stack
1555 * so that we repeat another NMI.
1557 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1558 ALLOC_PT_GPREGS_ON_STACK
1561 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1562 * as we should not be calling schedule in NMI context.
1563 * Even with normal interrupts enabled. An NMI should not be
1564 * setting NEED_RESCHED or anything that normal interrupts and
1565 * exceptions might do.
1571 * Save off the CR2 register. If we take a page fault in the NMI then
1572 * it could corrupt the CR2 value. If the NMI preempts a page fault
1573 * handler before it was able to read the CR2 register, and then the
1574 * NMI itself takes a page fault, the page fault that was preempted
1575 * will read the information from the NMI page fault and not the
1576 * origin fault. Save it off and restore it if it changes.
1577 * Use the r12 callee-saved register.
1581 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1586 /* Did the NMI take a page fault? Restore cr2 if it did */
1593 testl %ebx,%ebx /* swapgs needed? */
1600 /* Pop the extra iret frame at once */
1601 REMOVE_PT_GPREGS_FROM_STACK 6*8
1603 /* Clear the NMI executing stack variable */
1609 ENTRY(ignore_sysret)