2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/tlbflush.h>
17 #include <asm/uaccess.h>
18 #include <asm/ptrace.h>
20 #include <asm/fpu-internal.h>
23 static DEFINE_PER_CPU(bool, in_kernel_fpu);
25 void kernel_fpu_disable(void)
27 WARN_ON(this_cpu_read(in_kernel_fpu));
28 this_cpu_write(in_kernel_fpu, true);
31 void kernel_fpu_enable(void)
33 this_cpu_write(in_kernel_fpu, false);
37 * Were we in an interrupt that interrupted kernel mode?
39 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
40 * pair does nothing at all: the thread must not have fpu (so
41 * that we don't try to save the FPU state), and TS must
42 * be set (so that the clts/stts pair does nothing that is
43 * visible in the interrupted kernel thread).
45 * Except for the eagerfpu case when we return true; in the likely case
46 * the thread has FPU but we are not going to set/clear TS.
48 static inline bool interrupted_kernel_fpu_idle(void)
50 if (this_cpu_read(in_kernel_fpu))
56 return !__thread_has_fpu(current) &&
57 (read_cr0() & X86_CR0_TS);
61 * Were we in user mode (or vm86 mode) when we were
64 * Doing kernel_fpu_begin/end() is ok if we are running
65 * in an interrupt context from user mode - we'll just
66 * save the FPU state as required.
68 static inline bool interrupted_user_mode(void)
70 struct pt_regs *regs = get_irq_regs();
71 return regs && user_mode(regs);
75 * Can we use the FPU in kernel mode with the
76 * whole "kernel_fpu_begin/end()" sequence?
78 * It's always ok in process context (ie "not interrupt")
79 * but it is sometimes ok even from an irq.
81 bool irq_fpu_usable(void)
83 return !in_interrupt() ||
84 interrupted_user_mode() ||
85 interrupted_kernel_fpu_idle();
87 EXPORT_SYMBOL(irq_fpu_usable);
89 void __kernel_fpu_begin(void)
91 struct task_struct *me = current;
93 this_cpu_write(in_kernel_fpu, true);
95 if (__thread_has_fpu(me)) {
98 this_cpu_write(fpu_owner_task, NULL);
103 EXPORT_SYMBOL(__kernel_fpu_begin);
105 void __kernel_fpu_end(void)
107 struct task_struct *me = current;
109 if (__thread_has_fpu(me)) {
110 if (WARN_ON(restore_fpu_checking(me)))
112 } else if (!use_eager_fpu()) {
116 this_cpu_write(in_kernel_fpu, false);
118 EXPORT_SYMBOL(__kernel_fpu_end);
121 * Save the FPU state (initialize it if necessary):
123 * This only ever gets called for the current task.
125 void fpu__save(struct task_struct *tsk)
127 WARN_ON(tsk != current);
130 if (__thread_has_fpu(tsk)) {
131 if (use_eager_fpu()) {
134 __save_init_fpu(tsk);
135 __thread_fpu_end(tsk);
140 EXPORT_SYMBOL_GPL(fpu__save);
142 void fpstate_init(struct fpu *fpu)
145 finit_soft_fpu(&fpu->state->soft);
149 memset(fpu->state, 0, xstate_size);
152 fx_finit(&fpu->state->fxsave);
154 struct i387_fsave_struct *fp = &fpu->state->fsave;
155 fp->cwd = 0xffff037fu;
156 fp->swd = 0xffff0000u;
157 fp->twd = 0xffffffffu;
158 fp->fos = 0xffff0000u;
161 EXPORT_SYMBOL_GPL(fpstate_init);
163 int fpstate_alloc(struct fpu *fpu)
168 fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
172 /* The CPU requires the FPU state to be aligned to 16 byte boundaries: */
173 WARN_ON((unsigned long)fpu->state & 15);
177 EXPORT_SYMBOL_GPL(fpstate_alloc);
180 * Allocate the backing store for the current task's FPU registers
181 * and initialize the registers themselves as well.
185 int fpstate_alloc_init(struct task_struct *curr)
189 if (WARN_ON_ONCE(curr != current))
191 if (WARN_ON_ONCE(curr->flags & PF_USED_MATH))
195 * Memory allocation at the first usage of the FPU and other state.
197 ret = fpstate_alloc(&curr->thread.fpu);
201 fpstate_init(&curr->thread.fpu);
203 /* Safe to do for the current task: */
204 curr->flags |= PF_USED_MATH;
208 EXPORT_SYMBOL_GPL(fpstate_alloc_init);
211 * The _current_ task is using the FPU for the first time
212 * so initialize it and set the mxcsr to its default
213 * value at reset if we support XMM instructions and then
214 * remember the current task has used the FPU.
216 static int fpu__unlazy_stopped(struct task_struct *child)
220 if (WARN_ON_ONCE(child == current))
223 if (child->flags & PF_USED_MATH) {
224 task_disable_lazy_fpu_restore(child);
229 * Memory allocation at the first usage of the FPU and other state.
231 ret = fpstate_alloc(&child->thread.fpu);
235 fpstate_init(&child->thread.fpu);
237 /* Safe to do for stopped child tasks: */
238 child->flags |= PF_USED_MATH;
244 * The xstateregs_active() routine is the same as the fpregs_active() routine,
245 * as the "regset->n" for the xstate regset will be updated based on the feature
246 * capabilites supported by the xsave.
248 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
250 return tsk_used_math(target) ? regset->n : 0;
253 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
255 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
258 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
259 unsigned int pos, unsigned int count,
260 void *kbuf, void __user *ubuf)
267 ret = fpu__unlazy_stopped(target);
271 sanitize_i387_state(target);
273 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
274 &target->thread.fpu.state->fxsave, 0, -1);
277 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
278 unsigned int pos, unsigned int count,
279 const void *kbuf, const void __user *ubuf)
286 ret = fpu__unlazy_stopped(target);
290 sanitize_i387_state(target);
292 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
293 &target->thread.fpu.state->fxsave, 0, -1);
296 * mxcsr reserved bits must be masked to zero for security reasons.
298 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
301 * update the header bits in the xsave header, indicating the
302 * presence of FP and SSE state.
305 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
310 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
311 unsigned int pos, unsigned int count,
312 void *kbuf, void __user *ubuf)
314 struct xsave_struct *xsave;
320 ret = fpu__unlazy_stopped(target);
324 xsave = &target->thread.fpu.state->xsave;
327 * Copy the 48bytes defined by the software first into the xstate
328 * memory layout in the thread struct, so that we can copy the entire
329 * xstateregs to the user using one user_regset_copyout().
331 memcpy(&xsave->i387.sw_reserved,
332 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
334 * Copy the xstate memory layout.
336 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
340 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
341 unsigned int pos, unsigned int count,
342 const void *kbuf, const void __user *ubuf)
344 struct xsave_struct *xsave;
350 ret = fpu__unlazy_stopped(target);
354 xsave = &target->thread.fpu.state->xsave;
356 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
358 * mxcsr reserved bits must be masked to zero for security reasons.
360 xsave->i387.mxcsr &= mxcsr_feature_mask;
361 xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
363 * These bits must be zero.
365 memset(&xsave->xsave_hdr.reserved, 0, 48);
369 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
372 * FPU tag word conversions.
375 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
377 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
379 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
381 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
382 /* and move the valid bits to the lower byte. */
383 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
384 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
385 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
390 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
391 #define FP_EXP_TAG_VALID 0
392 #define FP_EXP_TAG_ZERO 1
393 #define FP_EXP_TAG_SPECIAL 2
394 #define FP_EXP_TAG_EMPTY 3
396 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
399 u32 tos = (fxsave->swd >> 11) & 7;
400 u32 twd = (unsigned long) fxsave->twd;
402 u32 ret = 0xffff0000u;
405 for (i = 0; i < 8; i++, twd >>= 1) {
407 st = FPREG_ADDR(fxsave, (i - tos) & 7);
409 switch (st->exponent & 0x7fff) {
411 tag = FP_EXP_TAG_SPECIAL;
414 if (!st->significand[0] &&
415 !st->significand[1] &&
416 !st->significand[2] &&
418 tag = FP_EXP_TAG_ZERO;
420 tag = FP_EXP_TAG_SPECIAL;
423 if (st->significand[3] & 0x8000)
424 tag = FP_EXP_TAG_VALID;
426 tag = FP_EXP_TAG_SPECIAL;
430 tag = FP_EXP_TAG_EMPTY;
432 ret |= tag << (2 * i);
438 * FXSR floating point environment conversions.
442 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
444 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
445 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
446 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
449 env->cwd = fxsave->cwd | 0xffff0000u;
450 env->swd = fxsave->swd | 0xffff0000u;
451 env->twd = twd_fxsr_to_i387(fxsave);
454 env->fip = fxsave->rip;
455 env->foo = fxsave->rdp;
457 * should be actually ds/cs at fpu exception time, but
458 * that information is not available in 64bit mode.
460 env->fcs = task_pt_regs(tsk)->cs;
461 if (tsk == current) {
462 savesegment(ds, env->fos);
464 env->fos = tsk->thread.ds;
466 env->fos |= 0xffff0000;
468 env->fip = fxsave->fip;
469 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
470 env->foo = fxsave->foo;
471 env->fos = fxsave->fos;
474 for (i = 0; i < 8; ++i)
475 memcpy(&to[i], &from[i], sizeof(to[0]));
478 void convert_to_fxsr(struct task_struct *tsk,
479 const struct user_i387_ia32_struct *env)
482 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
483 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
484 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
487 fxsave->cwd = env->cwd;
488 fxsave->swd = env->swd;
489 fxsave->twd = twd_i387_to_fxsr(env->twd);
490 fxsave->fop = (u16) ((u32) env->fcs >> 16);
492 fxsave->rip = env->fip;
493 fxsave->rdp = env->foo;
494 /* cs and ds ignored */
496 fxsave->fip = env->fip;
497 fxsave->fcs = (env->fcs & 0xffff);
498 fxsave->foo = env->foo;
499 fxsave->fos = env->fos;
502 for (i = 0; i < 8; ++i)
503 memcpy(&to[i], &from[i], sizeof(from[0]));
506 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
507 unsigned int pos, unsigned int count,
508 void *kbuf, void __user *ubuf)
510 struct user_i387_ia32_struct env;
513 ret = fpu__unlazy_stopped(target);
517 if (!static_cpu_has(X86_FEATURE_FPU))
518 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
521 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
522 &target->thread.fpu.state->fsave, 0,
525 sanitize_i387_state(target);
527 if (kbuf && pos == 0 && count == sizeof(env)) {
528 convert_from_fxsr(kbuf, target);
532 convert_from_fxsr(&env, target);
534 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
537 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
538 unsigned int pos, unsigned int count,
539 const void *kbuf, const void __user *ubuf)
541 struct user_i387_ia32_struct env;
544 ret = fpu__unlazy_stopped(target);
548 sanitize_i387_state(target);
550 if (!static_cpu_has(X86_FEATURE_FPU))
551 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
554 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
555 &target->thread.fpu.state->fsave, 0,
558 if (pos > 0 || count < sizeof(env))
559 convert_from_fxsr(&env, target);
561 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
563 convert_to_fxsr(target, &env);
566 * update the header bit in the xsave header, indicating the
570 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
575 * FPU state for core dumps.
576 * This is only used for a.out dumps now.
577 * It is declared generically using elf_fpregset_t (which is
578 * struct user_i387_struct) but is in fact only used for 32-bit
579 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
581 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
583 struct task_struct *tsk = current;
586 fpvalid = !!used_math();
588 fpvalid = !fpregs_get(tsk, NULL,
589 0, sizeof(struct user_i387_ia32_struct),
594 EXPORT_SYMBOL(dump_fpu);
596 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
598 static int __init no_387(char *s)
600 setup_clear_cpu_cap(X86_FEATURE_FPU);
604 __setup("no387", no_387);
607 * Set the X86_FEATURE_FPU CPU-capability bit based on
608 * trying to execute an actual sequence of FPU instructions:
610 void fpu__detect(struct cpuinfo_x86 *c)
618 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
621 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
622 : "+m" (fsw), "+m" (fcw));
624 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
625 set_cpu_cap(c, X86_FEATURE_FPU);
627 clear_cpu_cap(c, X86_FEATURE_FPU);
629 /* The final cr0 value is set in fpu_init() */