arch/x86/kernel/fpu/core.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <asm/fpu-internal.h>
   9
  10 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  11
  12 void kernel_fpu_disable(void)
  13 {
  14         WARN_ON(this_cpu_read(in_kernel_fpu));
  15         this_cpu_write(in_kernel_fpu, true);
  16 }
  17
  18 void kernel_fpu_enable(void)
  19 {
  20         this_cpu_write(in_kernel_fpu, false);
  21 }
  22
  23 /*
  24  * Were we in an interrupt that interrupted kernel mode?
  25  *
  26  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  27  * pair does nothing at all: the thread must not have fpu (so
  28  * that we don't try to save the FPU state), and TS must
  29  * be set (so that the clts/stts pair does nothing that is
  30  * visible in the interrupted kernel thread).
  31  *
  32  * Except for the eagerfpu case when we return true; in the likely case
  33  * the thread has FPU but we are not going to set/clear TS.
  34  */
  35 static inline bool interrupted_kernel_fpu_idle(void)
  36 {
  37         if (this_cpu_read(in_kernel_fpu))
  38                 return false;
  39
  40         if (use_eager_fpu())
  41                 return true;
  42
  43         return !__thread_has_fpu(current) &&
  44                 (read_cr0() & X86_CR0_TS);
  45 }
  46
  47 /*
  48  * Were we in user mode (or vm86 mode) when we were
  49  * interrupted?
  50  *
  51  * Doing kernel_fpu_begin/end() is ok if we are running
  52  * in an interrupt context from user mode - we'll just
  53  * save the FPU state as required.
  54  */
  55 static inline bool interrupted_user_mode(void)
  56 {
  57         struct pt_regs *regs = get_irq_regs();
  58         return regs && user_mode(regs);
  59 }
  60
  61 /*
  62  * Can we use the FPU in kernel mode with the
  63  * whole "kernel_fpu_begin/end()" sequence?
  64  *
  65  * It's always ok in process context (ie "not interrupt")
  66  * but it is sometimes ok even from an irq.
  67  */
  68 bool irq_fpu_usable(void)
  69 {
  70         return !in_interrupt() ||
  71                 interrupted_user_mode() ||
  72                 interrupted_kernel_fpu_idle();
  73 }
  74 EXPORT_SYMBOL(irq_fpu_usable);
  75
  76 void __kernel_fpu_begin(void)
  77 {
  78         struct task_struct *me = current;
  79
  80         this_cpu_write(in_kernel_fpu, true);
  81
  82         if (__thread_has_fpu(me)) {
  83                 __save_init_fpu(me);
  84         } else {
  85                 this_cpu_write(fpu_owner_task, NULL);
  86                 if (!use_eager_fpu())
  87                         clts();
  88         }
  89 }
  90 EXPORT_SYMBOL(__kernel_fpu_begin);
  91
  92 void __kernel_fpu_end(void)
  93 {
  94         struct task_struct *me = current;
  95
  96         if (__thread_has_fpu(me)) {
  97                 if (WARN_ON(restore_fpu_checking(me)))
  98                         fpu_reset_state(me);
  99         } else if (!use_eager_fpu()) {
 100                 stts();
 101         }
 102
 103         this_cpu_write(in_kernel_fpu, false);
 104 }
 105 EXPORT_SYMBOL(__kernel_fpu_end);
 106
 107 /*
 108  * Save the FPU state (initialize it if necessary):
 109  *
 110  * This only ever gets called for the current task.
 111  */
 112 void fpu__save(struct task_struct *tsk)
 113 {
 114         WARN_ON(tsk != current);
 115
 116         preempt_disable();
 117         if (__thread_has_fpu(tsk)) {
 118                 if (use_eager_fpu()) {
 119                         __save_fpu(tsk);
 120                 } else {
 121                         __save_init_fpu(tsk);
 122                         __thread_fpu_end(tsk);
 123                 }
 124         }
 125         preempt_enable();
 126 }
 127 EXPORT_SYMBOL_GPL(fpu__save);
 128
 129 void fpstate_init(struct fpu *fpu)
 130 {
 131         if (!cpu_has_fpu) {
 132                 finit_soft_fpu(&fpu->state->soft);
 133                 return;
 134         }
 135
 136         memset(fpu->state, 0, xstate_size);
 137
 138         if (cpu_has_fxsr) {
 139                 fx_finit(&fpu->state->fxsave);
 140         } else {
 141                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 142                 fp->cwd = 0xffff037fu;
 143                 fp->swd = 0xffff0000u;
 144                 fp->twd = 0xffffffffu;
 145                 fp->fos = 0xffff0000u;
 146         }
 147 }
 148 EXPORT_SYMBOL_GPL(fpstate_init);
 149
 150 int fpstate_alloc(struct fpu *fpu)
 151 {
 152         if (fpu->state)
 153                 return 0;
 154
 155         fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
 156         if (!fpu->state)
 157                 return -ENOMEM;
 158
 159         /* The CPU requires the FPU state to be aligned to 16 byte boundaries: */
 160         WARN_ON((unsigned long)fpu->state & 15);
 161
 162         return 0;
 163 }
 164 EXPORT_SYMBOL_GPL(fpstate_alloc);
 165
 166 /*
 167  * Allocate the backing store for the current task's FPU registers
 168  * and initialize the registers themselves as well.
 169  *
 170  * Can fail.
 171  */
 172 int fpstate_alloc_init(struct task_struct *curr)
 173 {
 174         int ret;
 175
 176         if (WARN_ON_ONCE(curr != current))
 177                 return -EINVAL;
 178         if (WARN_ON_ONCE(curr->flags & PF_USED_MATH))
 179                 return -EINVAL;
 180
 181         /*
 182          * Memory allocation at the first usage of the FPU and other state.
 183          */
 184         ret = fpstate_alloc(&curr->thread.fpu);
 185         if (ret)
 186                 return ret;
 187
 188         fpstate_init(&curr->thread.fpu);
 189
 190         /* Safe to do for the current task: */
 191         curr->flags |= PF_USED_MATH;
 192
 193         return 0;
 194 }
 195 EXPORT_SYMBOL_GPL(fpstate_alloc_init);
 196
 197 /*
 198  * The _current_ task is using the FPU for the first time
 199  * so initialize it and set the mxcsr to its default
 200  * value at reset if we support XMM instructions and then
 201  * remember the current task has used the FPU.
 202  */
 203 static int fpu__unlazy_stopped(struct task_struct *child)
 204 {
 205         int ret;
 206
 207         if (WARN_ON_ONCE(child == current))
 208                 return -EINVAL;
 209
 210         if (child->flags & PF_USED_MATH) {
 211                 task_disable_lazy_fpu_restore(child);
 212                 return 0;
 213         }
 214
 215         /*
 216          * Memory allocation at the first usage of the FPU and other state.
 217          */
 218         ret = fpstate_alloc(&child->thread.fpu);
 219         if (ret)
 220                 return ret;
 221
 222         fpstate_init(&child->thread.fpu);
 223
 224         /* Safe to do for stopped child tasks: */
 225         child->flags |= PF_USED_MATH;
 226
 227         return 0;
 228 }
 229
 230 /*
 231  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 232  * as the "regset->n" for the xstate regset will be updated based on the feature
 233  * capabilites supported by the xsave.
 234  */
 235 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 236 {
 237         return tsk_used_math(target) ? regset->n : 0;
 238 }
 239
 240 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 241 {
 242         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 243 }
 244
 245 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 246                 unsigned int pos, unsigned int count,
 247                 void *kbuf, void __user *ubuf)
 248 {
 249         int ret;
 250
 251         if (!cpu_has_fxsr)
 252                 return -ENODEV;
 253
 254         ret = fpu__unlazy_stopped(target);
 255         if (ret)
 256                 return ret;
 257
 258         sanitize_i387_state(target);
 259
 260         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 261                                    &target->thread.fpu.state->fxsave, 0, -1);
 262 }
 263
 264 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 265                 unsigned int pos, unsigned int count,
 266                 const void *kbuf, const void __user *ubuf)
 267 {
 268         int ret;
 269
 270         if (!cpu_has_fxsr)
 271                 return -ENODEV;
 272
 273         ret = fpu__unlazy_stopped(target);
 274         if (ret)
 275                 return ret;
 276
 277         sanitize_i387_state(target);
 278
 279         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 280                                  &target->thread.fpu.state->fxsave, 0, -1);
 281
 282         /*
 283          * mxcsr reserved bits must be masked to zero for security reasons.
 284          */
 285         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 286
 287         /*
 288          * update the header bits in the xsave header, indicating the
 289          * presence of FP and SSE state.
 290          */
 291         if (cpu_has_xsave)
 292                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 293
 294         return ret;
 295 }
 296
 297 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 298                 unsigned int pos, unsigned int count,
 299                 void *kbuf, void __user *ubuf)
 300 {
 301         struct xsave_struct *xsave;
 302         int ret;
 303
 304         if (!cpu_has_xsave)
 305                 return -ENODEV;
 306
 307         ret = fpu__unlazy_stopped(target);
 308         if (ret)
 309                 return ret;
 310
 311         xsave = &target->thread.fpu.state->xsave;
 312
 313         /*
 314          * Copy the 48bytes defined by the software first into the xstate
 315          * memory layout in the thread struct, so that we can copy the entire
 316          * xstateregs to the user using one user_regset_copyout().
 317          */
 318         memcpy(&xsave->i387.sw_reserved,
 319                 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 320         /*
 321          * Copy the xstate memory layout.
 322          */
 323         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 324         return ret;
 325 }
 326
 327 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 328                   unsigned int pos, unsigned int count,
 329                   const void *kbuf, const void __user *ubuf)
 330 {
 331         struct xsave_struct *xsave;
 332         int ret;
 333
 334         if (!cpu_has_xsave)
 335                 return -ENODEV;
 336
 337         ret = fpu__unlazy_stopped(target);
 338         if (ret)
 339                 return ret;
 340
 341         xsave = &target->thread.fpu.state->xsave;
 342
 343         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 344         /*
 345          * mxcsr reserved bits must be masked to zero for security reasons.
 346          */
 347         xsave->i387.mxcsr &= mxcsr_feature_mask;
 348         xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
 349         /*
 350          * These bits must be zero.
 351          */
 352         memset(&xsave->xsave_hdr.reserved, 0, 48);
 353         return ret;
 354 }
 355
 356 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 357
 358 /*
 359  * FPU tag word conversions.
 360  */
 361
 362 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 363 {
 364         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 365
 366         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 367         tmp = ~twd;
 368         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 369         /* and move the valid bits to the lower byte. */
 370         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 371         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 372         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 373
 374         return tmp;
 375 }
 376
 377 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 378 #define FP_EXP_TAG_VALID        0
 379 #define FP_EXP_TAG_ZERO         1
 380 #define FP_EXP_TAG_SPECIAL      2
 381 #define FP_EXP_TAG_EMPTY        3
 382
 383 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 384 {
 385         struct _fpxreg *st;
 386         u32 tos = (fxsave->swd >> 11) & 7;
 387         u32 twd = (unsigned long) fxsave->twd;
 388         u32 tag;
 389         u32 ret = 0xffff0000u;
 390         int i;
 391
 392         for (i = 0; i < 8; i++, twd >>= 1) {
 393                 if (twd & 0x1) {
 394                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 395
 396                         switch (st->exponent & 0x7fff) {
 397                         case 0x7fff:
 398                                 tag = FP_EXP_TAG_SPECIAL;
 399                                 break;
 400                         case 0x0000:
 401                                 if (!st->significand[0] &&
 402                                     !st->significand[1] &&
 403                                     !st->significand[2] &&
 404                                     !st->significand[3])
 405                                         tag = FP_EXP_TAG_ZERO;
 406                                 else
 407                                         tag = FP_EXP_TAG_SPECIAL;
 408                                 break;
 409                         default:
 410                                 if (st->significand[3] & 0x8000)
 411                                         tag = FP_EXP_TAG_VALID;
 412                                 else
 413                                         tag = FP_EXP_TAG_SPECIAL;
 414                                 break;
 415                         }
 416                 } else {
 417                         tag = FP_EXP_TAG_EMPTY;
 418                 }
 419                 ret |= tag << (2 * i);
 420         }
 421         return ret;
 422 }
 423
 424 /*
 425  * FXSR floating point environment conversions.
 426  */
 427
 428 void
 429 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 430 {
 431         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 432         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 433         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 434         int i;
 435
 436         env->cwd = fxsave->cwd | 0xffff0000u;
 437         env->swd = fxsave->swd | 0xffff0000u;
 438         env->twd = twd_fxsr_to_i387(fxsave);
 439
 440 #ifdef CONFIG_X86_64
 441         env->fip = fxsave->rip;
 442         env->foo = fxsave->rdp;
 443         /*
 444          * should be actually ds/cs at fpu exception time, but
 445          * that information is not available in 64bit mode.
 446          */
 447         env->fcs = task_pt_regs(tsk)->cs;
 448         if (tsk == current) {
 449                 savesegment(ds, env->fos);
 450         } else {
 451                 env->fos = tsk->thread.ds;
 452         }
 453         env->fos |= 0xffff0000;
 454 #else
 455         env->fip = fxsave->fip;
 456         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 457         env->foo = fxsave->foo;
 458         env->fos = fxsave->fos;
 459 #endif
 460
 461         for (i = 0; i < 8; ++i)
 462                 memcpy(&to[i], &from[i], sizeof(to[0]));
 463 }
 464
 465 void convert_to_fxsr(struct task_struct *tsk,
 466                      const struct user_i387_ia32_struct *env)
 467
 468 {
 469         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 470         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 471         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 472         int i;
 473
 474         fxsave->cwd = env->cwd;
 475         fxsave->swd = env->swd;
 476         fxsave->twd = twd_i387_to_fxsr(env->twd);
 477         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 478 #ifdef CONFIG_X86_64
 479         fxsave->rip = env->fip;
 480         fxsave->rdp = env->foo;
 481         /* cs and ds ignored */
 482 #else
 483         fxsave->fip = env->fip;
 484         fxsave->fcs = (env->fcs & 0xffff);
 485         fxsave->foo = env->foo;
 486         fxsave->fos = env->fos;
 487 #endif
 488
 489         for (i = 0; i < 8; ++i)
 490                 memcpy(&to[i], &from[i], sizeof(from[0]));
 491 }
 492
 493 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 494                unsigned int pos, unsigned int count,
 495                void *kbuf, void __user *ubuf)
 496 {
 497         struct user_i387_ia32_struct env;
 498         int ret;
 499
 500         ret = fpu__unlazy_stopped(target);
 501         if (ret)
 502                 return ret;
 503
 504         if (!static_cpu_has(X86_FEATURE_FPU))
 505                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 506
 507         if (!cpu_has_fxsr)
 508                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 509                                            &target->thread.fpu.state->fsave, 0,
 510                                            -1);
 511
 512         sanitize_i387_state(target);
 513
 514         if (kbuf && pos == 0 && count == sizeof(env)) {
 515                 convert_from_fxsr(kbuf, target);
 516                 return 0;
 517         }
 518
 519         convert_from_fxsr(&env, target);
 520
 521         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 522 }
 523
 524 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 525                unsigned int pos, unsigned int count,
 526                const void *kbuf, const void __user *ubuf)
 527 {
 528         struct user_i387_ia32_struct env;
 529         int ret;
 530
 531         ret = fpu__unlazy_stopped(target);
 532         if (ret)
 533                 return ret;
 534
 535         sanitize_i387_state(target);
 536
 537         if (!static_cpu_has(X86_FEATURE_FPU))
 538                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 539
 540         if (!cpu_has_fxsr)
 541                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 542                                           &target->thread.fpu.state->fsave, 0,
 543                                           -1);
 544
 545         if (pos > 0 || count < sizeof(env))
 546                 convert_from_fxsr(&env, target);
 547
 548         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 549         if (!ret)
 550                 convert_to_fxsr(target, &env);
 551
 552         /*
 553          * update the header bit in the xsave header, indicating the
 554          * presence of FP.
 555          */
 556         if (cpu_has_xsave)
 557                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 558         return ret;
 559 }
 560
 561 /*
 562  * FPU state for core dumps.
 563  * This is only used for a.out dumps now.
 564  * It is declared generically using elf_fpregset_t (which is
 565  * struct user_i387_struct) but is in fact only used for 32-bit
 566  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 567  */
 568 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 569 {
 570         struct task_struct *tsk = current;
 571         int fpvalid;
 572
 573         fpvalid = !!used_math();
 574         if (fpvalid)
 575                 fpvalid = !fpregs_get(tsk, NULL,
 576                                       0, sizeof(struct user_i387_ia32_struct),
 577                                       fpu, NULL);
 578
 579         return fpvalid;
 580 }
 581 EXPORT_SYMBOL(dump_fpu);
 582
 583 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */