2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <asm/fpu-internal.h>
10 static DEFINE_PER_CPU(bool, in_kernel_fpu);
12 void kernel_fpu_disable(void)
14 WARN_ON(this_cpu_read(in_kernel_fpu));
15 this_cpu_write(in_kernel_fpu, true);
18 void kernel_fpu_enable(void)
20 this_cpu_write(in_kernel_fpu, false);
24 * Were we in an interrupt that interrupted kernel mode?
26 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
27 * pair does nothing at all: the thread must not have fpu (so
28 * that we don't try to save the FPU state), and TS must
29 * be set (so that the clts/stts pair does nothing that is
30 * visible in the interrupted kernel thread).
32 * Except for the eagerfpu case when we return true; in the likely case
33 * the thread has FPU but we are not going to set/clear TS.
35 static inline bool interrupted_kernel_fpu_idle(void)
37 if (this_cpu_read(in_kernel_fpu))
43 return !__thread_has_fpu(current) &&
44 (read_cr0() & X86_CR0_TS);
48 * Were we in user mode (or vm86 mode) when we were
51 * Doing kernel_fpu_begin/end() is ok if we are running
52 * in an interrupt context from user mode - we'll just
53 * save the FPU state as required.
55 static inline bool interrupted_user_mode(void)
57 struct pt_regs *regs = get_irq_regs();
58 return regs && user_mode(regs);
62 * Can we use the FPU in kernel mode with the
63 * whole "kernel_fpu_begin/end()" sequence?
65 * It's always ok in process context (ie "not interrupt")
66 * but it is sometimes ok even from an irq.
68 bool irq_fpu_usable(void)
70 return !in_interrupt() ||
71 interrupted_user_mode() ||
72 interrupted_kernel_fpu_idle();
74 EXPORT_SYMBOL(irq_fpu_usable);
76 void __kernel_fpu_begin(void)
78 struct task_struct *me = current;
80 this_cpu_write(in_kernel_fpu, true);
82 if (__thread_has_fpu(me)) {
85 this_cpu_write(fpu_owner_task, NULL);
90 EXPORT_SYMBOL(__kernel_fpu_begin);
92 void __kernel_fpu_end(void)
94 struct task_struct *me = current;
96 if (__thread_has_fpu(me)) {
97 if (WARN_ON(restore_fpu_checking(me)))
99 } else if (!use_eager_fpu()) {
103 this_cpu_write(in_kernel_fpu, false);
105 EXPORT_SYMBOL(__kernel_fpu_end);
108 * Save the FPU state (initialize it if necessary):
110 * This only ever gets called for the current task.
112 void fpu__save(struct task_struct *tsk)
114 WARN_ON(tsk != current);
117 if (__thread_has_fpu(tsk)) {
118 if (use_eager_fpu()) {
121 __save_init_fpu(tsk);
122 __thread_fpu_end(tsk);
127 EXPORT_SYMBOL_GPL(fpu__save);
129 void fpstate_init(struct fpu *fpu)
132 finit_soft_fpu(&fpu->state->soft);
136 memset(fpu->state, 0, xstate_size);
139 fx_finit(&fpu->state->fxsave);
141 struct i387_fsave_struct *fp = &fpu->state->fsave;
142 fp->cwd = 0xffff037fu;
143 fp->swd = 0xffff0000u;
144 fp->twd = 0xffffffffu;
145 fp->fos = 0xffff0000u;
148 EXPORT_SYMBOL_GPL(fpstate_init);
150 int fpstate_alloc(struct fpu *fpu)
155 fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
159 /* The CPU requires the FPU state to be aligned to 16 byte boundaries: */
160 WARN_ON((unsigned long)fpu->state & 15);
164 EXPORT_SYMBOL_GPL(fpstate_alloc);
167 * Allocate the backing store for the current task's FPU registers
168 * and initialize the registers themselves as well.
172 int fpstate_alloc_init(struct task_struct *curr)
176 if (WARN_ON_ONCE(curr != current))
178 if (WARN_ON_ONCE(curr->flags & PF_USED_MATH))
182 * Memory allocation at the first usage of the FPU and other state.
184 ret = fpstate_alloc(&curr->thread.fpu);
188 fpstate_init(&curr->thread.fpu);
190 /* Safe to do for the current task: */
191 curr->flags |= PF_USED_MATH;
195 EXPORT_SYMBOL_GPL(fpstate_alloc_init);
198 * The _current_ task is using the FPU for the first time
199 * so initialize it and set the mxcsr to its default
200 * value at reset if we support XMM instructions and then
201 * remember the current task has used the FPU.
203 static int fpu__unlazy_stopped(struct task_struct *child)
207 if (WARN_ON_ONCE(child == current))
210 if (child->flags & PF_USED_MATH) {
211 task_disable_lazy_fpu_restore(child);
216 * Memory allocation at the first usage of the FPU and other state.
218 ret = fpstate_alloc(&child->thread.fpu);
222 fpstate_init(&child->thread.fpu);
224 /* Safe to do for stopped child tasks: */
225 child->flags |= PF_USED_MATH;
231 * 'fpu__restore()' saves the current math information in the
232 * old math state array, and gets the new ones from the current task
234 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
235 * Don't touch unless you *really* know how it works.
237 * Must be called with kernel preemption disabled (eg with local
238 * local interrupts as in the case of do_device_not_available).
240 void fpu__restore(void)
242 struct task_struct *tsk = current;
244 if (!tsk_used_math(tsk)) {
247 * does a slab alloc which can sleep
249 if (fpstate_alloc_init(tsk)) {
253 do_group_exit(SIGKILL);
259 /* Avoid __kernel_fpu_begin() right after __thread_fpu_begin() */
260 kernel_fpu_disable();
261 __thread_fpu_begin(tsk);
262 if (unlikely(restore_fpu_checking(tsk))) {
263 fpu_reset_state(tsk);
264 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
266 tsk->thread.fpu.counter++;
270 EXPORT_SYMBOL_GPL(fpu__restore);
272 void fpu__flush_thread(struct task_struct *tsk)
274 if (!use_eager_fpu()) {
275 /* FPU state will be reallocated lazily at the first use. */
277 fpstate_free(&tsk->thread.fpu);
279 if (!tsk_used_math(tsk)) {
280 /* kthread execs. TODO: cleanup this horror. */
281 if (WARN_ON(fpstate_alloc_init(tsk)))
282 force_sig(SIGKILL, tsk);
285 restore_init_xstate();
290 * The xstateregs_active() routine is the same as the fpregs_active() routine,
291 * as the "regset->n" for the xstate regset will be updated based on the feature
292 * capabilites supported by the xsave.
294 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
296 return tsk_used_math(target) ? regset->n : 0;
299 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
301 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
304 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
305 unsigned int pos, unsigned int count,
306 void *kbuf, void __user *ubuf)
313 ret = fpu__unlazy_stopped(target);
317 sanitize_i387_state(target);
319 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
320 &target->thread.fpu.state->fxsave, 0, -1);
323 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
324 unsigned int pos, unsigned int count,
325 const void *kbuf, const void __user *ubuf)
332 ret = fpu__unlazy_stopped(target);
336 sanitize_i387_state(target);
338 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
339 &target->thread.fpu.state->fxsave, 0, -1);
342 * mxcsr reserved bits must be masked to zero for security reasons.
344 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
347 * update the header bits in the xsave header, indicating the
348 * presence of FP and SSE state.
351 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
356 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
357 unsigned int pos, unsigned int count,
358 void *kbuf, void __user *ubuf)
360 struct xsave_struct *xsave;
366 ret = fpu__unlazy_stopped(target);
370 xsave = &target->thread.fpu.state->xsave;
373 * Copy the 48bytes defined by the software first into the xstate
374 * memory layout in the thread struct, so that we can copy the entire
375 * xstateregs to the user using one user_regset_copyout().
377 memcpy(&xsave->i387.sw_reserved,
378 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
380 * Copy the xstate memory layout.
382 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
386 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
387 unsigned int pos, unsigned int count,
388 const void *kbuf, const void __user *ubuf)
390 struct xsave_struct *xsave;
396 ret = fpu__unlazy_stopped(target);
400 xsave = &target->thread.fpu.state->xsave;
402 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
404 * mxcsr reserved bits must be masked to zero for security reasons.
406 xsave->i387.mxcsr &= mxcsr_feature_mask;
407 xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
409 * These bits must be zero.
411 memset(&xsave->xsave_hdr.reserved, 0, 48);
415 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
418 * FPU tag word conversions.
421 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
423 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
425 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
427 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
428 /* and move the valid bits to the lower byte. */
429 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
430 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
431 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
436 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
437 #define FP_EXP_TAG_VALID 0
438 #define FP_EXP_TAG_ZERO 1
439 #define FP_EXP_TAG_SPECIAL 2
440 #define FP_EXP_TAG_EMPTY 3
442 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
445 u32 tos = (fxsave->swd >> 11) & 7;
446 u32 twd = (unsigned long) fxsave->twd;
448 u32 ret = 0xffff0000u;
451 for (i = 0; i < 8; i++, twd >>= 1) {
453 st = FPREG_ADDR(fxsave, (i - tos) & 7);
455 switch (st->exponent & 0x7fff) {
457 tag = FP_EXP_TAG_SPECIAL;
460 if (!st->significand[0] &&
461 !st->significand[1] &&
462 !st->significand[2] &&
464 tag = FP_EXP_TAG_ZERO;
466 tag = FP_EXP_TAG_SPECIAL;
469 if (st->significand[3] & 0x8000)
470 tag = FP_EXP_TAG_VALID;
472 tag = FP_EXP_TAG_SPECIAL;
476 tag = FP_EXP_TAG_EMPTY;
478 ret |= tag << (2 * i);
484 * FXSR floating point environment conversions.
488 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
490 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
491 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
492 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
495 env->cwd = fxsave->cwd | 0xffff0000u;
496 env->swd = fxsave->swd | 0xffff0000u;
497 env->twd = twd_fxsr_to_i387(fxsave);
500 env->fip = fxsave->rip;
501 env->foo = fxsave->rdp;
503 * should be actually ds/cs at fpu exception time, but
504 * that information is not available in 64bit mode.
506 env->fcs = task_pt_regs(tsk)->cs;
507 if (tsk == current) {
508 savesegment(ds, env->fos);
510 env->fos = tsk->thread.ds;
512 env->fos |= 0xffff0000;
514 env->fip = fxsave->fip;
515 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
516 env->foo = fxsave->foo;
517 env->fos = fxsave->fos;
520 for (i = 0; i < 8; ++i)
521 memcpy(&to[i], &from[i], sizeof(to[0]));
524 void convert_to_fxsr(struct task_struct *tsk,
525 const struct user_i387_ia32_struct *env)
528 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
529 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
530 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
533 fxsave->cwd = env->cwd;
534 fxsave->swd = env->swd;
535 fxsave->twd = twd_i387_to_fxsr(env->twd);
536 fxsave->fop = (u16) ((u32) env->fcs >> 16);
538 fxsave->rip = env->fip;
539 fxsave->rdp = env->foo;
540 /* cs and ds ignored */
542 fxsave->fip = env->fip;
543 fxsave->fcs = (env->fcs & 0xffff);
544 fxsave->foo = env->foo;
545 fxsave->fos = env->fos;
548 for (i = 0; i < 8; ++i)
549 memcpy(&to[i], &from[i], sizeof(from[0]));
552 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
553 unsigned int pos, unsigned int count,
554 void *kbuf, void __user *ubuf)
556 struct user_i387_ia32_struct env;
559 ret = fpu__unlazy_stopped(target);
563 if (!static_cpu_has(X86_FEATURE_FPU))
564 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
567 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
568 &target->thread.fpu.state->fsave, 0,
571 sanitize_i387_state(target);
573 if (kbuf && pos == 0 && count == sizeof(env)) {
574 convert_from_fxsr(kbuf, target);
578 convert_from_fxsr(&env, target);
580 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
583 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
584 unsigned int pos, unsigned int count,
585 const void *kbuf, const void __user *ubuf)
587 struct user_i387_ia32_struct env;
590 ret = fpu__unlazy_stopped(target);
594 sanitize_i387_state(target);
596 if (!static_cpu_has(X86_FEATURE_FPU))
597 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
600 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
601 &target->thread.fpu.state->fsave, 0,
604 if (pos > 0 || count < sizeof(env))
605 convert_from_fxsr(&env, target);
607 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
609 convert_to_fxsr(target, &env);
612 * update the header bit in the xsave header, indicating the
616 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
621 * FPU state for core dumps.
622 * This is only used for a.out dumps now.
623 * It is declared generically using elf_fpregset_t (which is
624 * struct user_i387_struct) but is in fact only used for 32-bit
625 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
627 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
629 struct task_struct *tsk = current;
632 fpvalid = !!used_math();
634 fpvalid = !fpregs_get(tsk, NULL,
635 0, sizeof(struct user_i387_ia32_struct),
640 EXPORT_SYMBOL(dump_fpu);
642 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */