2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <asm/fpu/internal.h>
9 #include <linux/hardirq.h>
12 * Track whether the kernel is using the FPU state
17 * - by IRQ context code to potentially use the FPU
20 * - to debug kernel_fpu_begin()/end() correctness
22 static DEFINE_PER_CPU(bool, in_kernel_fpu);
25 * Track which context is using the FPU on the CPU:
27 DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
29 static void kernel_fpu_disable(void)
31 WARN_ON(this_cpu_read(in_kernel_fpu));
32 this_cpu_write(in_kernel_fpu, true);
35 static void kernel_fpu_enable(void)
37 WARN_ON_ONCE(!this_cpu_read(in_kernel_fpu));
38 this_cpu_write(in_kernel_fpu, false);
41 static bool kernel_fpu_disabled(void)
43 return this_cpu_read(in_kernel_fpu);
47 * Were we in an interrupt that interrupted kernel mode?
49 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
50 * pair does nothing at all: the thread must not have fpu (so
51 * that we don't try to save the FPU state), and TS must
52 * be set (so that the clts/stts pair does nothing that is
53 * visible in the interrupted kernel thread).
55 * Except for the eagerfpu case when we return true; in the likely case
56 * the thread has FPU but we are not going to set/clear TS.
58 static bool interrupted_kernel_fpu_idle(void)
60 if (kernel_fpu_disabled())
66 return !current->thread.fpu.fpregs_active && (read_cr0() & X86_CR0_TS);
70 * Were we in user mode (or vm86 mode) when we were
73 * Doing kernel_fpu_begin/end() is ok if we are running
74 * in an interrupt context from user mode - we'll just
75 * save the FPU state as required.
77 static bool interrupted_user_mode(void)
79 struct pt_regs *regs = get_irq_regs();
80 return regs && user_mode(regs);
84 * Can we use the FPU in kernel mode with the
85 * whole "kernel_fpu_begin/end()" sequence?
87 * It's always ok in process context (ie "not interrupt")
88 * but it is sometimes ok even from an irq.
90 bool irq_fpu_usable(void)
92 return !in_interrupt() ||
93 interrupted_user_mode() ||
94 interrupted_kernel_fpu_idle();
96 EXPORT_SYMBOL(irq_fpu_usable);
98 void __kernel_fpu_begin(void)
100 struct fpu *fpu = ¤t->thread.fpu;
102 kernel_fpu_disable();
104 if (fpu->fpregs_active) {
105 copy_fpregs_to_fpstate(fpu);
107 this_cpu_write(fpu_fpregs_owner_ctx, NULL);
108 __fpregs_activate_hw();
111 EXPORT_SYMBOL(__kernel_fpu_begin);
113 void __kernel_fpu_end(void)
115 struct fpu *fpu = ¤t->thread.fpu;
117 if (fpu->fpregs_active) {
118 if (WARN_ON(restore_fpu_checking(fpu)))
119 fpu_reset_state(fpu);
121 __fpregs_deactivate_hw();
126 EXPORT_SYMBOL(__kernel_fpu_end);
128 void kernel_fpu_begin(void)
131 WARN_ON_ONCE(!irq_fpu_usable());
132 __kernel_fpu_begin();
134 EXPORT_SYMBOL_GPL(kernel_fpu_begin);
136 void kernel_fpu_end(void)
141 EXPORT_SYMBOL_GPL(kernel_fpu_end);
144 * CR0::TS save/restore functions:
146 int irq_ts_save(void)
149 * If in process context and not atomic, we can take a spurious DNA fault.
150 * Otherwise, doing clts() in process context requires disabling preemption
151 * or some heavy lifting like kernel_fpu_begin()
156 if (read_cr0() & X86_CR0_TS) {
163 EXPORT_SYMBOL_GPL(irq_ts_save);
165 void irq_ts_restore(int TS_state)
170 EXPORT_SYMBOL_GPL(irq_ts_restore);
173 * Save the FPU state (mark it for reload if necessary):
175 * This only ever gets called for the current task.
177 void fpu__save(struct fpu *fpu)
179 WARN_ON(fpu != ¤t->thread.fpu);
182 if (fpu->fpregs_active) {
183 if (!copy_fpregs_to_fpstate(fpu))
184 fpregs_deactivate(fpu);
188 EXPORT_SYMBOL_GPL(fpu__save);
190 void fpstate_init(struct fpu *fpu)
193 finit_soft_fpu(&fpu->state.soft);
197 memset(&fpu->state, 0, xstate_size);
200 fx_finit(&fpu->state.fxsave);
202 struct i387_fsave_struct *fp = &fpu->state.fsave;
203 fp->cwd = 0xffff037fu;
204 fp->swd = 0xffff0000u;
205 fp->twd = 0xffffffffu;
206 fp->fos = 0xffff0000u;
209 EXPORT_SYMBOL_GPL(fpstate_init);
212 * Copy the current task's FPU state to a new task's FPU context.
214 * In the 'eager' case we just save to the destination context.
216 * In the 'lazy' case we save to the source context, mark the FPU lazy
217 * via stts() and copy the source context into the destination context.
219 static void fpu_copy(struct fpu *dst_fpu, struct fpu *src_fpu)
221 WARN_ON(src_fpu != ¤t->thread.fpu);
223 if (use_eager_fpu()) {
224 memset(&dst_fpu->state.xsave, 0, xstate_size);
225 copy_fpregs_to_fpstate(dst_fpu);
228 if (!copy_fpregs_to_fpstate(src_fpu))
229 fpregs_deactivate(src_fpu);
231 memcpy(&dst_fpu->state, &src_fpu->state, xstate_size);
235 int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)
237 dst_fpu->counter = 0;
238 dst_fpu->fpregs_active = 0;
239 dst_fpu->last_cpu = -1;
241 if (src_fpu->fpstate_active)
242 fpu_copy(dst_fpu, src_fpu);
248 * Activate the current task's in-memory FPU context,
249 * if it has not been used before:
251 void fpu__activate_curr(struct fpu *fpu)
253 WARN_ON_ONCE(fpu != ¤t->thread.fpu);
255 if (!fpu->fpstate_active) {
258 /* Safe to do for the current task: */
259 fpu->fpstate_active = 1;
262 EXPORT_SYMBOL_GPL(fpu__activate_curr);
265 * This function must be called before we modify a stopped child's
268 * If the child has not used the FPU before then initialize its
271 * If the child has used the FPU before then unlazy it.
273 * [ After this function call, after registers in the fpstate are
274 * modified and the child task has woken up, the child task will
275 * restore the modified FPU state from the modified context. If we
276 * didn't clear its lazy status here then the lazy in-registers
277 * state pending on its former CPU could be restored, corrupting
278 * the modifications. ]
280 * This function is also called before we read a stopped child's
281 * FPU state - to make sure it's initialized if the child has
282 * no active FPU state.
284 * TODO: A future optimization would be to skip the unlazying in
285 * the read-only case, it's not strictly necessary for
286 * read-only access to the context.
288 static void fpu__activate_stopped(struct fpu *child_fpu)
290 WARN_ON_ONCE(child_fpu == ¤t->thread.fpu);
292 if (child_fpu->fpstate_active) {
293 child_fpu->last_cpu = -1;
295 fpstate_init(child_fpu);
297 /* Safe to do for stopped child tasks: */
298 child_fpu->fpstate_active = 1;
303 * 'fpu__restore()' saves the current math information in the
304 * old math state array, and gets the new ones from the current task
306 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
307 * Don't touch unless you *really* know how it works.
309 * Must be called with kernel preemption disabled (eg with local
310 * local interrupts as in the case of do_device_not_available).
312 void fpu__restore(void)
314 struct task_struct *tsk = current;
315 struct fpu *fpu = &tsk->thread.fpu;
317 fpu__activate_curr(fpu);
319 /* Avoid __kernel_fpu_begin() right after fpregs_activate() */
320 kernel_fpu_disable();
321 fpregs_activate(fpu);
322 if (unlikely(restore_fpu_checking(fpu))) {
323 fpu_reset_state(fpu);
324 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
326 tsk->thread.fpu.counter++;
330 EXPORT_SYMBOL_GPL(fpu__restore);
332 void fpu__clear(struct task_struct *tsk)
334 struct fpu *fpu = &tsk->thread.fpu;
336 WARN_ON_ONCE(tsk != current); /* Almost certainly an anomaly */
338 if (!use_eager_fpu()) {
339 /* FPU state will be reallocated lazily at the first use. */
342 if (!fpu->fpstate_active) {
343 fpu__activate_curr(fpu);
346 restore_init_xstate();
351 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
352 * as the "regset->n" for the xstate regset will be updated based on the feature
353 * capabilites supported by the xsave.
355 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
357 struct fpu *target_fpu = &target->thread.fpu;
359 return target_fpu->fpstate_active ? regset->n : 0;
362 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
364 struct fpu *target_fpu = &target->thread.fpu;
366 return (cpu_has_fxsr && target_fpu->fpstate_active) ? regset->n : 0;
369 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
370 unsigned int pos, unsigned int count,
371 void *kbuf, void __user *ubuf)
373 struct fpu *fpu = &target->thread.fpu;
378 fpu__activate_stopped(fpu);
379 sanitize_i387_state(target);
381 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
382 &fpu->state.fxsave, 0, -1);
385 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
386 unsigned int pos, unsigned int count,
387 const void *kbuf, const void __user *ubuf)
389 struct fpu *fpu = &target->thread.fpu;
395 fpu__activate_stopped(fpu);
396 sanitize_i387_state(target);
398 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
399 &fpu->state.fxsave, 0, -1);
402 * mxcsr reserved bits must be masked to zero for security reasons.
404 fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
407 * update the header bits in the xsave header, indicating the
408 * presence of FP and SSE state.
411 fpu->state.xsave.header.xfeatures |= XSTATE_FPSSE;
416 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
417 unsigned int pos, unsigned int count,
418 void *kbuf, void __user *ubuf)
420 struct fpu *fpu = &target->thread.fpu;
421 struct xsave_struct *xsave;
427 fpu__activate_stopped(fpu);
429 xsave = &fpu->state.xsave;
432 * Copy the 48bytes defined by the software first into the xstate
433 * memory layout in the thread struct, so that we can copy the entire
434 * xstateregs to the user using one user_regset_copyout().
436 memcpy(&xsave->i387.sw_reserved,
437 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
439 * Copy the xstate memory layout.
441 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
445 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
446 unsigned int pos, unsigned int count,
447 const void *kbuf, const void __user *ubuf)
449 struct fpu *fpu = &target->thread.fpu;
450 struct xsave_struct *xsave;
456 fpu__activate_stopped(fpu);
458 xsave = &fpu->state.xsave;
460 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
462 * mxcsr reserved bits must be masked to zero for security reasons.
464 xsave->i387.mxcsr &= mxcsr_feature_mask;
465 xsave->header.xfeatures &= xfeatures_mask;
467 * These bits must be zero.
469 memset(&xsave->header.reserved, 0, 48);
474 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
477 * FPU tag word conversions.
480 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
482 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
484 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
486 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
487 /* and move the valid bits to the lower byte. */
488 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
489 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
490 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
495 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
496 #define FP_EXP_TAG_VALID 0
497 #define FP_EXP_TAG_ZERO 1
498 #define FP_EXP_TAG_SPECIAL 2
499 #define FP_EXP_TAG_EMPTY 3
501 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
504 u32 tos = (fxsave->swd >> 11) & 7;
505 u32 twd = (unsigned long) fxsave->twd;
507 u32 ret = 0xffff0000u;
510 for (i = 0; i < 8; i++, twd >>= 1) {
512 st = FPREG_ADDR(fxsave, (i - tos) & 7);
514 switch (st->exponent & 0x7fff) {
516 tag = FP_EXP_TAG_SPECIAL;
519 if (!st->significand[0] &&
520 !st->significand[1] &&
521 !st->significand[2] &&
523 tag = FP_EXP_TAG_ZERO;
525 tag = FP_EXP_TAG_SPECIAL;
528 if (st->significand[3] & 0x8000)
529 tag = FP_EXP_TAG_VALID;
531 tag = FP_EXP_TAG_SPECIAL;
535 tag = FP_EXP_TAG_EMPTY;
537 ret |= tag << (2 * i);
543 * FXSR floating point environment conversions.
547 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
549 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
550 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
551 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
554 env->cwd = fxsave->cwd | 0xffff0000u;
555 env->swd = fxsave->swd | 0xffff0000u;
556 env->twd = twd_fxsr_to_i387(fxsave);
559 env->fip = fxsave->rip;
560 env->foo = fxsave->rdp;
562 * should be actually ds/cs at fpu exception time, but
563 * that information is not available in 64bit mode.
565 env->fcs = task_pt_regs(tsk)->cs;
566 if (tsk == current) {
567 savesegment(ds, env->fos);
569 env->fos = tsk->thread.ds;
571 env->fos |= 0xffff0000;
573 env->fip = fxsave->fip;
574 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
575 env->foo = fxsave->foo;
576 env->fos = fxsave->fos;
579 for (i = 0; i < 8; ++i)
580 memcpy(&to[i], &from[i], sizeof(to[0]));
583 void convert_to_fxsr(struct task_struct *tsk,
584 const struct user_i387_ia32_struct *env)
587 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
588 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
589 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
592 fxsave->cwd = env->cwd;
593 fxsave->swd = env->swd;
594 fxsave->twd = twd_i387_to_fxsr(env->twd);
595 fxsave->fop = (u16) ((u32) env->fcs >> 16);
597 fxsave->rip = env->fip;
598 fxsave->rdp = env->foo;
599 /* cs and ds ignored */
601 fxsave->fip = env->fip;
602 fxsave->fcs = (env->fcs & 0xffff);
603 fxsave->foo = env->foo;
604 fxsave->fos = env->fos;
607 for (i = 0; i < 8; ++i)
608 memcpy(&to[i], &from[i], sizeof(from[0]));
611 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
612 unsigned int pos, unsigned int count,
613 void *kbuf, void __user *ubuf)
615 struct fpu *fpu = &target->thread.fpu;
616 struct user_i387_ia32_struct env;
618 fpu__activate_stopped(fpu);
620 if (!static_cpu_has(X86_FEATURE_FPU))
621 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
624 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
625 &fpu->state.fsave, 0,
628 sanitize_i387_state(target);
630 if (kbuf && pos == 0 && count == sizeof(env)) {
631 convert_from_fxsr(kbuf, target);
635 convert_from_fxsr(&env, target);
637 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
640 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
641 unsigned int pos, unsigned int count,
642 const void *kbuf, const void __user *ubuf)
644 struct fpu *fpu = &target->thread.fpu;
645 struct user_i387_ia32_struct env;
648 fpu__activate_stopped(fpu);
650 sanitize_i387_state(target);
652 if (!static_cpu_has(X86_FEATURE_FPU))
653 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
656 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
657 &fpu->state.fsave, 0,
660 if (pos > 0 || count < sizeof(env))
661 convert_from_fxsr(&env, target);
663 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
665 convert_to_fxsr(target, &env);
668 * update the header bit in the xsave header, indicating the
672 fpu->state.xsave.header.xfeatures |= XSTATE_FP;
677 * FPU state for core dumps.
678 * This is only used for a.out dumps now.
679 * It is declared generically using elf_fpregset_t (which is
680 * struct user_i387_struct) but is in fact only used for 32-bit
681 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
683 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)
685 struct task_struct *tsk = current;
686 struct fpu *fpu = &tsk->thread.fpu;
689 fpvalid = fpu->fpstate_active;
691 fpvalid = !fpregs_get(tsk, NULL,
692 0, sizeof(struct user_i387_ia32_struct),
697 EXPORT_SYMBOL(dump_fpu);
699 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */