arch/x86/kernel/fpu/core.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <asm/fpu-internal.h>
   9
  10 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  11
  12 void kernel_fpu_disable(void)
  13 {
  14         WARN_ON(this_cpu_read(in_kernel_fpu));
  15         this_cpu_write(in_kernel_fpu, true);
  16 }
  17
  18 void kernel_fpu_enable(void)
  19 {
  20         this_cpu_write(in_kernel_fpu, false);
  21 }
  22
  23 /*
  24  * Were we in an interrupt that interrupted kernel mode?
  25  *
  26  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  27  * pair does nothing at all: the thread must not have fpu (so
  28  * that we don't try to save the FPU state), and TS must
  29  * be set (so that the clts/stts pair does nothing that is
  30  * visible in the interrupted kernel thread).
  31  *
  32  * Except for the eagerfpu case when we return true; in the likely case
  33  * the thread has FPU but we are not going to set/clear TS.
  34  */
  35 static inline bool interrupted_kernel_fpu_idle(void)
  36 {
  37         if (this_cpu_read(in_kernel_fpu))
  38                 return false;
  39
  40         if (use_eager_fpu())
  41                 return true;
  42
  43         return !__thread_has_fpu(current) &&
  44                 (read_cr0() & X86_CR0_TS);
  45 }
  46
  47 /*
  48  * Were we in user mode (or vm86 mode) when we were
  49  * interrupted?
  50  *
  51  * Doing kernel_fpu_begin/end() is ok if we are running
  52  * in an interrupt context from user mode - we'll just
  53  * save the FPU state as required.
  54  */
  55 static inline bool interrupted_user_mode(void)
  56 {
  57         struct pt_regs *regs = get_irq_regs();
  58         return regs && user_mode(regs);
  59 }
  60
  61 /*
  62  * Can we use the FPU in kernel mode with the
  63  * whole "kernel_fpu_begin/end()" sequence?
  64  *
  65  * It's always ok in process context (ie "not interrupt")
  66  * but it is sometimes ok even from an irq.
  67  */
  68 bool irq_fpu_usable(void)
  69 {
  70         return !in_interrupt() ||
  71                 interrupted_user_mode() ||
  72                 interrupted_kernel_fpu_idle();
  73 }
  74 EXPORT_SYMBOL(irq_fpu_usable);
  75
  76 void __kernel_fpu_begin(void)
  77 {
  78         struct task_struct *me = current;
  79
  80         this_cpu_write(in_kernel_fpu, true);
  81
  82         if (__thread_has_fpu(me)) {
  83                 __save_init_fpu(me);
  84         } else {
  85                 this_cpu_write(fpu_owner_task, NULL);
  86                 if (!use_eager_fpu())
  87                         clts();
  88         }
  89 }
  90 EXPORT_SYMBOL(__kernel_fpu_begin);
  91
  92 void __kernel_fpu_end(void)
  93 {
  94         struct task_struct *me = current;
  95
  96         if (__thread_has_fpu(me)) {
  97                 if (WARN_ON(restore_fpu_checking(me)))
  98                         fpu_reset_state(me);
  99         } else if (!use_eager_fpu()) {
 100                 stts();
 101         }
 102
 103         this_cpu_write(in_kernel_fpu, false);
 104 }
 105 EXPORT_SYMBOL(__kernel_fpu_end);
 106
 107 /*
 108  * Save the FPU state (initialize it if necessary):
 109  *
 110  * This only ever gets called for the current task.
 111  */
 112 void fpu__save(struct task_struct *tsk)
 113 {
 114         WARN_ON(tsk != current);
 115
 116         preempt_disable();
 117         if (__thread_has_fpu(tsk)) {
 118                 if (use_eager_fpu()) {
 119                         __save_fpu(tsk);
 120                 } else {
 121                         __save_init_fpu(tsk);
 122                         __thread_fpu_end(tsk);
 123                 }
 124         }
 125         preempt_enable();
 126 }
 127 EXPORT_SYMBOL_GPL(fpu__save);
 128
 129 void fpstate_init(struct fpu *fpu)
 130 {
 131         if (!cpu_has_fpu) {
 132                 finit_soft_fpu(&fpu->state->soft);
 133                 return;
 134         }
 135
 136         memset(fpu->state, 0, xstate_size);
 137
 138         if (cpu_has_fxsr) {
 139                 fx_finit(&fpu->state->fxsave);
 140         } else {
 141                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 142                 fp->cwd = 0xffff037fu;
 143                 fp->swd = 0xffff0000u;
 144                 fp->twd = 0xffffffffu;
 145                 fp->fos = 0xffff0000u;
 146         }
 147 }
 148 EXPORT_SYMBOL_GPL(fpstate_init);
 149
 150 /*
 151  * FPU state allocation:
 152  */
 153 struct kmem_cache *task_xstate_cachep;
 154 EXPORT_SYMBOL_GPL(task_xstate_cachep);
 155
 156 void fpstate_cache_init(void)
 157 {
 158         task_xstate_cachep =
 159                 kmem_cache_create("task_xstate", xstate_size,
 160                                   __alignof__(union thread_xstate),
 161                                   SLAB_PANIC | SLAB_NOTRACK, NULL);
 162         setup_xstate_comp();
 163 }
 164
 165 int fpstate_alloc(struct fpu *fpu)
 166 {
 167         if (fpu->state)
 168                 return 0;
 169
 170         fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
 171         if (!fpu->state)
 172                 return -ENOMEM;
 173
 174         /* The CPU requires the FPU state to be aligned to 16 byte boundaries: */
 175         WARN_ON((unsigned long)fpu->state & 15);
 176
 177         return 0;
 178 }
 179 EXPORT_SYMBOL_GPL(fpstate_alloc);
 180
 181 /*
 182  * Allocate the backing store for the current task's FPU registers
 183  * and initialize the registers themselves as well.
 184  *
 185  * Can fail.
 186  */
 187 int fpstate_alloc_init(struct task_struct *curr)
 188 {
 189         int ret;
 190
 191         if (WARN_ON_ONCE(curr != current))
 192                 return -EINVAL;
 193         if (WARN_ON_ONCE(curr->flags & PF_USED_MATH))
 194                 return -EINVAL;
 195
 196         /*
 197          * Memory allocation at the first usage of the FPU and other state.
 198          */
 199         ret = fpstate_alloc(&curr->thread.fpu);
 200         if (ret)
 201                 return ret;
 202
 203         fpstate_init(&curr->thread.fpu);
 204
 205         /* Safe to do for the current task: */
 206         curr->flags |= PF_USED_MATH;
 207
 208         return 0;
 209 }
 210 EXPORT_SYMBOL_GPL(fpstate_alloc_init);
 211
 212 /*
 213  * The _current_ task is using the FPU for the first time
 214  * so initialize it and set the mxcsr to its default
 215  * value at reset if we support XMM instructions and then
 216  * remember the current task has used the FPU.
 217  */
 218 static int fpu__unlazy_stopped(struct task_struct *child)
 219 {
 220         int ret;
 221
 222         if (WARN_ON_ONCE(child == current))
 223                 return -EINVAL;
 224
 225         if (child->flags & PF_USED_MATH) {
 226                 task_disable_lazy_fpu_restore(child);
 227                 return 0;
 228         }
 229
 230         /*
 231          * Memory allocation at the first usage of the FPU and other state.
 232          */
 233         ret = fpstate_alloc(&child->thread.fpu);
 234         if (ret)
 235                 return ret;
 236
 237         fpstate_init(&child->thread.fpu);
 238
 239         /* Safe to do for stopped child tasks: */
 240         child->flags |= PF_USED_MATH;
 241
 242         return 0;
 243 }
 244
 245 /*
 246  * 'fpu__restore()' saves the current math information in the
 247  * old math state array, and gets the new ones from the current task
 248  *
 249  * Careful.. There are problems with IBM-designed IRQ13 behaviour.
 250  * Don't touch unless you *really* know how it works.
 251  *
 252  * Must be called with kernel preemption disabled (eg with local
 253  * local interrupts as in the case of do_device_not_available).
 254  */
 255 void fpu__restore(void)
 256 {
 257         struct task_struct *tsk = current;
 258
 259         if (!tsk_used_math(tsk)) {
 260                 local_irq_enable();
 261                 /*
 262                  * does a slab alloc which can sleep
 263                  */
 264                 if (fpstate_alloc_init(tsk)) {
 265                         /*
 266                          * ran out of memory!
 267                          */
 268                         do_group_exit(SIGKILL);
 269                         return;
 270                 }
 271                 local_irq_disable();
 272         }
 273
 274         /* Avoid __kernel_fpu_begin() right after __thread_fpu_begin() */
 275         kernel_fpu_disable();
 276         __thread_fpu_begin(tsk);
 277         if (unlikely(restore_fpu_checking(tsk))) {
 278                 fpu_reset_state(tsk);
 279                 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
 280         } else {
 281                 tsk->thread.fpu.counter++;
 282         }
 283         kernel_fpu_enable();
 284 }
 285 EXPORT_SYMBOL_GPL(fpu__restore);
 286
 287 void fpu__flush_thread(struct task_struct *tsk)
 288 {
 289         if (!use_eager_fpu()) {
 290                 /* FPU state will be reallocated lazily at the first use. */
 291                 drop_fpu(tsk);
 292                 fpstate_free(&tsk->thread.fpu);
 293         } else {
 294                 if (!tsk_used_math(tsk)) {
 295                         /* kthread execs. TODO: cleanup this horror. */
 296                 if (WARN_ON(fpstate_alloc_init(tsk)))
 297                                 force_sig(SIGKILL, tsk);
 298                         user_fpu_begin();
 299                 }
 300                 restore_init_xstate();
 301         }
 302 }
 303
 304 /*
 305  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 306  * as the "regset->n" for the xstate regset will be updated based on the feature
 307  * capabilites supported by the xsave.
 308  */
 309 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 310 {
 311         return tsk_used_math(target) ? regset->n : 0;
 312 }
 313
 314 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 315 {
 316         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 317 }
 318
 319 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 320                 unsigned int pos, unsigned int count,
 321                 void *kbuf, void __user *ubuf)
 322 {
 323         int ret;
 324
 325         if (!cpu_has_fxsr)
 326                 return -ENODEV;
 327
 328         ret = fpu__unlazy_stopped(target);
 329         if (ret)
 330                 return ret;
 331
 332         sanitize_i387_state(target);
 333
 334         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 335                                    &target->thread.fpu.state->fxsave, 0, -1);
 336 }
 337
 338 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 339                 unsigned int pos, unsigned int count,
 340                 const void *kbuf, const void __user *ubuf)
 341 {
 342         int ret;
 343
 344         if (!cpu_has_fxsr)
 345                 return -ENODEV;
 346
 347         ret = fpu__unlazy_stopped(target);
 348         if (ret)
 349                 return ret;
 350
 351         sanitize_i387_state(target);
 352
 353         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 354                                  &target->thread.fpu.state->fxsave, 0, -1);
 355
 356         /*
 357          * mxcsr reserved bits must be masked to zero for security reasons.
 358          */
 359         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 360
 361         /*
 362          * update the header bits in the xsave header, indicating the
 363          * presence of FP and SSE state.
 364          */
 365         if (cpu_has_xsave)
 366                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 367
 368         return ret;
 369 }
 370
 371 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 372                 unsigned int pos, unsigned int count,
 373                 void *kbuf, void __user *ubuf)
 374 {
 375         struct xsave_struct *xsave;
 376         int ret;
 377
 378         if (!cpu_has_xsave)
 379                 return -ENODEV;
 380
 381         ret = fpu__unlazy_stopped(target);
 382         if (ret)
 383                 return ret;
 384
 385         xsave = &target->thread.fpu.state->xsave;
 386
 387         /*
 388          * Copy the 48bytes defined by the software first into the xstate
 389          * memory layout in the thread struct, so that we can copy the entire
 390          * xstateregs to the user using one user_regset_copyout().
 391          */
 392         memcpy(&xsave->i387.sw_reserved,
 393                 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 394         /*
 395          * Copy the xstate memory layout.
 396          */
 397         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 398         return ret;
 399 }
 400
 401 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 402                   unsigned int pos, unsigned int count,
 403                   const void *kbuf, const void __user *ubuf)
 404 {
 405         struct xsave_struct *xsave;
 406         int ret;
 407
 408         if (!cpu_has_xsave)
 409                 return -ENODEV;
 410
 411         ret = fpu__unlazy_stopped(target);
 412         if (ret)
 413                 return ret;
 414
 415         xsave = &target->thread.fpu.state->xsave;
 416
 417         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 418         /*
 419          * mxcsr reserved bits must be masked to zero for security reasons.
 420          */
 421         xsave->i387.mxcsr &= mxcsr_feature_mask;
 422         xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
 423         /*
 424          * These bits must be zero.
 425          */
 426         memset(&xsave->xsave_hdr.reserved, 0, 48);
 427         return ret;
 428 }
 429
 430 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 431
 432 /*
 433  * FPU tag word conversions.
 434  */
 435
 436 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 437 {
 438         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 439
 440         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 441         tmp = ~twd;
 442         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 443         /* and move the valid bits to the lower byte. */
 444         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 445         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 446         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 447
 448         return tmp;
 449 }
 450
 451 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 452 #define FP_EXP_TAG_VALID        0
 453 #define FP_EXP_TAG_ZERO         1
 454 #define FP_EXP_TAG_SPECIAL      2
 455 #define FP_EXP_TAG_EMPTY        3
 456
 457 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 458 {
 459         struct _fpxreg *st;
 460         u32 tos = (fxsave->swd >> 11) & 7;
 461         u32 twd = (unsigned long) fxsave->twd;
 462         u32 tag;
 463         u32 ret = 0xffff0000u;
 464         int i;
 465
 466         for (i = 0; i < 8; i++, twd >>= 1) {
 467                 if (twd & 0x1) {
 468                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 469
 470                         switch (st->exponent & 0x7fff) {
 471                         case 0x7fff:
 472                                 tag = FP_EXP_TAG_SPECIAL;
 473                                 break;
 474                         case 0x0000:
 475                                 if (!st->significand[0] &&
 476                                     !st->significand[1] &&
 477                                     !st->significand[2] &&
 478                                     !st->significand[3])
 479                                         tag = FP_EXP_TAG_ZERO;
 480                                 else
 481                                         tag = FP_EXP_TAG_SPECIAL;
 482                                 break;
 483                         default:
 484                                 if (st->significand[3] & 0x8000)
 485                                         tag = FP_EXP_TAG_VALID;
 486                                 else
 487                                         tag = FP_EXP_TAG_SPECIAL;
 488                                 break;
 489                         }
 490                 } else {
 491                         tag = FP_EXP_TAG_EMPTY;
 492                 }
 493                 ret |= tag << (2 * i);
 494         }
 495         return ret;
 496 }
 497
 498 /*
 499  * FXSR floating point environment conversions.
 500  */
 501
 502 void
 503 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 504 {
 505         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 506         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 507         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 508         int i;
 509
 510         env->cwd = fxsave->cwd | 0xffff0000u;
 511         env->swd = fxsave->swd | 0xffff0000u;
 512         env->twd = twd_fxsr_to_i387(fxsave);
 513
 514 #ifdef CONFIG_X86_64
 515         env->fip = fxsave->rip;
 516         env->foo = fxsave->rdp;
 517         /*
 518          * should be actually ds/cs at fpu exception time, but
 519          * that information is not available in 64bit mode.
 520          */
 521         env->fcs = task_pt_regs(tsk)->cs;
 522         if (tsk == current) {
 523                 savesegment(ds, env->fos);
 524         } else {
 525                 env->fos = tsk->thread.ds;
 526         }
 527         env->fos |= 0xffff0000;
 528 #else
 529         env->fip = fxsave->fip;
 530         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 531         env->foo = fxsave->foo;
 532         env->fos = fxsave->fos;
 533 #endif
 534
 535         for (i = 0; i < 8; ++i)
 536                 memcpy(&to[i], &from[i], sizeof(to[0]));
 537 }
 538
 539 void convert_to_fxsr(struct task_struct *tsk,
 540                      const struct user_i387_ia32_struct *env)
 541
 542 {
 543         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 544         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 545         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 546         int i;
 547
 548         fxsave->cwd = env->cwd;
 549         fxsave->swd = env->swd;
 550         fxsave->twd = twd_i387_to_fxsr(env->twd);
 551         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 552 #ifdef CONFIG_X86_64
 553         fxsave->rip = env->fip;
 554         fxsave->rdp = env->foo;
 555         /* cs and ds ignored */
 556 #else
 557         fxsave->fip = env->fip;
 558         fxsave->fcs = (env->fcs & 0xffff);
 559         fxsave->foo = env->foo;
 560         fxsave->fos = env->fos;
 561 #endif
 562
 563         for (i = 0; i < 8; ++i)
 564                 memcpy(&to[i], &from[i], sizeof(from[0]));
 565 }
 566
 567 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 568                unsigned int pos, unsigned int count,
 569                void *kbuf, void __user *ubuf)
 570 {
 571         struct user_i387_ia32_struct env;
 572         int ret;
 573
 574         ret = fpu__unlazy_stopped(target);
 575         if (ret)
 576                 return ret;
 577
 578         if (!static_cpu_has(X86_FEATURE_FPU))
 579                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 580
 581         if (!cpu_has_fxsr)
 582                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 583                                            &target->thread.fpu.state->fsave, 0,
 584                                            -1);
 585
 586         sanitize_i387_state(target);
 587
 588         if (kbuf && pos == 0 && count == sizeof(env)) {
 589                 convert_from_fxsr(kbuf, target);
 590                 return 0;
 591         }
 592
 593         convert_from_fxsr(&env, target);
 594
 595         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 596 }
 597
 598 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 599                unsigned int pos, unsigned int count,
 600                const void *kbuf, const void __user *ubuf)
 601 {
 602         struct user_i387_ia32_struct env;
 603         int ret;
 604
 605         ret = fpu__unlazy_stopped(target);
 606         if (ret)
 607                 return ret;
 608
 609         sanitize_i387_state(target);
 610
 611         if (!static_cpu_has(X86_FEATURE_FPU))
 612                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 613
 614         if (!cpu_has_fxsr)
 615                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 616                                           &target->thread.fpu.state->fsave, 0,
 617                                           -1);
 618
 619         if (pos > 0 || count < sizeof(env))
 620                 convert_from_fxsr(&env, target);
 621
 622         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 623         if (!ret)
 624                 convert_to_fxsr(target, &env);
 625
 626         /*
 627          * update the header bit in the xsave header, indicating the
 628          * presence of FP.
 629          */
 630         if (cpu_has_xsave)
 631                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 632         return ret;
 633 }
 634
 635 /*
 636  * FPU state for core dumps.
 637  * This is only used for a.out dumps now.
 638  * It is declared generically using elf_fpregset_t (which is
 639  * struct user_i387_struct) but is in fact only used for 32-bit
 640  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 641  */
 642 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 643 {
 644         struct task_struct *tsk = current;
 645         int fpvalid;
 646
 647         fpvalid = !!used_math();
 648         if (fpvalid)
 649                 fpvalid = !fpregs_get(tsk, NULL,
 650                                       0, sizeof(struct user_i387_ia32_struct),
 651                                       fpu, NULL);
 652
 653         return fpvalid;
 654 }
 655 EXPORT_SYMBOL(dump_fpu);
 656
 657 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */