arch/x86/kernel/fpu/core.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <asm/fpu-internal.h>
   9
  10 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  11
  12 void kernel_fpu_disable(void)
  13 {
  14         WARN_ON(this_cpu_read(in_kernel_fpu));
  15         this_cpu_write(in_kernel_fpu, true);
  16 }
  17
  18 void kernel_fpu_enable(void)
  19 {
  20         this_cpu_write(in_kernel_fpu, false);
  21 }
  22
  23 /*
  24  * Were we in an interrupt that interrupted kernel mode?
  25  *
  26  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  27  * pair does nothing at all: the thread must not have fpu (so
  28  * that we don't try to save the FPU state), and TS must
  29  * be set (so that the clts/stts pair does nothing that is
  30  * visible in the interrupted kernel thread).
  31  *
  32  * Except for the eagerfpu case when we return true; in the likely case
  33  * the thread has FPU but we are not going to set/clear TS.
  34  */
  35 static inline bool interrupted_kernel_fpu_idle(void)
  36 {
  37         if (this_cpu_read(in_kernel_fpu))
  38                 return false;
  39
  40         if (use_eager_fpu())
  41                 return true;
  42
  43         return !__thread_has_fpu(current) &&
  44                 (read_cr0() & X86_CR0_TS);
  45 }
  46
  47 /*
  48  * Were we in user mode (or vm86 mode) when we were
  49  * interrupted?
  50  *
  51  * Doing kernel_fpu_begin/end() is ok if we are running
  52  * in an interrupt context from user mode - we'll just
  53  * save the FPU state as required.
  54  */
  55 static inline bool interrupted_user_mode(void)
  56 {
  57         struct pt_regs *regs = get_irq_regs();
  58         return regs && user_mode(regs);
  59 }
  60
  61 /*
  62  * Can we use the FPU in kernel mode with the
  63  * whole "kernel_fpu_begin/end()" sequence?
  64  *
  65  * It's always ok in process context (ie "not interrupt")
  66  * but it is sometimes ok even from an irq.
  67  */
  68 bool irq_fpu_usable(void)
  69 {
  70         return !in_interrupt() ||
  71                 interrupted_user_mode() ||
  72                 interrupted_kernel_fpu_idle();
  73 }
  74 EXPORT_SYMBOL(irq_fpu_usable);
  75
  76 void __kernel_fpu_begin(void)
  77 {
  78         struct task_struct *me = current;
  79
  80         this_cpu_write(in_kernel_fpu, true);
  81
  82         if (__thread_has_fpu(me)) {
  83                 __save_init_fpu(me);
  84         } else {
  85                 this_cpu_write(fpu_owner_task, NULL);
  86                 if (!use_eager_fpu())
  87                         clts();
  88         }
  89 }
  90 EXPORT_SYMBOL(__kernel_fpu_begin);
  91
  92 void __kernel_fpu_end(void)
  93 {
  94         struct task_struct *me = current;
  95
  96         if (__thread_has_fpu(me)) {
  97                 if (WARN_ON(restore_fpu_checking(me)))
  98                         fpu_reset_state(me);
  99         } else if (!use_eager_fpu()) {
 100                 stts();
 101         }
 102
 103         this_cpu_write(in_kernel_fpu, false);
 104 }
 105 EXPORT_SYMBOL(__kernel_fpu_end);
 106
 107 /*
 108  * Save the FPU state (initialize it if necessary):
 109  *
 110  * This only ever gets called for the current task.
 111  */
 112 void fpu__save(struct task_struct *tsk)
 113 {
 114         WARN_ON(tsk != current);
 115
 116         preempt_disable();
 117         if (__thread_has_fpu(tsk)) {
 118                 if (use_eager_fpu()) {
 119                         __save_fpu(tsk);
 120                 } else {
 121                         __save_init_fpu(tsk);
 122                         __thread_fpu_end(tsk);
 123                 }
 124         }
 125         preempt_enable();
 126 }
 127 EXPORT_SYMBOL_GPL(fpu__save);
 128
 129 void fpstate_init(struct fpu *fpu)
 130 {
 131         if (!cpu_has_fpu) {
 132                 finit_soft_fpu(&fpu->state->soft);
 133                 return;
 134         }
 135
 136         memset(fpu->state, 0, xstate_size);
 137
 138         if (cpu_has_fxsr) {
 139                 fx_finit(&fpu->state->fxsave);
 140         } else {
 141                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 142                 fp->cwd = 0xffff037fu;
 143                 fp->swd = 0xffff0000u;
 144                 fp->twd = 0xffffffffu;
 145                 fp->fos = 0xffff0000u;
 146         }
 147 }
 148 EXPORT_SYMBOL_GPL(fpstate_init);
 149
 150 int fpstate_alloc(struct fpu *fpu)
 151 {
 152         if (fpu->state)
 153                 return 0;
 154
 155         fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
 156         if (!fpu->state)
 157                 return -ENOMEM;
 158
 159         /* The CPU requires the FPU state to be aligned to 16 byte boundaries: */
 160         WARN_ON((unsigned long)fpu->state & 15);
 161
 162         return 0;
 163 }
 164 EXPORT_SYMBOL_GPL(fpstate_alloc);
 165
 166 /*
 167  * Allocate the backing store for the current task's FPU registers
 168  * and initialize the registers themselves as well.
 169  *
 170  * Can fail.
 171  */
 172 int fpstate_alloc_init(struct task_struct *curr)
 173 {
 174         int ret;
 175
 176         if (WARN_ON_ONCE(curr != current))
 177                 return -EINVAL;
 178         if (WARN_ON_ONCE(curr->flags & PF_USED_MATH))
 179                 return -EINVAL;
 180
 181         /*
 182          * Memory allocation at the first usage of the FPU and other state.
 183          */
 184         ret = fpstate_alloc(&curr->thread.fpu);
 185         if (ret)
 186                 return ret;
 187
 188         fpstate_init(&curr->thread.fpu);
 189
 190         /* Safe to do for the current task: */
 191         curr->flags |= PF_USED_MATH;
 192
 193         return 0;
 194 }
 195 EXPORT_SYMBOL_GPL(fpstate_alloc_init);
 196
 197 /*
 198  * The _current_ task is using the FPU for the first time
 199  * so initialize it and set the mxcsr to its default
 200  * value at reset if we support XMM instructions and then
 201  * remember the current task has used the FPU.
 202  */
 203 static int fpu__unlazy_stopped(struct task_struct *child)
 204 {
 205         int ret;
 206
 207         if (WARN_ON_ONCE(child == current))
 208                 return -EINVAL;
 209
 210         if (child->flags & PF_USED_MATH) {
 211                 task_disable_lazy_fpu_restore(child);
 212                 return 0;
 213         }
 214
 215         /*
 216          * Memory allocation at the first usage of the FPU and other state.
 217          */
 218         ret = fpstate_alloc(&child->thread.fpu);
 219         if (ret)
 220                 return ret;
 221
 222         fpstate_init(&child->thread.fpu);
 223
 224         /* Safe to do for stopped child tasks: */
 225         child->flags |= PF_USED_MATH;
 226
 227         return 0;
 228 }
 229
 230 /*
 231  * 'math_state_restore()' saves the current math information in the
 232  * old math state array, and gets the new ones from the current task
 233  *
 234  * Careful.. There are problems with IBM-designed IRQ13 behaviour.
 235  * Don't touch unless you *really* know how it works.
 236  *
 237  * Must be called with kernel preemption disabled (eg with local
 238  * local interrupts as in the case of do_device_not_available).
 239  */
 240 void math_state_restore(void)
 241 {
 242         struct task_struct *tsk = current;
 243
 244         if (!tsk_used_math(tsk)) {
 245                 local_irq_enable();
 246                 /*
 247                  * does a slab alloc which can sleep
 248                  */
 249                 if (fpstate_alloc_init(tsk)) {
 250                         /*
 251                          * ran out of memory!
 252                          */
 253                         do_group_exit(SIGKILL);
 254                         return;
 255                 }
 256                 local_irq_disable();
 257         }
 258
 259         /* Avoid __kernel_fpu_begin() right after __thread_fpu_begin() */
 260         kernel_fpu_disable();
 261         __thread_fpu_begin(tsk);
 262         if (unlikely(restore_fpu_checking(tsk))) {
 263                 fpu_reset_state(tsk);
 264                 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
 265         } else {
 266                 tsk->thread.fpu.counter++;
 267         }
 268         kernel_fpu_enable();
 269 }
 270 EXPORT_SYMBOL_GPL(math_state_restore);
 271
 272 void fpu__flush_thread(struct task_struct *tsk)
 273 {
 274         if (!use_eager_fpu()) {
 275                 /* FPU state will be reallocated lazily at the first use. */
 276                 drop_fpu(tsk);
 277                 fpstate_free(&tsk->thread.fpu);
 278         } else {
 279                 if (!tsk_used_math(tsk)) {
 280                         /* kthread execs. TODO: cleanup this horror. */
 281                 if (WARN_ON(fpstate_alloc_init(tsk)))
 282                                 force_sig(SIGKILL, tsk);
 283                         user_fpu_begin();
 284                 }
 285                 restore_init_xstate();
 286         }
 287 }
 288
 289 /*
 290  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 291  * as the "regset->n" for the xstate regset will be updated based on the feature
 292  * capabilites supported by the xsave.
 293  */
 294 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 295 {
 296         return tsk_used_math(target) ? regset->n : 0;
 297 }
 298
 299 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 300 {
 301         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 302 }
 303
 304 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 305                 unsigned int pos, unsigned int count,
 306                 void *kbuf, void __user *ubuf)
 307 {
 308         int ret;
 309
 310         if (!cpu_has_fxsr)
 311                 return -ENODEV;
 312
 313         ret = fpu__unlazy_stopped(target);
 314         if (ret)
 315                 return ret;
 316
 317         sanitize_i387_state(target);
 318
 319         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 320                                    &target->thread.fpu.state->fxsave, 0, -1);
 321 }
 322
 323 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 324                 unsigned int pos, unsigned int count,
 325                 const void *kbuf, const void __user *ubuf)
 326 {
 327         int ret;
 328
 329         if (!cpu_has_fxsr)
 330                 return -ENODEV;
 331
 332         ret = fpu__unlazy_stopped(target);
 333         if (ret)
 334                 return ret;
 335
 336         sanitize_i387_state(target);
 337
 338         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 339                                  &target->thread.fpu.state->fxsave, 0, -1);
 340
 341         /*
 342          * mxcsr reserved bits must be masked to zero for security reasons.
 343          */
 344         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 345
 346         /*
 347          * update the header bits in the xsave header, indicating the
 348          * presence of FP and SSE state.
 349          */
 350         if (cpu_has_xsave)
 351                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 352
 353         return ret;
 354 }
 355
 356 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 357                 unsigned int pos, unsigned int count,
 358                 void *kbuf, void __user *ubuf)
 359 {
 360         struct xsave_struct *xsave;
 361         int ret;
 362
 363         if (!cpu_has_xsave)
 364                 return -ENODEV;
 365
 366         ret = fpu__unlazy_stopped(target);
 367         if (ret)
 368                 return ret;
 369
 370         xsave = &target->thread.fpu.state->xsave;
 371
 372         /*
 373          * Copy the 48bytes defined by the software first into the xstate
 374          * memory layout in the thread struct, so that we can copy the entire
 375          * xstateregs to the user using one user_regset_copyout().
 376          */
 377         memcpy(&xsave->i387.sw_reserved,
 378                 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 379         /*
 380          * Copy the xstate memory layout.
 381          */
 382         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 383         return ret;
 384 }
 385
 386 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 387                   unsigned int pos, unsigned int count,
 388                   const void *kbuf, const void __user *ubuf)
 389 {
 390         struct xsave_struct *xsave;
 391         int ret;
 392
 393         if (!cpu_has_xsave)
 394                 return -ENODEV;
 395
 396         ret = fpu__unlazy_stopped(target);
 397         if (ret)
 398                 return ret;
 399
 400         xsave = &target->thread.fpu.state->xsave;
 401
 402         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 403         /*
 404          * mxcsr reserved bits must be masked to zero for security reasons.
 405          */
 406         xsave->i387.mxcsr &= mxcsr_feature_mask;
 407         xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
 408         /*
 409          * These bits must be zero.
 410          */
 411         memset(&xsave->xsave_hdr.reserved, 0, 48);
 412         return ret;
 413 }
 414
 415 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 416
 417 /*
 418  * FPU tag word conversions.
 419  */
 420
 421 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 422 {
 423         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 424
 425         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 426         tmp = ~twd;
 427         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 428         /* and move the valid bits to the lower byte. */
 429         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 430         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 431         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 432
 433         return tmp;
 434 }
 435
 436 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 437 #define FP_EXP_TAG_VALID        0
 438 #define FP_EXP_TAG_ZERO         1
 439 #define FP_EXP_TAG_SPECIAL      2
 440 #define FP_EXP_TAG_EMPTY        3
 441
 442 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 443 {
 444         struct _fpxreg *st;
 445         u32 tos = (fxsave->swd >> 11) & 7;
 446         u32 twd = (unsigned long) fxsave->twd;
 447         u32 tag;
 448         u32 ret = 0xffff0000u;
 449         int i;
 450
 451         for (i = 0; i < 8; i++, twd >>= 1) {
 452                 if (twd & 0x1) {
 453                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 454
 455                         switch (st->exponent & 0x7fff) {
 456                         case 0x7fff:
 457                                 tag = FP_EXP_TAG_SPECIAL;
 458                                 break;
 459                         case 0x0000:
 460                                 if (!st->significand[0] &&
 461                                     !st->significand[1] &&
 462                                     !st->significand[2] &&
 463                                     !st->significand[3])
 464                                         tag = FP_EXP_TAG_ZERO;
 465                                 else
 466                                         tag = FP_EXP_TAG_SPECIAL;
 467                                 break;
 468                         default:
 469                                 if (st->significand[3] & 0x8000)
 470                                         tag = FP_EXP_TAG_VALID;
 471                                 else
 472                                         tag = FP_EXP_TAG_SPECIAL;
 473                                 break;
 474                         }
 475                 } else {
 476                         tag = FP_EXP_TAG_EMPTY;
 477                 }
 478                 ret |= tag << (2 * i);
 479         }
 480         return ret;
 481 }
 482
 483 /*
 484  * FXSR floating point environment conversions.
 485  */
 486
 487 void
 488 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 489 {
 490         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 491         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 492         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 493         int i;
 494
 495         env->cwd = fxsave->cwd | 0xffff0000u;
 496         env->swd = fxsave->swd | 0xffff0000u;
 497         env->twd = twd_fxsr_to_i387(fxsave);
 498
 499 #ifdef CONFIG_X86_64
 500         env->fip = fxsave->rip;
 501         env->foo = fxsave->rdp;
 502         /*
 503          * should be actually ds/cs at fpu exception time, but
 504          * that information is not available in 64bit mode.
 505          */
 506         env->fcs = task_pt_regs(tsk)->cs;
 507         if (tsk == current) {
 508                 savesegment(ds, env->fos);
 509         } else {
 510                 env->fos = tsk->thread.ds;
 511         }
 512         env->fos |= 0xffff0000;
 513 #else
 514         env->fip = fxsave->fip;
 515         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 516         env->foo = fxsave->foo;
 517         env->fos = fxsave->fos;
 518 #endif
 519
 520         for (i = 0; i < 8; ++i)
 521                 memcpy(&to[i], &from[i], sizeof(to[0]));
 522 }
 523
 524 void convert_to_fxsr(struct task_struct *tsk,
 525                      const struct user_i387_ia32_struct *env)
 526
 527 {
 528         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 529         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 530         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 531         int i;
 532
 533         fxsave->cwd = env->cwd;
 534         fxsave->swd = env->swd;
 535         fxsave->twd = twd_i387_to_fxsr(env->twd);
 536         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 537 #ifdef CONFIG_X86_64
 538         fxsave->rip = env->fip;
 539         fxsave->rdp = env->foo;
 540         /* cs and ds ignored */
 541 #else
 542         fxsave->fip = env->fip;
 543         fxsave->fcs = (env->fcs & 0xffff);
 544         fxsave->foo = env->foo;
 545         fxsave->fos = env->fos;
 546 #endif
 547
 548         for (i = 0; i < 8; ++i)
 549                 memcpy(&to[i], &from[i], sizeof(from[0]));
 550 }
 551
 552 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 553                unsigned int pos, unsigned int count,
 554                void *kbuf, void __user *ubuf)
 555 {
 556         struct user_i387_ia32_struct env;
 557         int ret;
 558
 559         ret = fpu__unlazy_stopped(target);
 560         if (ret)
 561                 return ret;
 562
 563         if (!static_cpu_has(X86_FEATURE_FPU))
 564                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 565
 566         if (!cpu_has_fxsr)
 567                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 568                                            &target->thread.fpu.state->fsave, 0,
 569                                            -1);
 570
 571         sanitize_i387_state(target);
 572
 573         if (kbuf && pos == 0 && count == sizeof(env)) {
 574                 convert_from_fxsr(kbuf, target);
 575                 return 0;
 576         }
 577
 578         convert_from_fxsr(&env, target);
 579
 580         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 581 }
 582
 583 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 584                unsigned int pos, unsigned int count,
 585                const void *kbuf, const void __user *ubuf)
 586 {
 587         struct user_i387_ia32_struct env;
 588         int ret;
 589
 590         ret = fpu__unlazy_stopped(target);
 591         if (ret)
 592                 return ret;
 593
 594         sanitize_i387_state(target);
 595
 596         if (!static_cpu_has(X86_FEATURE_FPU))
 597                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 598
 599         if (!cpu_has_fxsr)
 600                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 601                                           &target->thread.fpu.state->fsave, 0,
 602                                           -1);
 603
 604         if (pos > 0 || count < sizeof(env))
 605                 convert_from_fxsr(&env, target);
 606
 607         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 608         if (!ret)
 609                 convert_to_fxsr(target, &env);
 610
 611         /*
 612          * update the header bit in the xsave header, indicating the
 613          * presence of FP.
 614          */
 615         if (cpu_has_xsave)
 616                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 617         return ret;
 618 }
 619
 620 /*
 621  * FPU state for core dumps.
 622  * This is only used for a.out dumps now.
 623  * It is declared generically using elf_fpregset_t (which is
 624  * struct user_i387_struct) but is in fact only used for 32-bit
 625  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 626  */
 627 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 628 {
 629         struct task_struct *tsk = current;
 630         int fpvalid;
 631
 632         fpvalid = !!used_math();
 633         if (fpvalid)
 634                 fpvalid = !fpregs_get(tsk, NULL,
 635                                       0, sizeof(struct user_i387_ia32_struct),
 636                                       fpu, NULL);
 637
 638         return fpvalid;
 639 }
 640 EXPORT_SYMBOL(dump_fpu);
 641
 642 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */