2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <asm/fpu/internal.h>
9 #include <linux/hardirq.h>
12 * Track whether the kernel is using the FPU state
17 * - by IRQ context code to potentially use the FPU
20 * - to debug kernel_fpu_begin()/end() correctness
22 static DEFINE_PER_CPU(bool, in_kernel_fpu);
25 * Track which context is using the FPU on the CPU:
27 DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
29 static void kernel_fpu_disable(void)
31 WARN_ON(this_cpu_read(in_kernel_fpu));
32 this_cpu_write(in_kernel_fpu, true);
35 static void kernel_fpu_enable(void)
37 WARN_ON_ONCE(!this_cpu_read(in_kernel_fpu));
38 this_cpu_write(in_kernel_fpu, false);
41 static bool kernel_fpu_disabled(void)
43 return this_cpu_read(in_kernel_fpu);
47 * Were we in an interrupt that interrupted kernel mode?
49 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
50 * pair does nothing at all: the thread must not have fpu (so
51 * that we don't try to save the FPU state), and TS must
52 * be set (so that the clts/stts pair does nothing that is
53 * visible in the interrupted kernel thread).
55 * Except for the eagerfpu case when we return true; in the likely case
56 * the thread has FPU but we are not going to set/clear TS.
58 static bool interrupted_kernel_fpu_idle(void)
60 if (kernel_fpu_disabled())
66 return !current->thread.fpu.fpregs_active && (read_cr0() & X86_CR0_TS);
70 * Were we in user mode (or vm86 mode) when we were
73 * Doing kernel_fpu_begin/end() is ok if we are running
74 * in an interrupt context from user mode - we'll just
75 * save the FPU state as required.
77 static bool interrupted_user_mode(void)
79 struct pt_regs *regs = get_irq_regs();
80 return regs && user_mode(regs);
84 * Can we use the FPU in kernel mode with the
85 * whole "kernel_fpu_begin/end()" sequence?
87 * It's always ok in process context (ie "not interrupt")
88 * but it is sometimes ok even from an irq.
90 bool irq_fpu_usable(void)
92 return !in_interrupt() ||
93 interrupted_user_mode() ||
94 interrupted_kernel_fpu_idle();
96 EXPORT_SYMBOL(irq_fpu_usable);
98 void __kernel_fpu_begin(void)
100 struct fpu *fpu = ¤t->thread.fpu;
102 kernel_fpu_disable();
104 if (fpu->fpregs_active) {
105 copy_fpregs_to_fpstate(fpu);
107 this_cpu_write(fpu_fpregs_owner_ctx, NULL);
108 __fpregs_activate_hw();
111 EXPORT_SYMBOL(__kernel_fpu_begin);
113 void __kernel_fpu_end(void)
115 struct fpu *fpu = ¤t->thread.fpu;
117 if (fpu->fpregs_active) {
118 if (WARN_ON(restore_fpu_checking(fpu)))
119 fpu_reset_state(fpu);
121 __fpregs_deactivate_hw();
126 EXPORT_SYMBOL(__kernel_fpu_end);
128 void kernel_fpu_begin(void)
131 WARN_ON_ONCE(!irq_fpu_usable());
132 __kernel_fpu_begin();
134 EXPORT_SYMBOL_GPL(kernel_fpu_begin);
136 void kernel_fpu_end(void)
141 EXPORT_SYMBOL_GPL(kernel_fpu_end);
144 * CR0::TS save/restore functions:
146 int irq_ts_save(void)
149 * If in process context and not atomic, we can take a spurious DNA fault.
150 * Otherwise, doing clts() in process context requires disabling preemption
151 * or some heavy lifting like kernel_fpu_begin()
156 if (read_cr0() & X86_CR0_TS) {
163 EXPORT_SYMBOL_GPL(irq_ts_save);
165 void irq_ts_restore(int TS_state)
170 EXPORT_SYMBOL_GPL(irq_ts_restore);
173 * Save the FPU state (initialize it if necessary):
175 * This only ever gets called for the current task.
177 void fpu__save(struct fpu *fpu)
179 WARN_ON(fpu != ¤t->thread.fpu);
182 if (fpu->fpregs_active) {
183 if (use_eager_fpu()) {
184 copy_fpregs_to_fpstate(fpu);
186 copy_fpregs_to_fpstate(fpu);
187 fpregs_deactivate(fpu);
192 EXPORT_SYMBOL_GPL(fpu__save);
194 void fpstate_init(struct fpu *fpu)
197 finit_soft_fpu(&fpu->state.soft);
201 memset(&fpu->state, 0, xstate_size);
204 fx_finit(&fpu->state.fxsave);
206 struct i387_fsave_struct *fp = &fpu->state.fsave;
207 fp->cwd = 0xffff037fu;
208 fp->swd = 0xffff0000u;
209 fp->twd = 0xffffffffu;
210 fp->fos = 0xffff0000u;
213 EXPORT_SYMBOL_GPL(fpstate_init);
216 * Copy the current task's FPU state to a new task's FPU context.
218 * In the 'eager' case we just save to the destination context.
220 * In the 'lazy' case we save to the source context, mark the FPU lazy
221 * via stts() and copy the source context into the destination context.
223 static void fpu_copy(struct fpu *dst_fpu, struct fpu *src_fpu)
225 WARN_ON(src_fpu != ¤t->thread.fpu);
227 if (use_eager_fpu()) {
228 memset(&dst_fpu->state.xsave, 0, xstate_size);
229 copy_fpregs_to_fpstate(dst_fpu);
232 memcpy(&dst_fpu->state, &src_fpu->state, xstate_size);
236 int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)
238 dst_fpu->counter = 0;
239 dst_fpu->fpregs_active = 0;
240 dst_fpu->last_cpu = -1;
242 if (src_fpu->fpstate_active)
243 fpu_copy(dst_fpu, src_fpu);
249 * Activate the current task's in-memory FPU context,
250 * if it has not been used before:
252 void fpu__activate_curr(struct fpu *fpu)
254 WARN_ON_ONCE(fpu != ¤t->thread.fpu);
256 if (!fpu->fpstate_active) {
259 /* Safe to do for the current task: */
260 fpu->fpstate_active = 1;
263 EXPORT_SYMBOL_GPL(fpu__activate_curr);
266 * This function must be called before we modify a stopped child's
269 * If the child has not used the FPU before then initialize its
272 * If the child has used the FPU before then unlazy it.
274 * [ After this function call, after registers in the fpstate are
275 * modified and the child task has woken up, the child task will
276 * restore the modified FPU state from the modified context. If we
277 * didn't clear its lazy status here then the lazy in-registers
278 * state pending on its former CPU could be restored, corrupting
279 * the modifications. ]
281 * This function is also called before we read a stopped child's
282 * FPU state - to make sure it's initialized if the child has
283 * no active FPU state.
285 * TODO: A future optimization would be to skip the unlazying in
286 * the read-only case, it's not strictly necessary for
287 * read-only access to the context.
289 static void fpu__activate_stopped(struct fpu *child_fpu)
291 WARN_ON_ONCE(child_fpu == ¤t->thread.fpu);
293 if (child_fpu->fpstate_active) {
294 child_fpu->last_cpu = -1;
296 fpstate_init(child_fpu);
298 /* Safe to do for stopped child tasks: */
299 child_fpu->fpstate_active = 1;
304 * 'fpu__restore()' saves the current math information in the
305 * old math state array, and gets the new ones from the current task
307 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
308 * Don't touch unless you *really* know how it works.
310 * Must be called with kernel preemption disabled (eg with local
311 * local interrupts as in the case of do_device_not_available).
313 void fpu__restore(void)
315 struct task_struct *tsk = current;
316 struct fpu *fpu = &tsk->thread.fpu;
318 fpu__activate_curr(fpu);
320 /* Avoid __kernel_fpu_begin() right after fpregs_activate() */
321 kernel_fpu_disable();
322 fpregs_activate(fpu);
323 if (unlikely(restore_fpu_checking(fpu))) {
324 fpu_reset_state(fpu);
325 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
327 tsk->thread.fpu.counter++;
331 EXPORT_SYMBOL_GPL(fpu__restore);
333 void fpu__clear(struct task_struct *tsk)
335 struct fpu *fpu = &tsk->thread.fpu;
337 WARN_ON_ONCE(tsk != current); /* Almost certainly an anomaly */
339 if (!use_eager_fpu()) {
340 /* FPU state will be reallocated lazily at the first use. */
343 if (!fpu->fpstate_active) {
344 fpu__activate_curr(fpu);
347 restore_init_xstate();
352 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
353 * as the "regset->n" for the xstate regset will be updated based on the feature
354 * capabilites supported by the xsave.
356 int regset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
358 struct fpu *target_fpu = &target->thread.fpu;
360 return target_fpu->fpstate_active ? regset->n : 0;
363 int regset_xregset_fpregs_active(struct task_struct *target, const struct user_regset *regset)
365 struct fpu *target_fpu = &target->thread.fpu;
367 return (cpu_has_fxsr && target_fpu->fpstate_active) ? regset->n : 0;
370 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
371 unsigned int pos, unsigned int count,
372 void *kbuf, void __user *ubuf)
374 struct fpu *fpu = &target->thread.fpu;
379 fpu__activate_stopped(fpu);
380 sanitize_i387_state(target);
382 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
383 &fpu->state.fxsave, 0, -1);
386 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
387 unsigned int pos, unsigned int count,
388 const void *kbuf, const void __user *ubuf)
390 struct fpu *fpu = &target->thread.fpu;
396 fpu__activate_stopped(fpu);
397 sanitize_i387_state(target);
399 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
400 &fpu->state.fxsave, 0, -1);
403 * mxcsr reserved bits must be masked to zero for security reasons.
405 fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
408 * update the header bits in the xsave header, indicating the
409 * presence of FP and SSE state.
412 fpu->state.xsave.header.xfeatures |= XSTATE_FPSSE;
417 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
418 unsigned int pos, unsigned int count,
419 void *kbuf, void __user *ubuf)
421 struct fpu *fpu = &target->thread.fpu;
422 struct xsave_struct *xsave;
428 fpu__activate_stopped(fpu);
430 xsave = &fpu->state.xsave;
433 * Copy the 48bytes defined by the software first into the xstate
434 * memory layout in the thread struct, so that we can copy the entire
435 * xstateregs to the user using one user_regset_copyout().
437 memcpy(&xsave->i387.sw_reserved,
438 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
440 * Copy the xstate memory layout.
442 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
446 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
447 unsigned int pos, unsigned int count,
448 const void *kbuf, const void __user *ubuf)
450 struct fpu *fpu = &target->thread.fpu;
451 struct xsave_struct *xsave;
457 fpu__activate_stopped(fpu);
459 xsave = &fpu->state.xsave;
461 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
463 * mxcsr reserved bits must be masked to zero for security reasons.
465 xsave->i387.mxcsr &= mxcsr_feature_mask;
466 xsave->header.xfeatures &= xfeatures_mask;
468 * These bits must be zero.
470 memset(&xsave->header.reserved, 0, 48);
475 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
478 * FPU tag word conversions.
481 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
483 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
485 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
487 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
488 /* and move the valid bits to the lower byte. */
489 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
490 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
491 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
496 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
497 #define FP_EXP_TAG_VALID 0
498 #define FP_EXP_TAG_ZERO 1
499 #define FP_EXP_TAG_SPECIAL 2
500 #define FP_EXP_TAG_EMPTY 3
502 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
505 u32 tos = (fxsave->swd >> 11) & 7;
506 u32 twd = (unsigned long) fxsave->twd;
508 u32 ret = 0xffff0000u;
511 for (i = 0; i < 8; i++, twd >>= 1) {
513 st = FPREG_ADDR(fxsave, (i - tos) & 7);
515 switch (st->exponent & 0x7fff) {
517 tag = FP_EXP_TAG_SPECIAL;
520 if (!st->significand[0] &&
521 !st->significand[1] &&
522 !st->significand[2] &&
524 tag = FP_EXP_TAG_ZERO;
526 tag = FP_EXP_TAG_SPECIAL;
529 if (st->significand[3] & 0x8000)
530 tag = FP_EXP_TAG_VALID;
532 tag = FP_EXP_TAG_SPECIAL;
536 tag = FP_EXP_TAG_EMPTY;
538 ret |= tag << (2 * i);
544 * FXSR floating point environment conversions.
548 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
550 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
551 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
552 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
555 env->cwd = fxsave->cwd | 0xffff0000u;
556 env->swd = fxsave->swd | 0xffff0000u;
557 env->twd = twd_fxsr_to_i387(fxsave);
560 env->fip = fxsave->rip;
561 env->foo = fxsave->rdp;
563 * should be actually ds/cs at fpu exception time, but
564 * that information is not available in 64bit mode.
566 env->fcs = task_pt_regs(tsk)->cs;
567 if (tsk == current) {
568 savesegment(ds, env->fos);
570 env->fos = tsk->thread.ds;
572 env->fos |= 0xffff0000;
574 env->fip = fxsave->fip;
575 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
576 env->foo = fxsave->foo;
577 env->fos = fxsave->fos;
580 for (i = 0; i < 8; ++i)
581 memcpy(&to[i], &from[i], sizeof(to[0]));
584 void convert_to_fxsr(struct task_struct *tsk,
585 const struct user_i387_ia32_struct *env)
588 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state.fxsave;
589 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
590 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
593 fxsave->cwd = env->cwd;
594 fxsave->swd = env->swd;
595 fxsave->twd = twd_i387_to_fxsr(env->twd);
596 fxsave->fop = (u16) ((u32) env->fcs >> 16);
598 fxsave->rip = env->fip;
599 fxsave->rdp = env->foo;
600 /* cs and ds ignored */
602 fxsave->fip = env->fip;
603 fxsave->fcs = (env->fcs & 0xffff);
604 fxsave->foo = env->foo;
605 fxsave->fos = env->fos;
608 for (i = 0; i < 8; ++i)
609 memcpy(&to[i], &from[i], sizeof(from[0]));
612 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
613 unsigned int pos, unsigned int count,
614 void *kbuf, void __user *ubuf)
616 struct fpu *fpu = &target->thread.fpu;
617 struct user_i387_ia32_struct env;
619 fpu__activate_stopped(fpu);
621 if (!static_cpu_has(X86_FEATURE_FPU))
622 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
625 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
626 &fpu->state.fsave, 0,
629 sanitize_i387_state(target);
631 if (kbuf && pos == 0 && count == sizeof(env)) {
632 convert_from_fxsr(kbuf, target);
636 convert_from_fxsr(&env, target);
638 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
641 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
642 unsigned int pos, unsigned int count,
643 const void *kbuf, const void __user *ubuf)
645 struct fpu *fpu = &target->thread.fpu;
646 struct user_i387_ia32_struct env;
649 fpu__activate_stopped(fpu);
651 sanitize_i387_state(target);
653 if (!static_cpu_has(X86_FEATURE_FPU))
654 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
657 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
658 &fpu->state.fsave, 0,
661 if (pos > 0 || count < sizeof(env))
662 convert_from_fxsr(&env, target);
664 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
666 convert_to_fxsr(target, &env);
669 * update the header bit in the xsave header, indicating the
673 fpu->state.xsave.header.xfeatures |= XSTATE_FP;
678 * FPU state for core dumps.
679 * This is only used for a.out dumps now.
680 * It is declared generically using elf_fpregset_t (which is
681 * struct user_i387_struct) but is in fact only used for 32-bit
682 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
684 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *ufpu)
686 struct task_struct *tsk = current;
687 struct fpu *fpu = &tsk->thread.fpu;
690 fpvalid = fpu->fpstate_active;
692 fpvalid = !fpregs_get(tsk, NULL,
693 0, sizeof(struct user_i387_ia32_struct),
698 EXPORT_SYMBOL(dump_fpu);
700 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */