2 * x86 FPU boot time init code:
4 #include <asm/fpu/internal.h>
5 #include <asm/tlbflush.h>
8 * Initialize the TS bit in CR0 according to the style of context-switches
11 static void fpu__init_cpu_ctx_switch(void)
13 if (!cpu_has_eager_fpu)
20 * Initialize the registers found in all CPUs, CR0 and CR4:
22 static void fpu__init_cpu_generic(void)
25 unsigned long cr4_mask = 0;
28 cr4_mask |= X86_CR4_OSFXSR;
30 cr4_mask |= X86_CR4_OSXMMEXCPT;
32 cr4_set_bits(cr4_mask);
35 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
40 /* Flush out any pending x87 state: */
41 asm volatile ("fninit");
45 * Enable all supported FPU features. Called when a CPU is brought online:
47 void fpu__init_cpu(void)
49 fpu__init_cpu_generic();
50 fpu__init_cpu_xstate();
51 fpu__init_cpu_ctx_switch();
55 * The earliest FPU detection code.
57 * Set the X86_FEATURE_FPU CPU-capability bit based on
58 * trying to execute an actual sequence of FPU instructions:
60 static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
68 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
71 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
72 : "+m" (fsw), "+m" (fcw));
74 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
75 set_cpu_cap(c, X86_FEATURE_FPU);
77 clear_cpu_cap(c, X86_FEATURE_FPU);
79 #ifndef CONFIG_MATH_EMULATION
81 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
89 * Boot time FPU feature detection code:
91 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
93 static void fpu__init_system_mxcsr(void)
95 unsigned int mask = 0;
98 struct i387_fxsave_struct fx_tmp __aligned(32) = { };
100 asm volatile("fxsave %0" : "+m" (fx_tmp));
102 mask = fx_tmp.mxcsr_mask;
105 * If zero then use the default features mask,
106 * which has all features set, except the
107 * denormals-are-zero feature bit:
112 mxcsr_feature_mask &= mask;
116 * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
118 static void fpu__init_system_generic(void)
121 * Set up the legacy init FPU context. (xstate init might overwrite this
122 * with a more modern format, if the CPU supports it.)
124 fpstate_init_fxstate(&init_fpstate.fxsave);
126 fpu__init_system_mxcsr();
130 * Size of the FPU context state. All tasks in the system use the
131 * same context size, regardless of what portion they use.
132 * This is inherent to the XSAVE architecture which puts all state
133 * components into a single, continuous memory block:
135 unsigned int xstate_size;
136 EXPORT_SYMBOL_GPL(xstate_size);
139 * Set up the xstate_size based on the legacy FPU context size.
141 * We set this up first, and later it will be overwritten by
142 * fpu__init_system_xstate() if the CPU knows about xstates.
144 static void fpu__init_system_xstate_size_legacy(void)
147 * Note that xstate_size might be overwriten later during
148 * fpu__init_system_xstate().
153 * Disable xsave as we do not support it if i387
154 * emulation is enabled.
156 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
157 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
158 xstate_size = sizeof(struct i387_soft_struct);
161 xstate_size = sizeof(struct i387_fxsave_struct);
163 xstate_size = sizeof(struct i387_fsave_struct);
168 * FPU context switching strategies:
170 * Against popular belief, we don't do lazy FPU saves, due to the
171 * task migration complications it brings on SMP - we only do
174 * 'lazy' is the traditional strategy, which is based on setting
175 * CR0::TS to 1 during context-switch (instead of doing a full
176 * restore of the FPU state), which causes the first FPU instruction
177 * after the context switch (whenever it is executed) to fault - at
178 * which point we lazily restore the FPU state into FPU registers.
180 * Tasks are of course under no obligation to execute FPU instructions,
181 * so it can easily happen that another context-switch occurs without
182 * a single FPU instruction being executed. If we eventually switch
183 * back to the original task (that still owns the FPU) then we have
184 * not only saved the restores along the way, but we also have the
185 * FPU ready to be used for the original task.
187 * 'eager' switching is used on modern CPUs, there we switch the FPU
188 * state during every context switch, regardless of whether the task
189 * has used FPU instructions in that time slice or not. This is done
190 * because modern FPU context saving instructions are able to optimize
191 * state saving and restoration in hardware: they can detect both
192 * unused and untouched FPU state and optimize accordingly.
194 * [ Note that even in 'lazy' mode we might optimize context switches
195 * to use 'eager' restores, if we detect that a task is using the FPU
196 * frequently. See the fpu->counter logic in fpu/internal.h for that. ]
198 static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
200 static int __init eager_fpu_setup(char *s)
202 if (!strcmp(s, "on"))
204 else if (!strcmp(s, "off"))
206 else if (!strcmp(s, "auto"))
210 __setup("eagerfpu=", eager_fpu_setup);
213 * Pick the FPU context switching strategy:
215 static void fpu__init_system_ctx_switch(void)
217 WARN_ON(current->thread.fpu.fpstate_active);
218 current_thread_info()->status = 0;
220 /* Auto enable eagerfpu for xsaveopt */
221 if (cpu_has_xsaveopt && eagerfpu != DISABLE)
224 if (xfeatures_mask & XSTATE_EAGER) {
225 if (eagerfpu == DISABLE) {
226 pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n",
227 xfeatures_mask & XSTATE_EAGER);
228 xfeatures_mask &= ~XSTATE_EAGER;
234 if (eagerfpu == ENABLE)
235 setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);
237 printk_once(KERN_INFO "x86/fpu: Using '%s' FPU context switches.\n", eagerfpu == ENABLE ? "eager" : "lazy");
241 * Called on the boot CPU once per system bootup, to set up the initial
242 * FPU state that is later cloned into all processes:
244 void fpu__init_system(struct cpuinfo_x86 *c)
246 fpu__init_system_early_generic(c);
249 * The FPU has to be operational for some of the
250 * later FPU init activities:
255 * But don't leave CR0::TS set yet, as some of the FPU setup
256 * methods depend on being able to execute FPU instructions
257 * that will fault on a set TS, such as the FXSAVE in
258 * fpu__init_system_mxcsr().
262 fpu__init_system_generic();
263 fpu__init_system_xstate_size_legacy();
264 fpu__init_system_xstate();
267 fpu__init_system_ctx_switch();
271 * Boot parameter to turn off FPU support and fall back to math-emu:
273 static int __init no_387(char *s)
275 setup_clear_cpu_cap(X86_FEATURE_FPU);
279 __setup("no387", no_387);