arch/x86/kernel/fpu/xstate.c

   1 /*
   2  * xsave/xrstor support.
   3  *
   4  * Author: Suresh Siddha <suresh.b.siddha@intel.com>
   5  */
   6 #include <linux/compat.h>
   7 #include <linux/cpu.h>
   8
   9 #include <asm/fpu/api.h>
  10 #include <asm/fpu/internal.h>
  11 #include <asm/fpu/signal.h>
  12 #include <asm/fpu/regset.h>
  13
  14 #include <asm/tlbflush.h>
  15
  16 static const char *xfeature_names[] =
  17 {
  18         "x87 floating point registers"  ,
  19         "SSE registers"                 ,
  20         "AVX registers"                 ,
  21         "MPX bounds registers"          ,
  22         "MPX CSR"                       ,
  23         "AVX-512 opmask"                ,
  24         "AVX-512 Hi256"                 ,
  25         "AVX-512 ZMM_Hi256"             ,
  26         "unknown xstate feature"        ,
  27 };
  28
  29 /*
  30  * Mask of xstate features supported by the CPU and the kernel:
  31  */
  32 u64 xfeatures_mask __read_mostly;
  33
  34 static unsigned int xstate_offsets[XFEATURES_NR_MAX], xstate_sizes[XFEATURES_NR_MAX];
  35 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
  36
  37 /* The number of supported xfeatures in xfeatures_mask: */
  38 static unsigned int xfeatures_nr;
  39
  40 /*
  41  * Return whether the system supports a given xfeature.
  42  *
  43  * Also return the name of the (most advanced) feature that the caller requested:
  44  */
  45 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
  46 {
  47         u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
  48
  49         if (unlikely(feature_name)) {
  50                 long xfeature_idx, max_idx;
  51                 u64 xfeatures_print;
  52                 /*
  53                  * So we use FLS here to be able to print the most advanced
  54                  * feature that was requested but is missing. So if a driver
  55                  * asks about "XSTATE_SSE | XSTATE_YMM" we'll print the
  56                  * missing AVX feature - this is the most informative message
  57                  * to users:
  58                  */
  59                 if (xfeatures_missing)
  60                         xfeatures_print = xfeatures_missing;
  61                 else
  62                         xfeatures_print = xfeatures_needed;
  63
  64                 xfeature_idx = fls64(xfeatures_print)-1;
  65                 max_idx = ARRAY_SIZE(xfeature_names)-1;
  66                 xfeature_idx = min(xfeature_idx, max_idx);
  67
  68                 *feature_name = xfeature_names[xfeature_idx];
  69         }
  70
  71         if (xfeatures_missing)
  72                 return 0;
  73
  74         return 1;
  75 }
  76 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
  77
  78 /*
  79  * When executing XSAVEOPT (or other optimized XSAVE instructions), if
  80  * a processor implementation detects that an FPU state component is still
  81  * (or is again) in its initialized state, it may clear the corresponding
  82  * bit in the header.xfeatures field, and can skip the writeout of registers
  83  * to the corresponding memory layout.
  84  *
  85  * This means that when the bit is zero, the state component might still contain
  86  * some previous - non-initialized register state.
  87  *
  88  * Before writing xstate information to user-space we sanitize those components,
  89  * to always ensure that the memory layout of a feature will be in the init state
  90  * if the corresponding header bit is zero. This is to ensure that user-space doesn't
  91  * see some stale state in the memory layout during signal handling, debugging etc.
  92  */
  93 void fpstate_sanitize_xstate(struct fpu *fpu)
  94 {
  95         struct fxregs_state *fx = &fpu->state.fxsave;
  96         int feature_bit;
  97         u64 xfeatures;
  98
  99         if (!use_xsaveopt())
 100                 return;
 101
 102         xfeatures = fpu->state.xsave.header.xfeatures;
 103
 104         /*
 105          * None of the feature bits are in init state. So nothing else
 106          * to do for us, as the memory layout is up to date.
 107          */
 108         if ((xfeatures & xfeatures_mask) == xfeatures_mask)
 109                 return;
 110
 111         /*
 112          * FP is in init state
 113          */
 114         if (!(xfeatures & XSTATE_FP)) {
 115                 fx->cwd = 0x37f;
 116                 fx->swd = 0;
 117                 fx->twd = 0;
 118                 fx->fop = 0;
 119                 fx->rip = 0;
 120                 fx->rdp = 0;
 121                 memset(&fx->st_space[0], 0, 128);
 122         }
 123
 124         /*
 125          * SSE is in init state
 126          */
 127         if (!(xfeatures & XSTATE_SSE))
 128                 memset(&fx->xmm_space[0], 0, 256);
 129
 130         /*
 131          * First two features are FPU and SSE, which above we handled
 132          * in a special way already:
 133          */
 134         feature_bit = 0x2;
 135         xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
 136
 137         /*
 138          * Update all the remaining memory layouts according to their
 139          * standard xstate layout, if their header bit is in the init
 140          * state:
 141          */
 142         while (xfeatures) {
 143                 if (xfeatures & 0x1) {
 144                         int offset = xstate_offsets[feature_bit];
 145                         int size = xstate_sizes[feature_bit];
 146
 147                         memcpy((void *)fx + offset,
 148                                (void *)&init_fpstate.xsave + offset,
 149                                size);
 150                 }
 151
 152                 xfeatures >>= 1;
 153                 feature_bit++;
 154         }
 155 }
 156
 157 /*
 158  * Enable the extended processor state save/restore feature.
 159  * Called once per CPU onlining.
 160  */
 161 void fpu__init_cpu_xstate(void)
 162 {
 163         if (!cpu_has_xsave || !xfeatures_mask)
 164                 return;
 165
 166         cr4_set_bits(X86_CR4_OSXSAVE);
 167         xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
 168 }
 169
 170 /*
 171  * Record the offsets and sizes of various xstates contained
 172  * in the XSAVE state memory layout.
 173  *
 174  * ( Note that certain features might be non-present, for them
 175  *   we'll have 0 offset and 0 size. )
 176  */
 177 static void __init setup_xstate_features(void)
 178 {
 179         u32 eax, ebx, ecx, edx, leaf;
 180
 181         xfeatures_nr = fls64(xfeatures_mask);
 182
 183         for (leaf = 2; leaf < xfeatures_nr; leaf++) {
 184                 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
 185
 186                 xstate_offsets[leaf] = ebx;
 187                 xstate_sizes[leaf] = eax;
 188
 189                 printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %04x, xstate_sizes[%d]: %04x\n", leaf, ebx, leaf, eax);
 190                 leaf++;
 191         }
 192 }
 193
 194 static void print_xstate_feature(u64 xstate_mask)
 195 {
 196         const char *feature_name;
 197
 198         if (cpu_has_xfeatures(xstate_mask, &feature_name))
 199                 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
 200 }
 201
 202 /*
 203  * Print out all the supported xstate features:
 204  */
 205 static void print_xstate_features(void)
 206 {
 207         print_xstate_feature(XSTATE_FP);
 208         print_xstate_feature(XSTATE_SSE);
 209         print_xstate_feature(XSTATE_YMM);
 210         print_xstate_feature(XSTATE_BNDREGS);
 211         print_xstate_feature(XSTATE_BNDCSR);
 212         print_xstate_feature(XSTATE_OPMASK);
 213         print_xstate_feature(XSTATE_ZMM_Hi256);
 214         print_xstate_feature(XSTATE_Hi16_ZMM);
 215 }
 216
 217 /*
 218  * This function sets up offsets and sizes of all extended states in
 219  * xsave area. This supports both standard format and compacted format
 220  * of the xsave aread.
 221  *
 222  * Input: void
 223  * Output: void
 224  */
 225 void setup_xstate_comp(void)
 226 {
 227         unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
 228         int i;
 229
 230         /*
 231          * The FP xstates and SSE xstates are legacy states. They are always
 232          * in the fixed offsets in the xsave area in either compacted form
 233          * or standard form.
 234          */
 235         xstate_comp_offsets[0] = 0;
 236         xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
 237
 238         if (!cpu_has_xsaves) {
 239                 for (i = 2; i < xfeatures_nr; i++) {
 240                         if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
 241                                 xstate_comp_offsets[i] = xstate_offsets[i];
 242                                 xstate_comp_sizes[i] = xstate_sizes[i];
 243                         }
 244                 }
 245                 return;
 246         }
 247
 248         xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;
 249
 250         for (i = 2; i < xfeatures_nr; i++) {
 251                 if (test_bit(i, (unsigned long *)&xfeatures_mask))
 252                         xstate_comp_sizes[i] = xstate_sizes[i];
 253                 else
 254                         xstate_comp_sizes[i] = 0;
 255
 256                 if (i > 2)
 257                         xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
 258                                         + xstate_comp_sizes[i-1];
 259
 260         }
 261 }
 262
 263 /*
 264  * setup the xstate image representing the init state
 265  */
 266 static void setup_init_fpu_buf(void)
 267 {
 268         if (!cpu_has_xsave)
 269                 return;
 270
 271         setup_xstate_features();
 272         print_xstate_features();
 273
 274         if (cpu_has_xsaves) {
 275                 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
 276                 init_fpstate.xsave.header.xfeatures = xfeatures_mask;
 277         }
 278
 279         /*
 280          * Init all the features state with header_bv being 0x0
 281          */
 282         copy_kernel_to_xregs_booting(&init_fpstate.xsave, -1);
 283
 284         /*
 285          * Dump the init state again. This is to identify the init state
 286          * of any feature which is not represented by all zero's.
 287          */
 288         copy_xregs_to_kernel_booting(&init_fpstate.xsave);
 289 }
 290
 291 /*
 292  * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
 293  */
 294 static void __init init_xstate_size(void)
 295 {
 296         unsigned int eax, ebx, ecx, edx;
 297         int i;
 298
 299         if (!cpu_has_xsaves) {
 300                 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 301                 xstate_size = ebx;
 302                 return;
 303         }
 304
 305         xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
 306         for (i = 2; i < 64; i++) {
 307                 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
 308                         cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
 309                         xstate_size += eax;
 310                 }
 311         }
 312 }
 313
 314 /*
 315  * Enable and initialize the xsave feature.
 316  * Called once per system bootup.
 317  *
 318  * ( Not marked __init because of false positive section warnings. )
 319  */
 320 void fpu__init_system_xstate(void)
 321 {
 322         unsigned int eax, ebx, ecx, edx;
 323
 324         if (!cpu_has_xsave) {
 325                 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
 326                 return;
 327         }
 328
 329         if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
 330                 WARN(1, "x86/fpu: XSTATE_CPUID missing!\n");
 331                 return;
 332         }
 333
 334         cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 335         xfeatures_mask = eax + ((u64)edx << 32);
 336
 337         if ((xfeatures_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
 338                 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
 339                 BUG();
 340         }
 341
 342         /*
 343          * Support only the state known to OS.
 344          */
 345         xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
 346
 347         /* Enable xstate instructions to be able to continue with initialization: */
 348         fpu__init_cpu_xstate();
 349
 350         /*
 351          * Recompute the context size for enabled features
 352          */
 353         init_xstate_size();
 354
 355         update_regset_xstate_info(xstate_size, xfeatures_mask);
 356         fpu__init_prepare_fx_sw_frame();
 357         setup_init_fpu_buf();
 358
 359         pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is 0x%x bytes, using '%s' format.\n",
 360                 xfeatures_mask,
 361                 xstate_size,
 362                 cpu_has_xsaves ? "compacted" : "standard");
 363 }
 364
 365 /*
 366  * Restore minimal FPU state after suspend:
 367  */
 368 void fpu__resume_cpu(void)
 369 {
 370         /*
 371          * Restore XCR0 on xsave capable CPUs:
 372          */
 373         if (cpu_has_xsave)
 374                 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
 375 }
 376
 377 /*
 378  * Given the xsave area and a state inside, this function returns the
 379  * address of the state.
 380  *
 381  * This is the API that is called to get xstate address in either
 382  * standard format or compacted format of xsave area.
 383  *
 384  * Inputs:
 385  *      xsave: base address of the xsave area;
 386  *      xstate: state which is defined in xsave.h (e.g. XSTATE_FP, XSTATE_SSE,
 387  *      etc.)
 388  * Output:
 389  *      address of the state in the xsave area.
 390  */
 391 void *get_xsave_addr(struct xregs_state *xsave, int xstate)
 392 {
 393         int feature = fls64(xstate) - 1;
 394         if (!test_bit(feature, (unsigned long *)&xfeatures_mask))
 395                 return NULL;
 396
 397         return (void *)xsave + xstate_comp_offsets[feature];
 398 }
 399 EXPORT_SYMBOL_GPL(get_xsave_addr);