2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
19 #include <asm/fpu-internal.h>
23 * Were we in an interrupt that interrupted kernel mode?
25 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
26 * pair does nothing at all: the thread must not have fpu (so
27 * that we don't try to save the FPU state), and TS must
28 * be set (so that the clts/stts pair does nothing that is
29 * visible in the interrupted kernel thread).
31 * Except for the eagerfpu case when we return 1 unless we've already
32 * been eager and saved the state in kernel_fpu_begin().
34 static inline bool interrupted_kernel_fpu_idle(void)
37 return __thread_has_fpu(current);
39 return !__thread_has_fpu(current) &&
40 (read_cr0() & X86_CR0_TS);
44 * Were we in user mode (or vm86 mode) when we were
47 * Doing kernel_fpu_begin/end() is ok if we are running
48 * in an interrupt context from user mode - we'll just
49 * save the FPU state as required.
51 static inline bool interrupted_user_mode(void)
53 struct pt_regs *regs = get_irq_regs();
54 return regs && user_mode_vm(regs);
58 * Can we use the FPU in kernel mode with the
59 * whole "kernel_fpu_begin/end()" sequence?
61 * It's always ok in process context (ie "not interrupt")
62 * but it is sometimes ok even from an irq.
64 bool irq_fpu_usable(void)
66 return !in_interrupt() ||
67 interrupted_user_mode() ||
68 interrupted_kernel_fpu_idle();
70 EXPORT_SYMBOL(irq_fpu_usable);
72 void __kernel_fpu_begin(void)
74 struct task_struct *me = current;
76 if (__thread_has_fpu(me)) {
77 __thread_clear_has_fpu(me);
79 /* We do 'stts()' in __kernel_fpu_end() */
80 } else if (!use_eager_fpu()) {
81 this_cpu_write(fpu_owner_task, NULL);
85 EXPORT_SYMBOL(__kernel_fpu_begin);
87 void __kernel_fpu_end(void)
89 if (use_eager_fpu()) {
91 * For eager fpu, most the time, tsk_used_math() is true.
92 * Restore the user math as we are done with the kernel usage.
93 * At few instances during thread exit, signal handling etc,
94 * tsk_used_math() is false. Those few places will take proper
95 * actions, so we don't need to restore the math here.
97 if (likely(tsk_used_math(current)))
103 EXPORT_SYMBOL(__kernel_fpu_end);
105 void unlazy_fpu(struct task_struct *tsk)
108 if (__thread_has_fpu(tsk)) {
109 __save_init_fpu(tsk);
110 __thread_fpu_end(tsk);
112 tsk->fpu_counter = 0;
115 EXPORT_SYMBOL(unlazy_fpu);
117 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
118 unsigned int xstate_size;
119 EXPORT_SYMBOL_GPL(xstate_size);
120 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
122 static void __cpuinit mxcsr_feature_mask_init(void)
124 unsigned long mask = 0;
127 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
128 asm volatile("fxsave %0" : "+m" (fx_scratch));
129 mask = fx_scratch.mxcsr_mask;
133 mxcsr_feature_mask &= mask;
136 static void __cpuinit init_thread_xstate(void)
139 * Note that xstate_size might be overwriten later during
145 * Disable xsave as we do not support it if i387
146 * emulation is enabled.
148 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
149 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
150 xstate_size = sizeof(struct i387_soft_struct);
155 xstate_size = sizeof(struct i387_fxsave_struct);
157 xstate_size = sizeof(struct i387_fsave_struct);
161 * Called at bootup to set up the initial FPU state that is later cloned
162 * into all processes.
165 void __cpuinit fpu_init(void)
168 unsigned long cr4_mask = 0;
171 cr4_mask |= X86_CR4_OSFXSR;
173 cr4_mask |= X86_CR4_OSXMMEXCPT;
175 set_in_cr4(cr4_mask);
178 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
184 * init_thread_xstate is only called once to avoid overriding
185 * xstate_size during boot time or during CPU hotplug.
187 if (xstate_size == 0)
188 init_thread_xstate();
190 mxcsr_feature_mask_init();
195 void fpu_finit(struct fpu *fpu)
198 finit_soft_fpu(&fpu->state->soft);
203 fx_finit(&fpu->state->fxsave);
205 struct i387_fsave_struct *fp = &fpu->state->fsave;
206 memset(fp, 0, xstate_size);
207 fp->cwd = 0xffff037fu;
208 fp->swd = 0xffff0000u;
209 fp->twd = 0xffffffffu;
210 fp->fos = 0xffff0000u;
213 EXPORT_SYMBOL_GPL(fpu_finit);
216 * The _current_ task is using the FPU for the first time
217 * so initialize it and set the mxcsr to its default
218 * value at reset if we support XMM instructions and then
219 * remember the current task has used the FPU.
221 int init_fpu(struct task_struct *tsk)
225 if (tsk_used_math(tsk)) {
226 if (HAVE_HWFP && tsk == current)
228 tsk->thread.fpu.last_cpu = ~0;
233 * Memory allocation at the first usage of the FPU and other state.
235 ret = fpu_alloc(&tsk->thread.fpu);
239 fpu_finit(&tsk->thread.fpu);
241 set_stopped_child_used_math(tsk);
244 EXPORT_SYMBOL_GPL(init_fpu);
247 * The xstateregs_active() routine is the same as the fpregs_active() routine,
248 * as the "regset->n" for the xstate regset will be updated based on the feature
249 * capabilites supported by the xsave.
251 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
253 return tsk_used_math(target) ? regset->n : 0;
256 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
258 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
261 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
262 unsigned int pos, unsigned int count,
263 void *kbuf, void __user *ubuf)
270 ret = init_fpu(target);
274 sanitize_i387_state(target);
276 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
277 &target->thread.fpu.state->fxsave, 0, -1);
280 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
281 unsigned int pos, unsigned int count,
282 const void *kbuf, const void __user *ubuf)
289 ret = init_fpu(target);
293 sanitize_i387_state(target);
295 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
296 &target->thread.fpu.state->fxsave, 0, -1);
299 * mxcsr reserved bits must be masked to zero for security reasons.
301 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
304 * update the header bits in the xsave header, indicating the
305 * presence of FP and SSE state.
308 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
313 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
314 unsigned int pos, unsigned int count,
315 void *kbuf, void __user *ubuf)
322 ret = init_fpu(target);
327 * Copy the 48bytes defined by the software first into the xstate
328 * memory layout in the thread struct, so that we can copy the entire
329 * xstateregs to the user using one user_regset_copyout().
331 memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
332 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
335 * Copy the xstate memory layout.
337 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
338 &target->thread.fpu.state->xsave, 0, -1);
342 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
343 unsigned int pos, unsigned int count,
344 const void *kbuf, const void __user *ubuf)
347 struct xsave_hdr_struct *xsave_hdr;
352 ret = init_fpu(target);
356 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
357 &target->thread.fpu.state->xsave, 0, -1);
360 * mxcsr reserved bits must be masked to zero for security reasons.
362 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
364 xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
366 xsave_hdr->xstate_bv &= pcntxt_mask;
368 * These bits must be zero.
370 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
375 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
378 * FPU tag word conversions.
381 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
383 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
385 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
387 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
388 /* and move the valid bits to the lower byte. */
389 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
390 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
391 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
396 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
397 #define FP_EXP_TAG_VALID 0
398 #define FP_EXP_TAG_ZERO 1
399 #define FP_EXP_TAG_SPECIAL 2
400 #define FP_EXP_TAG_EMPTY 3
402 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
405 u32 tos = (fxsave->swd >> 11) & 7;
406 u32 twd = (unsigned long) fxsave->twd;
408 u32 ret = 0xffff0000u;
411 for (i = 0; i < 8; i++, twd >>= 1) {
413 st = FPREG_ADDR(fxsave, (i - tos) & 7);
415 switch (st->exponent & 0x7fff) {
417 tag = FP_EXP_TAG_SPECIAL;
420 if (!st->significand[0] &&
421 !st->significand[1] &&
422 !st->significand[2] &&
424 tag = FP_EXP_TAG_ZERO;
426 tag = FP_EXP_TAG_SPECIAL;
429 if (st->significand[3] & 0x8000)
430 tag = FP_EXP_TAG_VALID;
432 tag = FP_EXP_TAG_SPECIAL;
436 tag = FP_EXP_TAG_EMPTY;
438 ret |= tag << (2 * i);
444 * FXSR floating point environment conversions.
448 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
450 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
451 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
452 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
455 env->cwd = fxsave->cwd | 0xffff0000u;
456 env->swd = fxsave->swd | 0xffff0000u;
457 env->twd = twd_fxsr_to_i387(fxsave);
460 env->fip = fxsave->rip;
461 env->foo = fxsave->rdp;
463 * should be actually ds/cs at fpu exception time, but
464 * that information is not available in 64bit mode.
466 env->fcs = task_pt_regs(tsk)->cs;
467 if (tsk == current) {
468 savesegment(ds, env->fos);
470 env->fos = tsk->thread.ds;
472 env->fos |= 0xffff0000;
474 env->fip = fxsave->fip;
475 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
476 env->foo = fxsave->foo;
477 env->fos = fxsave->fos;
480 for (i = 0; i < 8; ++i)
481 memcpy(&to[i], &from[i], sizeof(to[0]));
484 void convert_to_fxsr(struct task_struct *tsk,
485 const struct user_i387_ia32_struct *env)
488 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
489 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
490 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
493 fxsave->cwd = env->cwd;
494 fxsave->swd = env->swd;
495 fxsave->twd = twd_i387_to_fxsr(env->twd);
496 fxsave->fop = (u16) ((u32) env->fcs >> 16);
498 fxsave->rip = env->fip;
499 fxsave->rdp = env->foo;
500 /* cs and ds ignored */
502 fxsave->fip = env->fip;
503 fxsave->fcs = (env->fcs & 0xffff);
504 fxsave->foo = env->foo;
505 fxsave->fos = env->fos;
508 for (i = 0; i < 8; ++i)
509 memcpy(&to[i], &from[i], sizeof(from[0]));
512 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
513 unsigned int pos, unsigned int count,
514 void *kbuf, void __user *ubuf)
516 struct user_i387_ia32_struct env;
519 ret = init_fpu(target);
524 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
527 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
528 &target->thread.fpu.state->fsave, 0,
532 sanitize_i387_state(target);
534 if (kbuf && pos == 0 && count == sizeof(env)) {
535 convert_from_fxsr(kbuf, target);
539 convert_from_fxsr(&env, target);
541 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
544 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
545 unsigned int pos, unsigned int count,
546 const void *kbuf, const void __user *ubuf)
548 struct user_i387_ia32_struct env;
551 ret = init_fpu(target);
555 sanitize_i387_state(target);
558 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
561 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
562 &target->thread.fpu.state->fsave, 0, -1);
565 if (pos > 0 || count < sizeof(env))
566 convert_from_fxsr(&env, target);
568 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
570 convert_to_fxsr(target, &env);
573 * update the header bit in the xsave header, indicating the
577 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
582 * FPU state for core dumps.
583 * This is only used for a.out dumps now.
584 * It is declared generically using elf_fpregset_t (which is
585 * struct user_i387_struct) but is in fact only used for 32-bit
586 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
588 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
590 struct task_struct *tsk = current;
593 fpvalid = !!used_math();
595 fpvalid = !fpregs_get(tsk, NULL,
596 0, sizeof(struct user_i387_ia32_struct),
601 EXPORT_SYMBOL(dump_fpu);
603 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */