2 * AMD CPU Microcode Update Driver for Linux
3 * Copyright (C) 2008 Advanced Micro Devices Inc.
5 * Author: Peter Oruba <peter.oruba@amd.com>
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors.
13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/firmware.h>
20 #include <linux/pci_ids.h>
21 #include <linux/uaccess.h>
22 #include <linux/vmalloc.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
27 #include <asm/microcode.h>
28 #include <asm/processor.h>
31 MODULE_DESCRIPTION("AMD Microcode Update Driver");
32 MODULE_AUTHOR("Peter Oruba");
33 MODULE_LICENSE("GPL v2");
35 #define UCODE_MAGIC 0x00414d44
36 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
37 #define UCODE_UCODE_TYPE 0x00000001
39 struct equiv_cpu_entry {
41 u32 fixed_errata_mask;
42 u32 fixed_errata_compare;
45 } __attribute__((packed));
47 struct microcode_header_amd {
53 u32 mc_patch_data_checksum;
62 } __attribute__((packed));
64 struct microcode_amd {
65 struct microcode_header_amd hdr;
69 #define SECTION_HDR_SIZE 8
70 #define CONTAINER_HDR_SZ 12
72 static struct equiv_cpu_entry *equiv_cpu_table;
74 /* page-sized ucode patch buffer */
77 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
79 struct cpuinfo_x86 *c = &cpu_data(cpu);
81 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
82 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
86 csig->rev = c->microcode;
87 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
92 static unsigned int verify_ucode_size(int cpu, u32 patch_size,
95 struct cpuinfo_x86 *c = &cpu_data(cpu);
98 #define F1XH_MPB_MAX_SIZE 2048
99 #define F14H_MPB_MAX_SIZE 1824
100 #define F15H_MPB_MAX_SIZE 4096
104 max_size = F14H_MPB_MAX_SIZE;
107 max_size = F15H_MPB_MAX_SIZE;
110 max_size = F1XH_MPB_MAX_SIZE;
114 if (patch_size > min_t(u32, size, max_size)) {
115 pr_err("patch size mismatch\n");
122 static u16 find_equiv_id(void)
124 unsigned int current_cpu_id, i = 0;
126 BUG_ON(equiv_cpu_table == NULL);
128 current_cpu_id = cpuid_eax(0x00000001);
130 while (equiv_cpu_table[i].installed_cpu != 0) {
131 if (current_cpu_id == equiv_cpu_table[i].installed_cpu)
132 return equiv_cpu_table[i].equiv_cpu;
140 * we signal a good patch is found by returning its size > 0
142 static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
143 unsigned int leftover_size, int rev,
144 unsigned int *current_size)
146 struct microcode_header_amd *mc_hdr;
147 unsigned int actual_size;
150 /* size of the current patch we're staring at */
151 *current_size = *(u32 *)(ucode_ptr + 4) + SECTION_HDR_SIZE;
153 equiv_cpu_id = find_equiv_id();
158 * let's look at the patch header itself now
160 mc_hdr = (struct microcode_header_amd *)(ucode_ptr + SECTION_HDR_SIZE);
162 if (mc_hdr->processor_rev_id != equiv_cpu_id)
165 /* ucode might be chipset specific -- currently we don't support this */
166 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
167 pr_err("CPU%d: chipset specific code not yet supported\n",
172 if (mc_hdr->patch_id <= rev)
176 * now that the header looks sane, verify its size
178 actual_size = verify_ucode_size(cpu, *current_size, leftover_size);
182 /* clear the patch buffer */
183 memset(patch, 0, PAGE_SIZE);
185 /* all looks ok, get the binary patch */
186 get_ucode_data(patch, ucode_ptr + SECTION_HDR_SIZE, actual_size);
191 static int apply_microcode_amd(int cpu)
194 int cpu_num = raw_smp_processor_id();
195 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
196 struct microcode_amd *mc_amd = uci->mc;
197 struct cpuinfo_x86 *c = &cpu_data(cpu);
199 /* We should bind the task to the CPU */
200 BUG_ON(cpu_num != cpu);
205 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
206 /* get patch id after patching */
207 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
209 /* check current patch id and patch's id for match */
210 if (rev != mc_amd->hdr.patch_id) {
211 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
212 cpu, mc_amd->hdr.patch_id);
216 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
217 uci->cpu_sig.rev = rev;
223 static int install_equiv_cpu_table(const u8 *buf)
225 unsigned int *ibuf = (unsigned int *)buf;
226 unsigned int type = ibuf[1];
227 unsigned int size = ibuf[2];
229 if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
230 pr_err("empty section/"
231 "invalid type field in container file section header\n");
235 equiv_cpu_table = vmalloc(size);
236 if (!equiv_cpu_table) {
237 pr_err("failed to allocate equivalent CPU table\n");
241 get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
243 /* add header length */
244 return size + CONTAINER_HDR_SZ;
247 static void free_equiv_cpu_table(void)
249 vfree(equiv_cpu_table);
250 equiv_cpu_table = NULL;
253 static enum ucode_state
254 generic_load_microcode(int cpu, const u8 *data, size_t size)
256 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
257 struct microcode_header_amd *mc_hdr = NULL;
258 unsigned int mc_size, leftover, current_size = 0;
260 const u8 *ucode_ptr = data;
262 unsigned int new_rev = uci->cpu_sig.rev;
263 enum ucode_state state = UCODE_ERROR;
265 offset = install_equiv_cpu_table(ucode_ptr);
267 pr_err("failed to create equivalent cpu table\n");
271 leftover = size - offset;
273 if (*(u32 *)ucode_ptr != UCODE_UCODE_TYPE) {
274 pr_err("invalid type field in container file section header\n");
279 mc_size = get_matching_microcode(cpu, ucode_ptr, leftover,
280 new_rev, ¤t_size);
284 new_rev = mc_hdr->patch_id;
288 ucode_ptr += current_size;
289 leftover -= current_size;
293 state = UCODE_NFOUND;
300 pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
301 cpu, uci->cpu_sig.rev, new_rev);
304 free_equiv_cpu_table();
310 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
312 const char *fw_name = "amd-ucode/microcode_amd.bin";
313 const struct firmware *fw;
314 enum ucode_state ret = UCODE_NFOUND;
316 if (request_firmware(&fw, fw_name, device)) {
317 pr_err("failed to load file %s\n", fw_name);
322 if (*(u32 *)fw->data != UCODE_MAGIC) {
323 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
327 ret = generic_load_microcode(cpu, fw->data, fw->size);
330 release_firmware(fw);
336 static enum ucode_state
337 request_microcode_user(int cpu, const void __user *buf, size_t size)
339 pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
343 static void microcode_fini_cpu_amd(int cpu)
345 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
350 static struct microcode_ops microcode_amd_ops = {
351 .request_microcode_user = request_microcode_user,
352 .request_microcode_fw = request_microcode_amd,
353 .collect_cpu_info = collect_cpu_info_amd,
354 .apply_microcode = apply_microcode_amd,
355 .microcode_fini_cpu = microcode_fini_cpu_amd,
358 struct microcode_ops * __init init_amd_microcode(void)
360 patch = (void *)get_zeroed_page(GFP_KERNEL);
364 return µcode_amd_ops;
367 void __exit exit_amd_microcode(void)
369 free_page((unsigned long)patch);